Difference between revisions of "Braintechnology USB-LPS"
Jump to navigation
Jump to search
Uwe Hermann (talk | contribs) m |
Uwe Hermann (talk | contribs) m (Copy-paste fixes.) |
||
| Line 79: | Line 79: | ||
| 3 MHz | | 3 MHz | ||
| 0x0f | | 0x0f | ||
| | | 0xee | ||
|- bgcolor="#eeeeee" | |- bgcolor="#eeeeee" | ||
| 2.5 MHz | | 2.5 MHz | ||
| Line 91: | Line 91: | ||
| 1.5 MHz | | 1.5 MHz | ||
| 0x1f | | 0x1f | ||
| | | 0xee | ||
|- bgcolor="#dddddd" | |- bgcolor="#dddddd" | ||
| 1 MHz | | 1 MHz | ||
| Line 98: | Line 98: | ||
|- bgcolor="#eeeeee" | |- bgcolor="#eeeeee" | ||
| 800 kHz | | 800 kHz | ||
| | | 0x3b | ||
| 0xee | | 0xee | ||
|- bgcolor="#dddddd" | |- bgcolor="#dddddd" | ||
Revision as of 02:30, 5 January 2012
The Braintechnology USB-LPS is a Cypress FX2 based 16-channel, 24MHz, USB-based logic analyzer and signal/pattern generator.
See Braintechnology USB-LPS/Info for some more details (such as lsusb -vvv output) on the device.
Components
- Cypress CY7C68013A-56PVXC (FX2)
- Atmel ATTiny13-20SU
- LD33 (3.3V voltage regulator)
- 24MHz crystal
Protocol
Firmware upload
The FX2 firmware (3072 bytes in size) is uploaded before every sampling run. Certain bytes in the firmware differ depending on the selected sampling rate.
Starting a sampling run
The host seems to send: 0x00 0x01 0x00 0x00 0x00
Stopping a sampling run
The host seems to send: 0x00 0x00 0x00 0x00 0x00
Sample rates
|
Sampling with 8 probes:
|
Sampling with 16 probes:
|
Sample format
TODO.
Triggers
Not relevant to the protocol, happens purely in software.