SainSmart DDS120

SainSmart DDS120

The SainSmart DDS120 is a USB-based, 2-channel oscilloscope with an analog bandwidth of 20MS/s and 48MS/s sampling rate.

See SainSmart DDS120/Info for more details (such as lsusb -v output) about the device.

Hardware

• USB: Cypress CY7C68013A-100AXC (FX2LP) (datasheet)
• 64-kbyte I²C EEPROM: Microchip 24LC64I (datasheet)
• Crystal: 24MHz
• 145 MHz FastFET Opamps: AD8065ART-R2: (datasheet)

Or in newer hardware:

• Dual 8bit, 100MSPS ADC: MXTronix MXT2088 (datasheet)
• 145 MHz FastFET Opamps: AD8065: (datasheet)
• 4x CMOS differential 4-channel analog mux/demux with logic-level conversion: Texas Instruments CD4052B(M) (datasheet)

Photos

Teardown 1:

• 

  Device, top

• 

  PCB, front

• 

  PCB, front

• 

  PCB, front

• 

  PCB, front

• 

  PCB, front

• 

  PCB, front

• 

  PCB, back

• 

  PCB, back

• 

  Box

• 

  Box

• 

  Box

Teardown 2 (purchased 03/2016):

• 

  Sticker

• 

  Package contents

• 

  Device, top

• 

  Device, bottom

• 

  USB

• 

  Connectors

• 

  PCB, top

• 

  PCB, bottom

• 

  MXT2088

• 

  Cypress FX2

• 

  Microchip 24LC64I

• 

  TI CD4052BM

• 

  AMS1117

• 

  ?

Protocol

The vendor firmware uses the following protocol:

Oscilloscope command	bRequest value	Notes
Set CH0 coupling	0x24	Possible values: 0x00, 0x08 (AC-coupling, DC-coupling).
Set CH1 coupling	0x25	Possible values: 0x20, 0x10 (AC-coupling, DC-coupling).
Set CH0 voltage range	0x22	Possible values: 0x08, 0x04, 0x00, 0x06, 0x02 (50mV, 100mV, 200mV, 500mV, 1-5V).
Set CH1 voltage range	0x23	Possible values: 0x20, 0x10, 0x00, 0x12, 0x02 (50mV, 100mV, 200mV, 500mV, 1-5V).
Set sampling rate	0x94	Possible values: 0x11, 0x01, 0x10 (240kHz, 2.4MHz, 48MHz).
Trigger oscilloscope	0x33	Possible values: 0x00 == start sampling.

Firmware

Vendor firmware

The SainSmart vendor firmware is contained on the I²C EEPROM. The FX2 boots directly into that firmware.

Open-source firmware

There is an open-source firmware that can be used by sigrok. The open source firmware is missing the following planned features:

• <1MHz, 2, 3, 5, 6, 7.5, 9.6, 10, 15, 24, 30 MHz sampling rate support
• Turn on/off the calibration pulse
• Change frequency of the calibration pulse (add 10kHz, 100kHz and 1MHz)

Gain stage

The gain stage is 2 stage approach. -6dB and -20dB on the first stage (attentuator). The second stage is then doing the gain by 3 different resistor values switched into the feedback loop. The following does not correlate with measure on real hardware, there is a 6th gain position that is working though. It is very similar to another gain and was most likely omitted because of that.

# Channel 0:
PC1=1; PC2=0; PC3= 0 -> Gain x0.1 = -20dB -> 0x02 (1V)
PC1=1; PC2=0; PC3= 1 -> Gain x0.2 = -14dB -> 0x0A (0.5V)
PC1=1; PC2=1; PC3= 0 -> Gain x0.4 =  -8dB -> 0x06 (0.250V)
PC1=0; PC2=0; PC3= 0 -> Gain x0.5 =  -6dB -> 0x00 (0.200V)
PC1=0; PC2=0; PC3= 1 -> Gain x1   =   0dB -> 0x08 (0.100V)
PC1=0; PC2=1; PC3= 0 -> Gain x2   =  +6dB -> 0x04 (0.050V)

# Channel 1:
PE1=1; PC4=0; PC5= 0 -> Gain x0.1 = -20dB -> 0x02 (1V)
PE1=1; PC4=0; PC5= 1 -> Gain x0.2 = -14dB -> 0x22 (0.5V)
PE1=1; PC4=1; PC5= 0 -> Gain x0.4 =  -8dB -> 0x12 (0.250V)
PE1=0; PC4=0; PC5= 0 -> Gain x0.5 =  -6dB -> 0x00 (0.200V)
PE1=0; PC4=0; PC5= 1 -> Gain x1   =   0dB -> 0x20 (0.100V)
PE1=0; PC4=1; PC5= 0 -> Gain x2   =  +6dB -> 0x10 (0.050V)

AC/DC coupling

The coupling is controlled via 2 PhotoMOS chips.

# Channel 0:
PE3=0 Disable AC-coupling capacitor (DC-Coupling)
PE3=1 Enable AC-coupling capacitor

# Channel 1:
PE0=0 Disable AC-coupling capacitor (DC-Coupling)
PE0=1 Enable AC-coupling capacitor

1kHz calibration square wave

Pin PE2 controls the frequency of the calibration output on the PCB. It is driven by an ISR timer from the 8051 core of the FX2 chip.

Resources

• EEVBlog forum thread
• Detailed description of the hardware