Difference between revisions of "SainSmart DDS120"

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See [[SainSmart DDS120/Info]] for more details (such as '''lsusb -v''' output) about the device.
See [[SainSmart DDS120/Info]] for more details (such as '''lsusb -v''' output) about the device.
== Hardware ==


* '''USB''': [http://www.cypress.com/documentation/datasheets/cy7c68013a-cy7c68014a-cy7c68015a-cy7c68016a-ez-usb-fx2lp-usb Cypress CY7C68013A-100AXC] (FX2LP) ([http://www.cypress.com/file/138911/download datasheet])
* '''USB''': [http://www.cypress.com/documentation/datasheets/cy7c68013a-cy7c68014a-cy7c68015a-cy7c68016a-ez-usb-fx2lp-usb Cypress CY7C68013A-100AXC] (FX2LP) ([http://www.cypress.com/file/138911/download datasheet])
* '''64-kbyte I²C EEPROM''': [http://www.microchip.com/wwwproducts/Devices.aspx?dDocName=en010831 Microchip 24LC641] ([http://ww1.microchip.com/downloads/en/DeviceDoc/21189f.pdf datasheet])
* '''64-kbyte I²C EEPROM''': [http://www.microchip.com/wwwproducts/Devices.aspx?dDocName=en010831 Microchip 24LC641] ([http://ww1.microchip.com/downloads/en/DeviceDoc/21189f.pdf datasheet])
* '''Crystal''': 24MHz
* '''Crystal''': 24MHz
* '''AD''': AD8065ART-R2: ([http://www.analog.com/static/imported-files/data_sheets/AD8065_8066.pdf datasheet])
* '''145 MHz FastFET Opamps''': [http://www.analog.com/en/products/amplifiers/operational-amplifiers/jfet-input-amplifiers/ad8065.html#product-overview AD8065ART-R2]: ([http://www.analog.com/static/imported-files/data_sheets/AD8065_8066.pdf datasheet])
or in newer hardware
 
* '''AD''': MXT2088 ([http://www.mxtronics.com/n107/n124/n181/n184/c692/attr/2630.pdf datasheet])
'''Or in newer hardware:'''
* '''Opamp''': Analog devices AD8065 (OPAMP)
* '''MUX''': Texas Instruments CD4052B (2 x 1:4 MUX)


== Firmware ==
* '''Dual 8bit, 100MSPS ADC''': [https://translate.google.com/translate?hl=en&sl=zh-CN&tl=en&u=http%3A%2F%2Fwww.mxtronics.com%2Fn107%2Fn124%2Fn181%2Fn184%2Fc692%2Fcontent.html MXTronix MXT2088] ([http://www.mxtronics.com/n107/n124/n181/n184/c692/attr/2630.pdf datasheet])
* '''145 MHz FastFET Opamps''': [http://www.analog.com/en/products/amplifiers/operational-amplifiers/jfet-input-amplifiers/ad8065.html#product-overview AD8065]: ([http://www.analog.com/static/imported-files/data_sheets/AD8065_8066.pdf datasheet])
* 4x '''CMOS differential 4-channel analog mux/demux with logic-level conversion''': [http://www.ti.com/product/cd4052b/description Texas Instruments CD4052B(M)] ([http://www.ti.com/lit/gpn/cd4052b datasheet])


The Sainsmart vendor firmware is contained on the i2c eeprom. The FX2 boots directly into that firmware.
== Photos ==


There is an open source firmware that can be used by Sigrok. The open source firmware is missing the following planned features:
<gallery>
File:DDS120 Top 20141024 0540p.jpg|<small>PCB, front</small>
File:Sainsmart dds120 front 1.jpg|<small>PCB, front</small>
File:Sainsmart dds120 front 2.jpg|<small>PCB, front</small>
File:Sainsmart dds120 front 3.jpg|<small>PCB, front</small>
File:Sainsmart dds120 front 4.jpg|<small>PCB, front</small>
File:Sainsmart dds120 front 5.jpg|<small>PCB, front</small>
File:Sainsmart dds120 back 1.jpg|<small>PCB, back</small>
File:Sainsmart dds120 back 2.jpg|<small>PCB, back</small>
File:Sainsmart dds120 box 1.jpg|<small>Box</small>
File:Sainsmart dds120 box 2.jpg|<small>Box</small>
File:Sainsmart dds120 box 3.jpg|<small>Box</small>
</gallery>


* AC/DC coupling support
== Protocol ==
* <1MHz, 2, 3, 5, 6, 7.5, 9.6, 10, 15, 24, 30 MHz sampling rate support
* Turn on/off the calibration pulse
* Change frequency of the calibration pulse (add 10kHz, 100kHz and 1MHz)


== Vendor Protocol ==
The vendor firmware uses the following protocol:


{| border="0" style="font-size: smaller" class="alternategrey sortable sigroktable"
{| border="0" style="font-size: smaller" class="alternategrey sortable sigroktable"
Line 47: Line 58:
|}
|}


== Photos ==
== Firmware ==


<gallery>
=== Vendor firmware ===
File:DDS120 Top 20141024 0540p.jpg|<small>PCB, front</small>
 
File:Sainsmart dds120 front 1.jpg|<small>PCB, front</small>
File:Sainsmart dds120 front 2.jpg|<small>PCB, front</small>
File:Sainsmart dds120 front 3.jpg|<small>PCB, front</small>
File:Sainsmart dds120 front 4.jpg|<small>PCB, front</small>
File:Sainsmart dds120 front 5.jpg|<small>PCB, front</small>


File:Sainsmart dds120 back 1.jpg|<small>PCB, back</small>
The SainSmart vendor firmware is contained on the I²C EEPROM. The FX2 boots directly into that firmware.
File:Sainsmart dds120 back 2.jpg|<small>PCB, back</small>


File:Sainsmart dds120 box 1.jpg|<small>Box</small>
=== Open-source firmware ===
File:Sainsmart dds120 box 2.jpg|<small>Box</small>
File:Sainsmart dds120 box 3.jpg|<small>Box</small>
</gallery>


== Resources ==
There is an open-source firmware that can be used by sigrok. The open source firmware is missing the following planned features:


* [http://www.eevblog.com/forum/testgear/sainsmart-dds120-usb-oscilloscope-(buudai-bm102)/ EEVBlog forum thread]
* AC/DC coupling support
* [http://www.360customs.de/en/2014/10/usb-oszilloskop-sainsmart-dds120-2-kanal-20mhz-50msps-buudairocktech-bm102/ Detailed description of the hardware]
* <1MHz, 2, 3, 5, 6, 7.5, 9.6, 10, 15, 24, 30 MHz sampling rate support
[[Category:Device]]
* Turn on/off the calibration pulse
[[Category:Oscilloscope]]
* Change frequency of the calibration pulse (add 10kHz, 100kHz and 1MHz)


== Gain stage ==
==== Gain stage ====


The gain stage is 2 stage approach. -6dB and -20dB on the first stage (attentuator). The second stage is then doing the gain by 3 different resistor values switched into the feedback loop. The following does not correlate with measure on real hardware, there is a 6th gain position that is working though. It is very similar to another gain and was most likely omitted because of that.
The gain stage is 2 stage approach. -6dB and -20dB on the first stage (attentuator). The second stage is then doing the gain by 3 different resistor values switched into the feedback loop. The following does not correlate with measure on real hardware, there is a 6th gain position that is working though. It is very similar to another gain and was most likely omitted because of that.


  #Channel 0:
  # Channel 0:
  PC1=1; PC2=0; PC3= 0 -> Gain x0.1 = -20dB -> 0x02 (1V)
  PC1=1; PC2=0; PC3= 0 -> Gain x0.1 = -20dB -> 0x02 (1V)
  PC1=1; PC2=0; PC3= 1 -> Gain x0.2 = -14dB -> 0x0A (0.5V)
  PC1=1; PC2=0; PC3= 1 -> Gain x0.2 = -14dB -> 0x0A (0.5V)
Line 84: Line 84:
  PC1=0; PC2=0; PC3= 1 -> Gain x1  =  0dB -> 0x08 (0.100V)
  PC1=0; PC2=0; PC3= 1 -> Gain x1  =  0dB -> 0x08 (0.100V)
  PC1=0; PC2=1; PC3= 0 -> Gain x2  =  +6dB -> 0x04 (0.050V)
  PC1=0; PC2=1; PC3= 0 -> Gain x2  =  +6dB -> 0x04 (0.050V)
 
  #Channel 1:
  # Channel 1:
  PE1=1; PC4=0; PC5= 0 -> Gain x0.1 = -20dB -> 0x02 (1V)
  PE1=1; PC4=0; PC5= 0 -> Gain x0.1 = -20dB -> 0x02 (1V)
  PE1=1; PC4=0; PC5= 1 -> Gain x0.2 = -14dB -> 0x22 (0.5V)
  PE1=1; PC4=0; PC5= 1 -> Gain x0.2 = -14dB -> 0x22 (0.5V)
Line 93: Line 93:
  PE1=0; PC4=1; PC5= 0 -> Gain x2  =  +6dB -> 0x10 (0.050V)
  PE1=0; PC4=1; PC5= 0 -> Gain x2  =  +6dB -> 0x10 (0.050V)


== AC/DC coupling ==
==== AC/DC coupling ====


The coupling is controlled via 2 PhotoMOS chips.
The coupling is controlled via 2 PhotoMOS chips.


  #Channel 0:
  # Channel 0:
  PE3=0 Disable AC-coupling capacitor (DC-Coupling)
  PE3=0 Disable AC-coupling capacitor (DC-Coupling)
  PE3=1 Enable AC-coupling capacitor
  PE3=1 Enable AC-coupling capacitor
 
  #Channel 1:
  # Channel 1:
  PE0=0 Disable AC-coupling capacitor (DC-Coupling)
  PE0=0 Disable AC-coupling capacitor (DC-Coupling)
  PE0=1 Enable AC-coupling capacitor
  PE0=1 Enable AC-coupling capacitor


== 1kHz Calibration square wave ==
==== 1kHz calibration square wave ====
 
Pin PE2 controls the level of the calibration output on the PCB. This is most likely driven by an ISR timer from the 8051 core of the FX2 chip.
 
== Resources ==


Pin PE2 controlls the level of the calibration output on the pcb. This is most likely driven by an ISR timer from the 8051 core of the FX2 chip.
* [http://www.eevblog.com/forum/testgear/sainsmart-dds120-usb-oscilloscope-(buudai-bm102)/ EEVBlog forum thread]
* [http://www.360customs.de/en/2014/10/usb-oszilloskop-sainsmart-dds120-2-kanal-20mhz-50msps-buudairocktech-bm102/ Detailed description of the hardware]
 
[[Category:Device]]
[[Category:Oscilloscope]]
[[Category:Planned]]

Revision as of 17:03, 3 April 2016

SainSmart DDS120

The SainSmart DDS120 is a USB-based, 2-channel oscilloscope with an analog bandwidth of 20MS/s and 48MS/s sampling rate.

See SainSmart DDS120/Info for more details (such as lsusb -v output) about the device.

Hardware

Or in newer hardware:

Photos

  • PCB, front

  • PCB, front

  • PCB, front

  • PCB, front

  • PCB, front

  • PCB, front

  • PCB, back

  • PCB, back

  • Box

  • Box

  • Box

Protocol

The vendor firmware uses the following protocol:

Oscilloscope command bRequest value Notes
Set CH0 coupling 0x24 Possible values: 0x00, 0x08 (AC-coupling, DC-coupling).
Set CH1 coupling 0x25 Possible values: 0x20, 0x10 (AC-coupling, DC-coupling).
Set CH0 voltage range 0x22 Possible values: 0x08, 0x04, 0x00, 0x06, 0x02 (50mV, 100mV, 200mV, 500mV, 1-5V).
Set CH1 voltage range 0x23 Possible values: 0x20, 0x10, 0x00, 0x12, 0x02 (50mV, 100mV, 200mV, 500mV, 1-5V).
Set sampling rate 0x94 Possible values: 0x11, 0x01, 0x10 (240kHz, 2.4MHz, 48MHz).
Trigger oscilloscope 0x33 Possible values: 0x00 == start sampling.

Firmware

Vendor firmware

The SainSmart vendor firmware is contained on the I²C EEPROM. The FX2 boots directly into that firmware.

Open-source firmware

There is an open-source firmware that can be used by sigrok. The open source firmware is missing the following planned features:

  • AC/DC coupling support
  • <1MHz, 2, 3, 5, 6, 7.5, 9.6, 10, 15, 24, 30 MHz sampling rate support
  • Turn on/off the calibration pulse
  • Change frequency of the calibration pulse (add 10kHz, 100kHz and 1MHz)

Gain stage

The gain stage is 2 stage approach. -6dB and -20dB on the first stage (attentuator). The second stage is then doing the gain by 3 different resistor values switched into the feedback loop. The following does not correlate with measure on real hardware, there is a 6th gain position that is working though. It is very similar to another gain and was most likely omitted because of that. 

# Channel 0:
PC1=1; PC2=0; PC3= 0 -> Gain x0.1 = -20dB -> 0x02 (1V)
PC1=1; PC2=0; PC3= 1 -> Gain x0.2 = -14dB -> 0x0A (0.5V)
PC1=1; PC2=1; PC3= 0 -> Gain x0.4 =  -8dB -> 0x06 (0.250V)
PC1=0; PC2=0; PC3= 0 -> Gain x0.5 =  -6dB -> 0x00 (0.200V)
PC1=0; PC2=0; PC3= 1 -> Gain x1   =   0dB -> 0x08 (0.100V)
PC1=0; PC2=1; PC3= 0 -> Gain x2   =  +6dB -> 0x04 (0.050V)

# Channel 1:
PE1=1; PC4=0; PC5= 0 -> Gain x0.1 = -20dB -> 0x02 (1V)
PE1=1; PC4=0; PC5= 1 -> Gain x0.2 = -14dB -> 0x22 (0.5V)
PE1=1; PC4=1; PC5= 0 -> Gain x0.4 =  -8dB -> 0x12 (0.250V)
PE1=0; PC4=0; PC5= 0 -> Gain x0.5 =  -6dB -> 0x00 (0.200V)
PE1=0; PC4=0; PC5= 1 -> Gain x1   =   0dB -> 0x20 (0.100V)
PE1=0; PC4=1; PC5= 0 -> Gain x2   =  +6dB -> 0x10 (0.050V)

AC/DC coupling

The coupling is controlled via 2 PhotoMOS chips. 

# Channel 0:
PE3=0 Disable AC-coupling capacitor (DC-Coupling)
PE3=1 Enable AC-coupling capacitor

# Channel 1:
PE0=0 Disable AC-coupling capacitor (DC-Coupling)
PE0=1 Enable AC-coupling capacitor

1kHz calibration square wave

Pin PE2 controls the level of the calibration output on the PCB. This is most likely driven by an ISR timer from the 8051 core of the FX2 chip.

Resources

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