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== Documentation == | == Documentation == | ||
* [[Status]] | |||
* [[Design Ideas]] | * [[Design Ideas]] | ||
* [[Formats and structures]] | * [[Formats and structures]] | ||
Revision as of 18:56, 17 March 2010
The sigrok project aims at creating a portable, cross-platform, Free/Libre/Open-Source logic analyzer software that supports various (usually USB-based) logic analyzer hardware products. The code is licensed under the terms of the GNU GPL.
Design goals
- Hardware support. Supports a wide variety of logic analyzer hardware from various vendors with different capabilities.
- Cross-platform. Works on Linux/Mac OS X/Windows/etc. and on x86/ARM/Sparc/PowerPC/etc.
- Scriptable. Extendable with protocol decoders written in Lua or Python.
- Format support. Supports various input and output formats (raw, CSV, gnuplot, VCD, others).
Download
No releases have been made yet. However, development is done in a git repository. To get a copy:
$ git clone git://sigrok.git.sourceforge.net/gitroot/sigrok/sigrok
The build requires libusb-1.0 version 1.0.5 or higher.
Binary releases and additional project information can be found on the sourceforge project page.
Supported hardware
CWAV USBee SX
(coming up)
Saleae Logic
(supported)- Open workbench logic sniffer.jpg
Openbench Logic Sniffer
(work in progress) 
Braintechnology USB-LPS
(partially supported)
Zeroplus Logic Cube
(coming up)
Documentation
Frontends
Getting in touch
- Mailing lists: sigrok-devel, sigrok-commits
- IRC: #sigrok on Freenode.
IMPORTANT: Please note that (unless explicitly specified otherwise) all contents in this wiki (including text and images) are released to the CC-BY-SA 3.0. If you don't want that, please explicitly specify another free-ish license when adding pages or images to the wiki!