Difference between revisions of "WayEngineer Saleae16"
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This is a clone of the [[Saleae Logic16]]. | This is a clone of the [[Saleae Logic16]]. | ||
See [[WayEngineer Saleae16/Info]] for more details (such as '''lsusb - | See [[WayEngineer Saleae16/Info]] for more details (such as '''lsusb -v''' output) about the device. | ||
== Hardware == | == Hardware == | ||
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File:Wayengineer saleae16 device connector.jpg|<small>LA connector</small> | File:Wayengineer saleae16 device connector.jpg|<small>LA connector</small> | ||
File:Wayengineer saleae16 pcb top.jpg|<small>PCB, top</small> | File:Wayengineer saleae16 pcb top.jpg|<small>PCB, top</small> | ||
File:Wayengineer saleae16 pcb bottom.jpg|<small>PCB, bottom</small> | File:Wayengineer saleae16 pcb bottom.jpg|<small>PCB, bottom</small> | ||
File:Wayengineer saleae16 atmel 24c02n.jpg|<small>Atmel 24C02N</small> | File:Wayengineer saleae16 atmel 24c02n.jpg|<small>Atmel 24C02N</small> | ||
| Line 46: | Line 45: | ||
File:Wayengineer saleae16 ams1117 12.jpg|<small>AMS117 1.2V</small> | File:Wayengineer saleae16 ams1117 12.jpg|<small>AMS117 1.2V</small> | ||
File:Wayengineer saleae16 input stage.jpg|<small>Input stage</small> | File:Wayengineer saleae16 input stage.jpg|<small>Input stage</small> | ||
</gallery> | |||
'''Another device:''' | |||
<gallery> | |||
File:WayEngineer16-board-top-2014-09.jpg|<small>PCB, top, without black coating (September 2014)</small> | |||
</gallery> | |||
'''Yet another device:''' | |||
<gallery> | |||
File:Wayengineer saleae16 FX2LP.jpg|<small>USB connector (of a Chinese version)</small> | File:Wayengineer saleae16 FX2LP.jpg|<small>USB connector (of a Chinese version)</small> | ||
File:Wayengineer saleae16 XC3S200A.jpg|<small>FPGA (of a Chinese version)</small> | File:Wayengineer saleae16 XC3S200A.jpg|<small>FPGA (of a Chinese version)</small> | ||
</gallery> | </gallery> | ||
Revision as of 17:45, 2 November 2014
 | |
| Status | supported |
|---|---|
| Source code | saleae-logic16 |
| Channels | 3/6/9/16 |
| Samplerate | 100/50/32/16MHz |
| Samplerate (state) | — |
| Triggers | none (SW-only) |
| Min/max voltage | -0.9V — 6V |
| Threshold voltage |
configurable: for 1.8V to 3.6V systems: VIH=1.4V, VIL=0.7V for 5V systems: VIH=3.6V, VIL=1.4V |
| Memory | none |
| Compression | yes |
| Website | wayengineer.com |
The WayEngineer Saleae16 is a USB-based, 16-channel logic analyzer with 100/50/32/16MHz sampling rate (at 3/6/9/16 enabled channels).
This is a clone of the Saleae Logic16.
See WayEngineer Saleae16/Info for more details (such as lsusb -v output) about the device.
Hardware
- FPGA: Xilinx Spartan-3A XC3S200A, 200K gates (datasheeet)
- USB interface chip: Cypress CY7C68013A-56LTXC (FX2LP) (datasheet)
- I2C EEPROM: Atmel 24C02N (markings: "ATMEL142 24C02N SU27 D") (datasheet)
- 3.3V voltage regulator: Advanced Monolithic Systems AMS1117-3.3 (datasheet, older datasheet)
- 1.2V voltage regulator: Advanced Monolithic Systems AMS1117-1.2 (datasheet, older datasheet)
- Crystal: 24.000
Photos
Package contents
Device with cable
Device, top
Device, bottom
USB connector
LA connector
PCB, top
PCB, bottom
Atmel 24C02N
AMS117 3.3V
AMS117 1.2V
Input stage
Another device:
PCB, top, without black coating (September 2014)
Yet another device:
USB connector (of a Chinese version)
FPGA (of a Chinese version)
