]> sigrok.org Git - sigrok-dumps.git/commitdiff
Add some DCF77 dumps.
authorUwe Hermann <redacted>
Tue, 10 Jan 2012 02:07:11 +0000 (03:07 +0100)
committerUwe Hermann <redacted>
Tue, 10 Jan 2012 02:07:11 +0000 (03:07 +0100)
dcf77/README [new file with mode: 0644]
dcf77/dcf77_120s.sr [new file with mode: 0644]
dcf77/dcf77_1800s.sr [new file with mode: 0644]
dcf77/dcf77_20s.sr [new file with mode: 0644]
dcf77/dcf77_480s.sr [new file with mode: 0644]
dcf77/dcf77_480s_interrupted.sr [new file with mode: 0644]

diff --git a/dcf77/README b/dcf77/README
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@@ -0,0 +1,35 @@
+-------------------------------------------------------------------------------
+DCF77
+-------------------------------------------------------------------------------
+
+This is a set of example captures of a DCF77 signal.
+
+Details:
+http://en.wikipedia.org/wiki/DCF77
+TODO
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used for capturing was a Saleae Logic.
+
+The logic analyzer probes were connected like this:
+
+  Probe       DCF77 module
+  ------------------------
+  1 (black)   PON
+  2 (brown)   DATA
+  GND         GND
+
+
+Data
+----
+
+The sigrok command line used was:
+
+  sigrok-cli -d 0:samplerate=1mhz --time 1800s \
+             -p '1=PON,2=DATA' -o dcf77_1800s.sr
+
+The time and samplerate varies, depending on the file.
+
diff --git a/dcf77/dcf77_120s.sr b/dcf77/dcf77_120s.sr
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diff --git a/dcf77/dcf77_20s.sr b/dcf77/dcf77_20s.sr
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diff --git a/dcf77/dcf77_480s.sr b/dcf77/dcf77_480s.sr
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diff --git a/dcf77/dcf77_480s_interrupted.sr b/dcf77/dcf77_480s_interrupted.sr
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