[sigrok-dumps.git] / i2s / 2ch-16bit-16khz / README

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I2S Master 2-channel 16-bit 16-kHz
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This is an example of an I2S master playing a recording of the BBC
shipping forecast through one channel, and the other channel disconnected.

Logic analyzer setup
--------------------

The logic analyzer used was an EE Electronics ESLA201A (at 12MHz):

  Probe       I2S pin
  -------------------
  0           Clock
  1           Frame Select
  2           Data
Commit	Line	Data
	1	-------------------------------------------------------------------------------
	2	I2S Master 2-channel 16-bit 16-kHz
	3	-------------------------------------------------------------------------------
	4
	5	This is an example of an I2S master playing a recording of the BBC
	6	shipping forecast through one channel, and the other channel disconnected.
	7
	8	Logic analyzer setup
	9	--------------------
	10
	11	The logic analyzer used was an EE Electronics ESLA201A (at 12MHz):
	12
	13	Probe I2S pin
	14	-------------------
	15	0 Clock
	16	1 Frame Select
	17	2 Data
	18