projects / sigrok-dumps.git / blame
| Commit | Line | Data |
|---|---|---|
| ab2a2831 UH |
1 | ------------------------------------------------------------------------------- |
| 2 | Hello World UART output using various options | |
| 3 | ------------------------------------------------------------------------------- | |
| 4 | ||
| 5 | This is a collection of example UART communication (only in one direction). | |
| 07bbf354 UH |
6 | The repeatedly transmitted data is "Hello World!\r\n", using various settings, |
| 7 | such as 8n1, 8o1, 8e1, 7o1, 7e1, etc. | |
| ab2a2831 | 8 | |
| 44f6cffb UH |
9 | The hardware sending the data is an Olimex STM32-H103 eval kit with an |
| 10 | ST STM32 (ARM Cortex-M3) microcontroller. The firmware used is based on a | |
| 11 | simple libopencm3 UART example. The USART1 (USART1.TX pin) is used. | |
| 12 | ||
| 13 | For details see: | |
| 14 | http://libopencm3.org | |
| 15 | http://libopencm3.git.sourceforge.net/git/gitweb.cgi?p=libopencm3/libopencm3;a=tree;f=examples/stm32/f1/stm32-h103/usart_printf | |
| 16 | http://olimex.com/dev/stm32-h103.html | |
| 17 | ||
| ab2a2831 UH |
18 | |
| 19 | Logic analyzer setup | |
| 20 | -------------------- | |
| 21 | ||
| 47cd3c8f UH |
22 | The logic analyzer used was a ChronoVu LA8 at a sample rate of 5MHz (for baud |
| 23 | rates 921600 - 230400), 1MHz (115200 - 19200), and 625kHz (9600 - 1200): | |
| ab2a2831 UH |
24 | |
| 25 | Probe UART | |
| 47cd3c8f | 26 | ---------------- |
| ab2a2831 | 27 | 0 (green) TX |
| ab2a2831 UH |
28 | |
| 29 | ||
| 30 | Data | |
| 31 | ---- | |
| 32 | ||
| 33 | The sigrok command line used was: | |
| 34 | ||
| 35 | sigrok-cli -d 0:samplerate=<hz> --samples 8388608 -p '1=TX' -o <file>.sr | |
| 36 | ||
| 37 | We capture as many samples as fit into the 8MByte buffer of the logic analyzer. | |
| 38 |