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1-------------------------------------------------------------------------------
2SWD
3-------------------------------------------------------------------------------
4
5This is a set of example captures of the ARM SWD (version 1) protocol.
6
7Details:
8http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ihi0031c/index.html
9(Registration required)
10
11
12Logic analyzer setup
13--------------------
14
15 Probe SWD
16 ---------------
17 0 swclk
18 1 swdio
19
20
21Data
22----
23
24Different SWD sessions showing different types of behaviour:
25
26* ftdi_openocd/
27
28Using an FTDI-based adapter via "openocd ftdi resistor hack". OpenOCD
290.9.0 development version. Device under test is a Nordic nRF51822.
30
31Command line:
32
33 $ openocd -f interface/ftdi/olimex-arm-usb-tiny-h.cfg \
34 -f interface/ftdi/swd-resistor-hack.cfg \
35 -f target/nrf51.cfg
36
37** ftdi_openocd/init.sr
38 Initialising device, IDCODE read, etc.
39 OpenOCD args: -c "init; exit"
40
41** ftdi_openocd/init_noreply.sr
42 Initialising when no device is connected (i.e. all responses are 1s.)
43 OpenOCD args: -c "init; exit"
44
45** ftdi_openocd/init_write_0xabbabeeb.sr
46 Initialise, write 20 bytes of 0xabbabeeb at start of RAM.
47 OpenOCD args: -c "init; halt; mww 0x20000000 0xabbabeeb 20; exit"
48
49** ftdi_openocd/init_wait_fault.sr
50 Initialise, attempt to write flash fill of 0xabbabeeb via async loader.
51 This causes SWD WAIT states in "overrun" mode, so the first WAIT causes all
52 subsequent responses to be FAULT until OpenOCD clears the sticky error bit.
53
54 For this capture OpenOCD was patched with this change (known to induce
55 SWD WAITs): http://openocd.zylin.com/#/c/2204/
56
57 OpenOCD args: -c "init; reset halt; flash fillw 0 0xabbabeeb 2048; exit"
58
59
60* stlink_openocd/
61
62Using an STLINK-V2 adapter via OpenOCD 0.9.0 development
63version. Device under test is a Nordic nRF51822.
64
65Command line:
66
67 $ openocd -f interface/stlink-v2.cfg -c 'transport select hla_swd' \
68 -f target/nrf51.cfg
69
70** stlink_openocd/init.sr
71 Intiliasing device, IDCODE read, etc.
72 OpenOCD args: -c "init; exit"
73
74** stlink_openocd/init_write_0xabbabeeb.sr
75 Initialise, write 20 bytes of 0xabbabeeb at start of RAM.
76 OpenOCD args: -c "init; halt; mww 0x20000000 0xabbabeeb 20; exit"
77
78** stlink_openocd/wait_retry.sr
79 Capture showing an SWD WAIT with overrun mode not enabled (in contrast to
80 ftdi_openocd/wait_retry.sr), adapter immediately retries and gets an OK
81 response.
82
83 For this capture OpenOCD was patched with this change (known to induce
84 SWD WAITs): http://openocd.zylin.com/#/c/2204/
85
86 OpenOCD args: -c "init; reset halt; flash fillw 0 0xabbabeeb 2048; exit"
87