[sigrok-dumps.git] / microwire / microchip_93lc56b / README

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Microchip 93LC56B Microwire EEPROM
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This is a set of example captures of the Microwire traffic from a
Microchip 93LC56B Microwire EEPROM.

Details:
https://www.microchip.com/wwwproducts/en/93LC56B
http://ww1.microchip.com/downloads/en/DeviceDoc/21794G.pdf


Logic analyzer setup
--------------------

The logic analyzer used was a CWAV USBee SX (at 8MHz):

  Probe       93LC56B pin
  -----------------------
  0           CS
  2           CLK
  3           DI
  5           DO

The ORG pin is tied high to use the x16 memory organisation (16-bit words).
Commit	Line	Data
05abb2a1 UH	1	-------------------------------------------------------------------------------
	2	Microchip 93LC56B Microwire EEPROM
	3	-------------------------------------------------------------------------------
	4
	5	This is a set of example captures of the Microwire traffic from a
	6	Microchip 93LC56B Microwire EEPROM.
	7
	8	Details:
	9	https://www.microchip.com/wwwproducts/en/93LC56B
	10	http://ww1.microchip.com/downloads/en/DeviceDoc/21794G.pdf
	11
	12
	13	Logic analyzer setup
	14	--------------------
	15
	16	The logic analyzer used was a CWAV USBee SX (at 8MHz):
	17
	18	Probe 93LC56B pin
	19	-----------------------
	20	0 CS
	21	2 CLK
	22	3 DI
	23	5 DO
	24
	25	The ORG pin is tied high to use the x16 memory organisation (16-bit words).
	26