projects / sigrok-dumps.git / blame
| Commit | Line | Data |
|---|---|---|
| 13b1ac66 VPP |
1 | ------------------------------------------------------------------------------- |
| 2 | HUB75 led matrix | |
| 3 | ------------------------------------------------------------------------------- | |
| 4 | ||
| 5 | This is an example capture of a 32x32 pixel 1/16 scan "normally addressed" | |
| 6 | HUB75 LED matrix. The matrix is being driven by a Raspberry Pi 3b+ with | |
| 7 | https://github.com/hzeller/rpi-rgb-led-matrix at 12 PWM bits per color. | |
| 8 | ||
| 9 | The A, B, C and D lines are address lines that select two rows at a time that | |
| 10 | can have LEDs on. Address 0 selects rows 0 and 16, address 2 selects row | |
| 11 | 1 and 17, and so on. | |
| 12 | ||
| 13 | R1, G1 and B1 lines are binary data on the different color LEDs on the first | |
| 14 | line and R2, G2 and B2 for the second line. The data is clocked into constant | |
| 15 | current driver chips that act like 74595 shift registers. | |
| 16 | ||
| 17 | It is possible to build bigger displays by chaining the data to more panels. | |
| 18 | ||
| 19 | ||
| 20 | Logic analyzer setup | |
| 21 | -------------------- | |
| 22 | ||
| 23 | The logic analyzer used was a DreamSourceLab DSLogic Plus (at 100MHz): | |
| 24 | ||
| 25 | Probe HUB75 signal | |
| 26 | ------------------------ | |
| 27 | 0 CLK | |
| 28 | 1 #OE | |
| 29 | 2 LATCH | |
| 30 | 3 no connection | |
| 31 | 4 A | |
| 32 | 5 B | |
| 33 | 6 C | |
| 34 | 7 D | |
| 35 | 8 R1 | |
| 36 | 9 G1 | |
| 37 | 10 B1 | |
| 38 | 11 no connection | |
| 39 | 12 R2 | |
| 40 | 13 G2 | |
| 41 | 14 B2 | |
| 42 | 15 no connection | |
| 43 |