projects / sigrok-dumps.git / blame
| Commit | Line | Data |
|---|---|---|
| e63e73d9 UH |
1 | ------------------------------------------------------------------------------- |
| 2 | Epson 8564JE I2C RTC | |
| 3 | ------------------------------------------------------------------------------- | |
| 4 | ||
| 709737bd UH |
5 | This an example capture of I2C traffic from/to an Epson 8564JE I2C RTC chip, |
| 6 | which has a slave address of 0x51 (or 0xa2, if the read/write bit is included). | |
| e63e73d9 UH |
7 | |
| 8 | ||
| 9 | Logic analyzer setup | |
| 10 | -------------------- | |
| 11 | ||
| 12 | The logic analyzer used for capturing was a ChronoVu LA8 at a sample rate | |
| 13 | of 1MHz. The logic analyzer probes were connected to the RTC chip like this: | |
| 14 | ||
| 15 | Probe RTC chip pin | |
| 16 | ------------------------ | |
| 17 | 0 (green) SCL | |
| 709737bd | 18 | 1 (orange) SDA |
| e63e73d9 UH |
19 | |
| 20 | ||
| 21 | Data | |
| 22 | ---- | |
| 23 | ||
| 24 | The device talking to the RTC was doing the following in an infinite loop: | |
| 25 | ||
| 26 | - Set the RTC to a specific date/time (Nov 22, 2011 - 04:03:54, weekday = 2). | |
| 27 | ||
| 28 | - Read back the current time from the RTC. | |
| 29 | ||
| 709737bd UH |
30 | This is what the decoded data should look like: |
| 31 | ||
| 32 | - Setting the date/time: | |
| 33 | S Wr:0xa2 A 0x02 A 0x54 A 0x03 A 0x04 A 0x22 A 0x02 A 0x11 A 0x11 A P | |
| 34 | ||
| 35 | - Reading the current date/time: | |
| 36 | S Wr:0xa2 A 0x02 A Sr Rd:0xa3 A 0x54 A 0x03 A 0x44 A 0x62 A 0x52 A | |
| 37 | 0x51 A 0x11 N P | |
| 38 | ||
| 49d0ad90 | 39 | - The abbreviations used above: S = Start, Wr = Write, A = ACK, P = Stop, |
| 709737bd UH |
40 | Sr = Repeated start, Rd = Read, N = NACK |
| 41 | ||
| e63e73d9 UH |
42 | The sigrok command line used was: |
| 43 | ||
| 44 | sigrok-cli -d 0:samplerate=1mhz --samples 8388608 \ | |
| 709737bd | 45 | -p '1=SCL,2=SDA' -o rtc_epson_8564je.sr |
| e63e73d9 | 46 |