projects / sigrok-dumps.git / blame
| Commit | Line | Data |
|---|---|---|
| 466b3bd0 MR |
1 | ------------------------------------------------------------------------------- |
| 2 | Dallas DS1307 RTC Clock | |
| 3 | ------------------------------------------------------------------------------- | |
| 4 | ||
| 5 | This is a capture of data ouput from a Dallas DS1307 RTC module using: | |
| 6 | ||
| 7 | - hwclock -f /dev/rtc1 --systohc && { while true; hwclock -f /dev/rtc1; done } | |
| 8 | ||
| 9 | Details: | |
| 10 | - DS1307 datasheet: http://sparkfun.com/datasheets/Components/DS1307.pdf | |
| 11 | ||
| 12 | ||
| bf3d9c40 LG |
13 | A. Logic analyzer setup |
| 14 | ----------------------- | |
| 466b3bd0 | 15 | |
| b8ea5ea0 | 16 | The logic analyzer used was Open Bench Logic Sniffer (at 200kHz): |
| 466b3bd0 MR |
17 | |
| 18 | Probe DS1307 pin | |
| 19 | ------------------------- | |
| 20 | 0 SCL | |
| 21 | 1 SDA | |
| 22 | ||
| 23 | ||
| bf3d9c40 LG |
24 | rtc_ds1307_200khz_*.sr |
| 25 | ---------------------- | |
| 466b3bd0 MR |
26 | |
| 27 | This is what the decoded data should look like: | |
| 28 | ||
| 29 | - Setting the date/time: | |
| 30 | S Wr:0x68 A 0x16 A 0x35 A 0x18 A 0x01 A 0x10 A 0x03 A 0x13 A P | |
| 31 | ||
| 32 | - Reading the current date/time: | |
| 33 | S Wr:0x68 A 0x00 A Sr Rd:0x68 A 0x16 A 0x35 A 0x18 A 0x01 A 0x10 A | |
| 34 | 0x03 A 0x13 N P | |
| 35 | ||
| 36 | - The abbreviations used above: S = Start, Wr = Write, A = ACK, P = Stop, | |
| 37 | Sr = Repeated start, Rd = Read, N = NACK | |
| 38 | ||
| 39 | ||
| 40 | The sigrok command line used was: | |
| 41 | ||
| 42 | sigrok-cli --driver=ols:conn=/dev/ttyACM0 -d samplerate=200khz \ | |
| 43 | --samples=24576 -p 0=SCL,1=SDA --triggers SDA=0 -o <filename> | |
| 44 | ||
| bf3d9c40 LG |
45 | |
| 46 | B. Logic analyzer setup | |
| 47 | ----------------------- | |
| 48 | ||
| 49 | The logic analyzer used is a Saleae Logic clone (at 500kHz): | |
| 50 | ||
| 51 | Probe DS1307 pin | |
| 52 | ------------------------- | |
| 53 | D0 (CH1) SCL | |
| 54 | D1 (CH2) SDA | |
| 55 | ||
| 56 | The sigrok 0.7.1 command line used: | |
| 57 | ||
| 58 | sigrok-cli --driver fx2lafw --channels D0=CLK,D1=DATA \ | |
| 59 | --config samplerate=500khz:captureratio=1 --samples 1000 \ | |
| 60 | --triggers CLK=1,DATA=f --output-file <filename> | |
| 61 | ||
| 62 | ||
| 63 | rtc_ds1307_500khz_sqw32khz_mode12h_pm.sr | |
| 64 | ---------------------------------------- | |
| 65 | ||
| 66 | The file provides reading of time keeping registers as well as control register | |
| 67 | of the RTC chip, which was setup to 12-hours mode, time with PM flag, and | |
| 68 | square wave frequency 32768 Hz before in order to demonstrate bugfixes | |
| 69 | in the following GitHub pull request for libsigrokdecode | |
| 70 | (merged as b3f6033022006c8f4ee88a70155f3571bee1a2ca): | |
| 71 | ||
| 72 | https://github.com/sigrokproject/libsigrokdecode/pull/10 | |
| 73 |