'''
OUTPUT_PYTHON format:
-SPI packet:
-[<cmd>, <data1>, <data2>]
+Packet:
+[<ptype>, <data1>, <data2>]
-Commands:
- - 'DATA': <data1> contains the MISO data, <data2> contains the MOSI data.
+<ptype>:
+ - 'DATA': <data1> contains the MOSI data, <data2> contains the MISO data.
The data is _usually_ 8 bits (but can also be fewer or more bits).
Both data items are Python numbers (not strings), or None if the respective
- probe was not supplied.
- - 'BITS': <data1>/<data2> contain a list of bit values in this MISO/MOSI data
+ channel was not supplied.
+ - 'BITS': <data1>/<data2> contain a list of bit values in this MOSI/MISO data
item, and for each of those also their respective start-/endsample numbers.
- 'CS CHANGE': <data1> is the old CS# pin value, <data2> is the new value.
- Both data items are Python numbers (0/1), not strings.
+ Both data items are Python numbers (0/1), not strings. At the beginning of
+ the decoding a packet is generated with <data1> = -1 and <data2> being the
+ initial state of the CS# pin or -1 if the chip select pin is not supplied.
Examples:
['CS-CHANGE', 1, 0]
(1, 1): 3, # Mode 3
}
+class SamplerateError(Exception):
+ pass
+
+class ChannelError(Exception):
+ pass
+
class Decoder(srd.Decoder):
- api_version = 1
+ api_version = 2
id = 'spi'
name = 'SPI'
longname = 'Serial Peripheral Interface'
license = 'gplv2+'
inputs = ['logic']
outputs = ['spi']
- probes = (
+ channels = (
{'id': 'clk', 'name': 'CLK', 'desc': 'Clock'},
)
- optional_probes = (
+ optional_channels = (
{'id': 'miso', 'name': 'MISO', 'desc': 'Master in, slave out'},
{'id': 'mosi', 'name': 'MOSI', 'desc': 'Master out, slave in'},
{'id': 'cs', 'name': 'CS#', 'desc': 'Chip-select'},
'values': (0, 1)},
{'id': 'cpha', 'desc': 'Clock phase', 'default': 0,
'values': (0, 1)},
- {'id': 'bitorder', 'desc': 'Bit order within the SPI data',
+ {'id': 'bitorder', 'desc': 'Bit order',
'default': 'msb-first', 'values': ('msb-first', 'lsb-first')},
- {'id': 'wordsize', 'desc': 'Word size of SPI data', 'default': 8},
+ {'id': 'wordsize', 'desc': 'Word size', 'default': 8},
)
annotations = (
('miso-data', 'MISO data'),
self.misodata = self.mosidata = 0
self.misobits = []
self.mosibits = []
- self.startsample = -1
+ self.ss_block = -1
self.samplenum = -1
self.cs_was_deasserted = False
self.oldcs = -1
self.oldpins = None
self.have_cs = self.have_miso = self.have_mosi = None
- self.state = 'IDLE'
+ self.no_cs_notification = False
def metadata(self, key, value):
if key == srd.SRD_CONF_SAMPLERATE:
meta=(int, 'Bitrate', 'Bitrate during transfers'))
def putw(self, data):
- self.put(self.startsample, self.samplenum, self.out_ann, data)
+ self.put(self.ss_block, self.samplenum, self.out_ann, data)
def putdata(self):
# Pass MISO and MOSI bits and then data to the next PD up the stack.
def handle_bit(self, miso, mosi, clk, cs):
# If this is the first bit of a dataword, save its sample number.
if self.bitcount == 0:
- self.startsample = self.samplenum
+ self.ss_block = self.samplenum
self.cs_was_deasserted = False
if self.have_cs:
active_low = (self.options['cs_polarity'] == 'active-low')
- deasserted = (cs == 1) if active_low else (cs == 0)
- if deasserted:
- self.cs_was_deasserted = True
+ self.cs_was_deasserted = (cs == 1) if active_low else (cs == 0)
ws = self.options['wordsize']
# Meta bitrate.
elapsed = 1 / float(self.samplerate)
- elapsed *= (self.samplenum - self.startsample + 1)
+ elapsed *= (self.samplenum - self.ss_block + 1)
bitrate = int(1 / elapsed * self.options['wordsize'])
- self.put(self.startsample, self.samplenum, self.out_bitrate, bitrate)
+ self.put(self.ss_block, self.samplenum, self.out_bitrate, bitrate)
if self.have_cs and self.cs_was_deasserted:
self.putw([4, ['CS# was deasserted during this data word!']])
self.handle_bit(miso, mosi, clk, cs)
def decode(self, ss, es, data):
- if self.samplerate is None:
- raise Exception("Cannot decode without samplerate.")
+ if not self.samplerate:
+ raise SamplerateError('Cannot decode without samplerate.')
# Either MISO or MOSI can be omitted (but not both). CS# is optional.
for (self.samplenum, pins) in data:
# Either MISO or MOSI (but not both) can be omitted.
if not (self.have_miso or self.have_mosi):
- raise Exception('Either MISO or MOSI (or both) pins required.')
+ raise ChannelError('Either MISO or MOSI (or both) pins required.')
- # State machine.
- if self.state == 'IDLE':
- self.find_clk_edge(miso, mosi, clk, cs)
- else:
- raise Exception('Invalid state: %s' % self.state)
+ # Tell stacked decoders that we don't have a CS# signal.
+ if not self.no_cs_notification and not self.have_cs:
+ self.put(0, 0, self.out_python, ['CS-CHANGE', -1, -1])
+ self.no_cs_notification = True
+ self.find_clk_edge(miso, mosi, clk, cs)
projects / libsigrokdecode.git / blobdiff