onewire_network: add a missing 'Resume ROM' command

[libsigrokdecode.git] / decoders / onewire_network / pd.py

diff --git a/decoders/onewire_network/pd.py b/decoders/onewire_network/pd.py
index 19ee649caeccf9d23a457f07c7c29a50867f932c..c31d5f96b2e66aa67d86fb7518bc407587dec312 100644 (file)
--- a/decoders/onewire_network/pd.py
+++ b/decoders/onewire_network/pd.py
@@ -14,8 +14,7 @@
 ## GNU General Public License for more details.
 ##
 ## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+## along with this program; if not, see <http://www.gnu.org/licenses/>.
 ##
 
 import sigrokdecode as srd
@@ -30,10 +29,11 @@ command = {
     0xec: ['Conditional search ROM', 'SEARCH ROM'],
     0x3c: ['Overdrive skip ROM'    , 'TRANSPORT' ],
     0x69: ['Overdrive match ROM'   , 'GET ROM'   ],
+    0xa5: ['Resume'                , 'TRANSPORT' ],
 }
 
 class Decoder(srd.Decoder):
-    api_version = 1
+    api_version = 3
     id = 'onewire_network'
     name = '1-Wire network layer'
     longname = '1-Wire serial communication bus (network layer)'
@@ -41,16 +41,17 @@ class Decoder(srd.Decoder):
     license = 'gplv2+'
     inputs = ['onewire_link']
     outputs = ['onewire_network']
-    probes = []
-    optional_probes = []
-    options = {}
-    annotations = [
-        ['text', 'Human-readable text'],
-    ]
-
-    def __init__(self, **kwargs):
-        self.beg = 0
-        self.end = 0
+    tags = ['Embedded/industrial']
+    annotations = (
+        ('text', 'Human-readable text'),
+    )
+
+    def __init__(self):
+        self.reset()
+
+    def reset(self):
+        self.ss_block = 0
+        self.es_block = 0
         self.state = 'COMMAND'
         self.bit_cnt = 0
         self.search = 'P'
@@ -60,16 +61,16 @@ class Decoder(srd.Decoder):
         self.rom = 0x0000000000000000
 
     def start(self):
-        self.out_proto = self.register(srd.OUTPUT_PYTHON)
+        self.out_python = self.register(srd.OUTPUT_PYTHON)
         self.out_ann = self.register(srd.OUTPUT_ANN)
 
     def putx(self, data):
         # Helper function for most annotations.
-        self.put(self.beg, self.end, self.out_ann, data)
+        self.put(self.ss_block, self.es_block, self.out_ann, data)
 
     def puty(self, data):
         # Helper function for most protocol packets.
-        self.put(self.beg, self.end, self.out_proto, data)
+        self.put(self.ss_block, self.es_block, self.out_python, data)
 
     def decode(self, ss, es, data):
         code, val = data
@@ -80,7 +81,7 @@ class Decoder(srd.Decoder):
             self.bit_cnt = 0
             self.put(ss, es, self.out_ann,
                      [0, ['Reset/presence: %s' % ('true' if val else 'false')]])
-            self.put(ss, es, self.out_proto, ['RESET/PRESENCE', val])
+            self.put(ss, es, self.out_python, ['RESET/PRESENCE', val])
             self.state = 'COMMAND'
             return
 
@@ -129,20 +130,18 @@ class Decoder(srd.Decoder):
             if self.onewire_collect(8, val, ss, es) == 0:
                 return
             self.putx([0, ['ROM error data: 0x%02x' % self.data]])
-        else:
-            raise Exception('Invalid state: %s' % self.state)
 
     # Data collector.
     def onewire_collect(self, length, val, ss, es):
         # Storing the sample this sequence begins with.
-        if self.bit_cnt == 1:
-            self.beg = ss
+        if self.bit_cnt == 0:
+            self.ss_block = ss
         self.data = self.data & ~(1 << self.bit_cnt) | (val << self.bit_cnt)
         self.bit_cnt += 1
         # Storing the sample this sequence ends with.
         # In case the full length of the sequence is received, return 1.
         if self.bit_cnt == length:
-            self.end = es
+            self.es_block = es
             self.data = self.data & ((1 << length) - 1)
             self.bit_cnt = 0
             return 1
@@ -153,7 +152,7 @@ class Decoder(srd.Decoder):
     def onewire_search(self, length, val, ss, es):
         # Storing the sample this sequence begins with.
         if (self.bit_cnt == 0) and (self.search == 'P'):
-            self.beg = ss
+            self.ss_block = ss
 
         if self.search == 'P':
             # Master receives an original address bit.
@@ -174,7 +173,7 @@ class Decoder(srd.Decoder):
         # Storing the sample this sequence ends with.
         # In case the full length of the sequence is received, return 1.
         if self.bit_cnt == length:
-            self.end = es
+            self.es_block = es
             self.data_p = self.data_p & ((1 << length) - 1)
             self.data_n = self.data_n & ((1 << length) - 1)
             self.data = self.data & ((1 << length) - 1)