Add srd_inst_initial_pins_set_all() and support code.

[libsigrokdecode.git] / decoders / mdio / pd.py

diff --git a/decoders/mdio/pd.py b/decoders/mdio/pd.py
index 2900444fe923a1b401e2b01c60e5fd5fcea87016..7c2fc5f3039b465bbe65fb5055c8eb21848d1c85 100644 (file)
--- a/decoders/mdio/pd.py
+++ b/decoders/mdio/pd.py
@@ -29,7 +29,7 @@
 import sigrokdecode as srd
 
 class Decoder(srd.Decoder):
-    api_version = 2
+    api_version = 3
     id = 'mdio'
     name = 'MDIO'
     longname = 'Management Data Input/Output'
@@ -62,7 +62,6 @@ class Decoder(srd.Decoder):
     )
 
     def __init__(self):
-        self.last_mdc = 1
         self.illegal_bus = 0
         self.samplenum = -1
         self.clause45_addr = -1 # Clause 45 is context sensitive.
@@ -273,9 +272,10 @@ class Decoder(srd.Decoder):
     def state_DATA(self, mdio):
         if self.data == -1:
             self.data = 0
-            self.putff([2, ['TA', 'T']])
+            self.putff([2, ['TURNAROUND', 'TA', 'T']])
             if self.ta_invalid:
-                self.putff([4, ['TA%s' % self.ta_invalid, 'TA', 'T']])
+                self.putff([4, ['TURNAROUND%s' % self.ta_invalid,
+                                'TA%s' % self.ta_invalid, 'TA', 'T']])
             self.ss_frame_field = self.samplenum
         self.data_bits -= 1
         self.data |= mdio << self.data_bits
@@ -316,14 +316,8 @@ class Decoder(srd.Decoder):
 
         self.process_state(self.state, mdio)
 
-    def decode(self, ss, es, data):
-        for (self.samplenum, pins) in data:
-            # Ignore identical samples early on (for performance reasons).
-            if self.last_mdc == pins[0]:
-                continue
-            self.last_mdc = pins[0]
-            if pins[0] == 0: # Check for rising edge.
-                continue
-
-            # Found the correct clock edge, now get/handle the bit(s).
+    def decode(self):
+        while True:
+            # Process pin state upon rising MDC edge.
+            pins = self.wait({0: 'r'})
             self.handle_bit(pins[1])