## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
-# JTAG protocol decoder
-
import sigrokdecode as srd
'''
-Protocol output format:
+OUTPUT_PYTHON format:
JTAG packet:
[<packet-type>, <data>]
'SHIFT-IR', 'EXIT1-IR', 'EXIT2-IR',
]
-def get_annotation_classes():
- l = []
- for s in jtag_states:
- l.append([s.lower(), s])
- return l
-
class Decoder(srd.Decoder):
api_version = 1
id = 'jtag'
license = 'gplv2+'
inputs = ['logic']
outputs = ['jtag']
- probes = [
+ channels = (
{'id': 'tdi', 'name': 'TDI', 'desc': 'Test data input'},
{'id': 'tdo', 'name': 'TDO', 'desc': 'Test data output'},
{'id': 'tck', 'name': 'TCK', 'desc': 'Test clock'},
{'id': 'tms', 'name': 'TMS', 'desc': 'Test mode select'},
- ]
- optional_probes = [
+ )
+ optional_channels = (
{'id': 'trst', 'name': 'TRST#', 'desc': 'Test reset'},
{'id': 'srst', 'name': 'SRST#', 'desc': 'System reset'},
{'id': 'rtck', 'name': 'RTCK', 'desc': 'Return clock signal'},
- ]
- options = {}
- annotations = get_annotation_classes()
+ )
+ annotations = tuple([tuple([s.lower(), s]) for s in jtag_states])
def __init__(self, **kwargs):
# self.state = 'TEST-LOGIC-RESET'
self.first = True
def start(self):
- self.out_proto = self.register(srd.OUTPUT_PYTHON)
+ self.out_python = self.register(srd.OUTPUT_PYTHON)
self.out_ann = self.register(srd.OUTPUT_ANN)
def putx(self, data):
self.put(self.ss_item, self.es_item, self.out_ann, data)
def putp(self, data):
- self.put(self.ss_item, self.es_item, self.out_proto, data)
+ self.put(self.ss_item, self.es_item, self.out_python, data)
def advance_state_machine(self, tms):
self.oldstate = self.state
self.oldpins = pins
# Get individual pin values into local variables.
- # Unused probes will have a value of > 1.
+ # Unused channels will have a value of > 1.
(tdi, tdo, tck, tms, trst, srst, rtck) = pins
# We only care about TCK edges (either rising or falling).