2 ## This file is part of the libsigrokdecode project.
4 ## Copyright (C) 2019 Federico Cerutti <federico@ceres-c.it>
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, see <http://www.gnu.org/licenses/>.
20 import sigrokdecode as srd
23 RST, CLK, IO, = range(3)
26 BIT, ATR, CMD, DATA, RESET, = range(5)
31 # CMD: [annotation class index, annotation texts for zoom levels]
33 'BIT': [Ann.BIT, '{bit}',],
34 'ATR': [Ann.ATR, 'Answer To Reset: {data:02x}', 'ATR: {data:02x}', '{data:02x}',],
35 'CMD': [Ann.CMD, 'Command: {data:02x}', 'Cmd: {data:02x}', '{data:02x}',],
36 'DATA': [Ann.DATA, 'Data: {data:02x}', '{data:02x}',],
37 'RESET': [Ann.RESET, 'Reset', 'R',],
40 def lookup_proto_ann_txt(cmd, variables):
41 ann = proto.get(cmd, None)
44 cls, texts = ann[0], ann[1:]
45 texts = [t.format(**variables) for t in texts]
48 class Decoder(srd.Decoder):
52 longname = 'SLE44xx memory card'
53 desc = 'SLE 4418/28/32/42 memory card serial protocol'
59 {'id': 'rst', 'name': 'RST', 'desc': 'Reset line'},
60 {'id': 'clk', 'name': 'CLK', 'desc': 'Clock line'},
61 {'id': 'io', 'name': 'I/O', 'desc': 'I/O data line'},
67 ('data', 'Data exchange'),
71 ('bits', 'Bits', (Ann.BIT,)),
72 ('fields', 'Fields', (Ann.ATR, Ann.CMD, Ann.DATA)),
73 ('interrupts', 'Interrupts', (Ann.RESET,)),
76 ('send-data', 'Send data'),
83 self.ss = self.es = self.ss_byte = -1
89 def metadata(self, key, value):
90 if key == srd.SRD_CONF_SAMPLERATE:
91 self.samplerate = value
94 self.out_ann = self.register(srd.OUTPUT_ANN)
95 self.out_binary = self.register(srd.OUTPUT_BINARY)
98 self.put(self.ss, self.es, self.out_ann, data)
100 def putb(self, data):
101 self.put(self.ss, self.es, self.out_binary, data)
103 def handle_reset(self, pins):
104 self.ss, self.es = self.samplenum, self.samplenum
106 cls, texts = lookup_proto_ann_txt(self.cmd, {})
107 self.putx([cls, texts])
108 self.bitcount = self.databyte = 0
110 self.cmd = 'ATR' # Next data bytes will be ATR
112 def handle_command(self, pins):
114 self.ss, self.es = self.samplenum, self.samplenum
115 # If I/O is rising -> command START
116 # if I/O is falling -> command STOP and response data incoming
117 self.cmd = 'CMD' if (io == 0) else 'DATA'
118 self.bitcount = self.databyte = 0
121 # Gather 8 bits of data
122 def handle_data(self, pins):
125 # Data is transmitted LSB-first.
126 self.databyte |= (io << self.bitcount)
128 # Remember the start of the first data/address bit.
129 if self.bitcount == 0:
130 self.ss_byte = self.samplenum
132 # Store individual bits and their start/end samplenumbers.
133 # In the list, index 0 represents the LSB (SLE44xx transmits LSB-first).
134 self.bits.insert(0, [io, self.samplenum, self.samplenum])
135 if self.bitcount > 0:
136 self.bits[1][2] = self.samplenum
137 if self.bitcount == 7:
138 self.bitwidth = self.bits[1][2] - self.bits[2][2]
139 self.bits[0][2] += self.bitwidth
141 # Return if we haven't collected all 8 bits, yet.
142 if self.bitcount < 7:
146 self.ss, self.es = self.ss_byte, self.samplenum + self.bitwidth
148 self.putb([Bin.SEND_DATA, bytes([self.databyte])])
150 for bit_val, bit_ss, bit_es in self.bits:
151 cls, texts = lookup_proto_ann_txt('BIT', {'bit': bit_val})
152 self.put(bit_ss, bit_es, self.out_ann, [cls, texts])
154 cls, texts = lookup_proto_ann_txt(self.cmd, {'data': self.databyte})
155 self.putx([cls, texts])
157 # Done with this packet.
158 self.bitcount = self.databyte = 0
163 # Signal conditions tracked by the protocol decoder:
164 # - RESET condition (R): RST = rising
165 # - Incoming data (D): RST = low, CLK = rising.
166 # - Command mode START: CLK = high, I/O = falling.
167 # - Command mode STOP: CLK = high, I/O = rising.
168 (COND_RESET, COND_DATA, COND_CMD_START, COND_CMD_STOP,) = range(4)
171 {Pin.RST: 'l', Pin.CLK: 'r'},
172 {Pin.CLK: 'h', Pin.IO: 'f'},
173 {Pin.CLK: 'h', Pin.IO: 'r'},
175 pins = self.wait(conditions)
176 if self.matched[COND_RESET]:
177 self.handle_reset(pins)
178 elif self.matched[COND_DATA]:
179 self.handle_data(pins)
180 elif self.matched[COND_CMD_START]:
181 self.handle_command(pins)
182 elif self.matched[COND_CMD_STOP]:
183 self.handle_command(pins)