2 ## This file is part of the libsigrokdecode project.
4 ## Copyright (C) 2019 Mickael Bosch <mickael.bosch@linux.com>
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, see <http://www.gnu.org/licenses/>.
20 import sigrokdecode as srd
22 NUM_OUTPUT_CHANNELS = 8
24 # TODO: Other I²C functions: general call / reset address, device ID address.
26 def logic_channels(num_channels):
28 for i in range(num_channels):
29 l.append(tuple(['p%d' % i, 'P%d' % i]))
32 class Decoder(srd.Decoder):
36 longname = 'NXP PCA9571'
37 desc = 'NXP PCA9571 8-bit I²C output expander.'
41 tags = ['Embedded/industrial', 'IC']
43 ('register', 'Register type'),
44 ('value', 'Register value'),
45 ('warning', 'Warning'),
47 logic_output_channels = logic_channels(NUM_OUTPUT_CHANNELS)
49 ('regs', 'Registers', (0, 1)),
50 ('warnings', 'Warnings', (2,)),
58 self.last_write = 0xFF # Chip port default state is high.
62 for i in range(NUM_OUTPUT_CHANNELS):
63 self.logic_data.append(bytes([1]))
66 self.out_ann = self.register(srd.OUTPUT_ANN)
67 self.out_logic = self.register(srd.OUTPUT_LOGIC)
70 self.put(self.ss, self.es, self.out_ann, data)
72 def put_logic_states(self):
73 if (self.es > self.logic_es):
74 for i in range(NUM_OUTPUT_CHANNELS):
75 self.put(self.logic_es, self.es, self.out_logic, [i, self.logic_data[i]])
76 self.logic_es = self.es
78 def handle_io(self, b):
79 if self.state == 'READ DATA':
80 operation = ['Outputs read', 'R']
81 if b != self.last_write:
82 self.putx([2, ['Warning: read value and last write value '
83 '(%02X) are different' % self.last_write]])
85 operation = ['Outputs set', 'W']
87 self.putx([1, [operation[0] + ': %02X' % b,
88 operation[1] + ': %02X' % b]])
90 for i in range(NUM_OUTPUT_CHANNELS):
91 bit = (b & (1 << i)) != 0
92 self.logic_data[i] = bytes([bit])
94 def check_correct_chip(self, addr):
96 self.putx([2, ['Warning: I²C slave 0x%02X not a PCA9571 '
97 'compatible chip.' % addr]])
101 def decode(self, ss, es, data):
103 self.ss, self.es = ss, es
105 self.put_logic_states()
108 if cmd in ('ACK', 'BITS'): # Discard 'ACK' and 'BITS'.
110 elif cmd in ('START', 'START REPEAT'): # Start a communication.
111 self.state = 'GET SLAVE ADDR'
112 elif cmd in ('NACK', 'STOP'): # Reset the state machine.
114 elif cmd in ('ADDRESS READ', 'ADDRESS WRITE'):
115 if ((self.state == 'GET SLAVE ADDR') and
116 self.check_correct_chip(databyte)):
117 if cmd == 'ADDRESS READ':
118 self.state = 'READ DATA'
120 self.state = 'WRITE DATA'
123 elif cmd in ('DATA READ', 'DATA WRITE'):
124 if self.state in ('READ DATA', 'WRITE DATA'):
125 self.handle_io(databyte)