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1 | ## | |
2 | ## This file is part of the sigrok project. | |
3 | ## | |
4 | ## Copyright (C) 2010-2011 Uwe Hermann <uwe@hermann-uwe.de> | |
5 | ## | |
6 | ## This program is free software; you can redistribute it and/or modify | |
7 | ## it under the terms of the GNU General Public License as published by | |
8 | ## the Free Software Foundation; either version 2 of the License, or | |
9 | ## (at your option) any later version. | |
10 | ## | |
11 | ## This program is distributed in the hope that it will be useful, | |
12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | ## GNU General Public License for more details. | |
15 | ## | |
16 | ## You should have received a copy of the GNU General Public License | |
17 | ## along with this program; if not, write to the Free Software | |
18 | ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
19 | ## | |
20 | ||
21 | # | |
22 | # I2C protocol decoder | |
23 | # | |
24 | ||
25 | # | |
26 | # The Inter-Integrated Circuit (I2C) bus is a bidirectional, multi-master | |
27 | # bus using two signals (SCL = serial clock line, SDA = serial data line). | |
28 | # | |
29 | # There can be many devices on the same bus. Each device can potentially be | |
30 | # master or slave (and that can change during runtime). Both slave and master | |
31 | # can potentially play the transmitter or receiver role (this can also | |
32 | # change at runtime). | |
33 | # | |
34 | # Possible maximum data rates: | |
35 | # - Standard mode: 100 kbit/s | |
36 | # - Fast mode: 400 kbit/s | |
37 | # - Fast-mode Plus: 1 Mbit/s | |
38 | # - High-speed mode: 3.4 Mbit/s | |
39 | # | |
40 | # START condition (S): SDA = falling, SCL = high | |
41 | # Repeated START condition (Sr): same as S | |
42 | # Data bit sampling: SCL = rising | |
43 | # STOP condition (P): SDA = rising, SCL = high | |
44 | # | |
45 | # All data bytes on SDA are exactly 8 bits long (transmitted MSB-first). | |
46 | # Each byte has to be followed by a 9th ACK/NACK bit. If that bit is low, | |
47 | # that indicates an ACK, if it's high that indicates a NACK. | |
48 | # | |
49 | # After the first START condition, a master sends the device address of the | |
50 | # slave it wants to talk to. Slave addresses are 7 bits long (MSB-first). | |
51 | # After those 7 bits, a data direction bit is sent. If the bit is low that | |
52 | # indicates a WRITE operation, if it's high that indicates a READ operation. | |
53 | # | |
54 | # Later an optional 10bit slave addressing scheme was added. | |
55 | # | |
56 | # Documentation: | |
57 | # http://www.nxp.com/acrobat/literature/9398/39340011.pdf (v2.1 spec) | |
58 | # http://www.nxp.com/acrobat/usermanuals/UM10204_3.pdf (v3 spec) | |
59 | # http://en.wikipedia.org/wiki/I2C | |
60 | # | |
61 | ||
62 | # TODO: Look into arbitration, collision detection, clock synchronisation, etc. | |
63 | # TODO: Handle clock stretching. | |
64 | # TODO: Handle combined messages / repeated START. | |
65 | # TODO: Implement support for 7bit and 10bit slave addresses. | |
66 | # TODO: Implement support for inverting SDA/SCL levels (0->1 and 1->0). | |
67 | # TODO: Implement support for detecting various bus errors. | |
68 | ||
69 | # | |
70 | # I2C output format: | |
71 | # | |
72 | # The output consists of a (Python) list of I2C "packets", each of which | |
73 | # has an (implicit) index number (its index in the list). | |
74 | # Each packet consists of a Python dict with certain key/value pairs. | |
75 | # | |
76 | # TODO: Make this a list later instead of a dict? | |
77 | # | |
78 | # 'type': (string) | |
79 | # - 'S' (START condition) | |
80 | # - 'Sr' (Repeated START) | |
81 | # - 'AR' (Address, read) | |
82 | # - 'AW' (Address, write) | |
83 | # - 'DR' (Data, read) | |
84 | # - 'DW' (Data, write) | |
85 | # - 'P' (STOP condition) | |
86 | # 'range': (tuple of 2 integers, the min/max samplenumber of this range) | |
87 | # - (min, max) | |
88 | # - min/max can also be identical. | |
89 | # 'data': (actual data as integer ???) TODO: This can be very variable... | |
90 | # 'ann': (string; additional annotations / comments) | |
91 | # | |
92 | # TODO: I2C address of slaves. | |
93 | # TODO: Handle multiple different I2C devices on same bus | |
94 | # -> we need to decode multiple protocols at the same time. | |
95 | # | |
96 | ||
97 | # | |
98 | # I2C input format: | |
99 | # | |
100 | # signals: | |
101 | # [[id, channel, description], ...] # TODO | |
102 | # | |
103 | # Example: | |
104 | # {'id': 'SCL', 'ch': 5, 'desc': 'Serial clock line'} | |
105 | # {'id': 'SDA', 'ch': 7, 'desc': 'Serial data line'} | |
106 | # ... | |
107 | # | |
108 | # {'inbuf': [...], | |
109 | # 'signals': [{'SCL': }]} | |
110 | # | |
111 | ||
112 | import sigrokdecode | |
113 | ||
114 | # values are verbose and short annotation, respectively | |
115 | protocol = { | |
116 | 'START': ['START', 'S'], | |
117 | 'START_REPEAT': ['START REPEAT', 'Sr'], | |
118 | 'STOP': ['STOP', 'P'], | |
119 | 'ACK': ['ACK', 'A'], | |
120 | 'NACK': ['NACK', 'N'], | |
121 | 'ADDRESS_READ': ['ADDRESS READ', 'AR'], | |
122 | 'ADDRESS_WRITE': ['ADDRESS WRITE','AW'], | |
123 | 'DATA_READ': ['DATA READ', 'DR'], | |
124 | 'DATA_WRITE': ['DATA WRITE', 'DW'], | |
125 | } | |
126 | # export protocol keys as symbols for i2c decoders up the stack | |
127 | EXPORT = [ protocol.keys() ] | |
128 | ||
129 | # States | |
130 | FIND_START = 0 | |
131 | FIND_ADDRESS = 1 | |
132 | FIND_DATA = 2 | |
133 | ||
134 | # annotation feed formats | |
135 | ANN_SHIFTED = 0 | |
136 | ANN_SHIFTED_SHORT = 1 | |
137 | ANN_RAW = 2 | |
138 | ||
139 | ||
140 | class Decoder(sigrokdecode.Decoder): | |
141 | id = 'i2c' | |
142 | name = 'I2C' | |
143 | longname = 'Inter-Integrated Circuit (I2C) bus' | |
144 | desc = 'I2C is a two-wire, multi-master, serial bus.' | |
145 | longdesc = '...' | |
146 | author = 'Uwe Hermann' | |
147 | email = 'uwe@hermann-uwe.de' | |
148 | license = 'gplv2+' | |
149 | inputs = ['logic'] | |
150 | outputs = ['i2c'] | |
151 | probes = [ | |
152 | {'id': 'scl', 'name': 'SCL', 'desc': 'Serial clock line'}, | |
153 | {'id': 'sda', 'name': 'SDA', 'desc': 'Serial data line'}, | |
154 | ] | |
155 | options = { | |
156 | 'address-space': ['Address space (in bits)', 7], | |
157 | } | |
158 | annotation = [ | |
159 | # ANN_SHIFTED | |
160 | ["7-bit shifted hex", | |
161 | "Read/Write bit shifted out from the 8-bit i2c slave address"], | |
162 | # ANN_SHIFTED_SHORT | |
163 | ["7-bit shifted hex (short)", | |
164 | "Read/Write bit shifted out from the 8-bit i2c slave address"], | |
165 | # ANN_RAW | |
166 | ["Raw hex", "Unaltered raw data"] | |
167 | ] | |
168 | ||
169 | def __init__(self, **kwargs): | |
170 | self.output_protocol = None | |
171 | self.output_annotation = None | |
172 | self.samplecnt = 0 | |
173 | self.bitcount = 0 | |
174 | self.databyte = 0 | |
175 | self.wr = -1 | |
176 | self.startsample = -1 | |
177 | self.is_repeat_start = 0 | |
178 | self.state = FIND_START | |
179 | self.oldscl = None | |
180 | self.oldsda = None | |
181 | ||
182 | def start(self, metadata): | |
183 | self.output_protocol = self.output_new(1) | |
184 | self.output_annotation = self.output_new(0) | |
185 | ||
186 | def report(self): | |
187 | pass | |
188 | ||
189 | def is_start_condition(self, scl, sda): | |
190 | """START condition (S): SDA = falling, SCL = high""" | |
191 | if (self.oldsda == 1 and sda == 0) and scl == 1: | |
192 | return True | |
193 | return False | |
194 | ||
195 | def is_data_bit(self, scl, sda): | |
196 | """Data sampling of receiver: SCL = rising""" | |
197 | if self.oldscl == 0 and scl == 1: | |
198 | return True | |
199 | return False | |
200 | ||
201 | def is_stop_condition(self, scl, sda): | |
202 | """STOP condition (P): SDA = rising, SCL = high""" | |
203 | if (self.oldsda == 0 and sda == 1) and scl == 1: | |
204 | return True | |
205 | return False | |
206 | ||
207 | def found_start(self, scl, sda): | |
208 | if self.is_repeat_start == 1: | |
209 | cmd = 'START_REPEAT' | |
210 | else: | |
211 | cmd = 'START' | |
212 | self.put(self.output_protocol, [ cmd ]) | |
213 | self.put(self.output_annotation, [ ANN_SHIFTED, [protocol[cmd][0]] ]) | |
214 | self.put(self.output_annotation, [ ANN_SHIFTED_SHORT, [protocol[cmd][1]] ]) | |
215 | ||
216 | self.state = FIND_ADDRESS | |
217 | self.bitcount = self.databyte = 0 | |
218 | self.is_repeat_start = 1 | |
219 | self.wr = -1 | |
220 | ||
221 | def found_address_or_data(self, scl, sda): | |
222 | """Gather 8 bits of data plus the ACK/NACK bit.""" | |
223 | ||
224 | if self.startsample == -1: | |
225 | # TODO: should be samplenum, as received from the feed | |
226 | self.startsample = self.samplecnt | |
227 | self.bitcount += 1 | |
228 | ||
229 | # Address and data are transmitted MSB-first. | |
230 | self.databyte <<= 1 | |
231 | self.databyte |= sda | |
232 | ||
233 | # Return if we haven't collected all 8 + 1 bits, yet. | |
234 | if self.bitcount != 9: | |
235 | return [] | |
236 | ||
237 | # send raw output annotation before we start shifting out | |
238 | # read/write and ack/nack bits | |
239 | self.put(self.output_annotation, [ANN_RAW, ["0x%.2x" % self.databyte]]) | |
240 | ||
241 | # We received 8 address/data bits and the ACK/NACK bit. | |
242 | self.databyte >>= 1 # Shift out unwanted ACK/NACK bit here. | |
243 | ||
244 | if self.state == FIND_ADDRESS: | |
245 | d = self.databyte & 0xfe | |
246 | # The READ/WRITE bit is only in address bytes, not data bytes. | |
247 | self.wr = 1 if (self.databyte & 1) else 0 | |
248 | elif self.state == FIND_DATA: | |
249 | d = self.databyte | |
250 | else: | |
251 | # TODO: Error? | |
252 | pass | |
253 | ||
254 | # last bit that came in was the ACK/NACK bit (1 = NACK) | |
255 | if sda == 1: | |
256 | ack_bit = 'NACK' | |
257 | else: | |
258 | ack_bit = 'ACK' | |
259 | ||
260 | # TODO: Simplify. | |
261 | if self.state == FIND_ADDRESS and self.wr == 1: | |
262 | cmd = 'ADDRESS_WRITE' | |
263 | elif self.state == FIND_ADDRESS and self.wr == 0: | |
264 | cmd = 'ADDRESS_READ' | |
265 | elif self.state == FIND_DATA and self.wr == 1: | |
266 | cmd = 'DATA_WRITE' | |
267 | elif self.state == FIND_DATA and self.wr == 0: | |
268 | cmd = 'DATA_READ' | |
269 | self.put(self.output_protocol, [ [cmd, d], [ack_bit] ] ) | |
270 | self.put(self.output_annotation, [ANN_SHIFTED, [ | |
271 | "%s" % protocol[cmd][0], | |
272 | "0x%02x" % d, | |
273 | "%s" % protocol[ack_bit][0]] | |
274 | ] ) | |
275 | self.put(self.output_annotation, [ANN_SHIFTED_SHORT, [ | |
276 | "%s" % protocol[cmd][1], | |
277 | "0x%02x" % d, | |
278 | "%s" % protocol[ack_bit][1]] | |
279 | ] ) | |
280 | ||
281 | self.bitcount = self.databyte = 0 | |
282 | self.startsample = -1 | |
283 | ||
284 | if self.state == FIND_ADDRESS: | |
285 | self.state = FIND_DATA | |
286 | elif self.state == FIND_DATA: | |
287 | # There could be multiple data bytes in a row. | |
288 | # So, either find a STOP condition or another data byte next. | |
289 | pass | |
290 | ||
291 | def found_stop(self, scl, sda): | |
292 | self.put(self.output_protocol, [ 'STOP' ]) | |
293 | self.put(self.output_annotation, [ ANN_SHIFTED, [protocol['STOP'][0]] ]) | |
294 | self.put(self.output_annotation, [ ANN_SHIFTED_SHORT, [protocol['STOP'][1]] ]) | |
295 | ||
296 | self.state = FIND_START | |
297 | self.is_repeat_start = 0 | |
298 | self.wr = -1 | |
299 | ||
300 | def put(self, output_id, data): | |
301 | # inject sample range into the call up to sigrok | |
302 | # TODO: 0-0 sample range for now | |
303 | super(Decoder, self).put(0, 0, output_id, data) | |
304 | ||
305 | def decode(self, timeoffset, duration, data): | |
306 | for samplenum, (scl, sda) in data: | |
307 | self.samplecnt += 1 | |
308 | ||
309 | # First sample: Save SCL/SDA value. | |
310 | if self.oldscl == None: | |
311 | self.oldscl = scl | |
312 | self.oldsda = sda | |
313 | continue | |
314 | ||
315 | # TODO: Wait until the bus is idle (SDA = SCL = 1) first? | |
316 | ||
317 | # State machine. | |
318 | if self.state == FIND_START: | |
319 | if self.is_start_condition(scl, sda): | |
320 | self.found_start(scl, sda) | |
321 | elif self.state == FIND_ADDRESS: | |
322 | if self.is_data_bit(scl, sda): | |
323 | self.found_address_or_data(scl, sda) | |
324 | elif self.state == FIND_DATA: | |
325 | if self.is_data_bit(scl, sda): | |
326 | self.found_address_or_data(scl, sda) | |
327 | elif self.is_start_condition(scl, sda): | |
328 | self.found_start(scl, sda) | |
329 | elif self.is_stop_condition(scl, sda): | |
330 | self.found_stop(scl, sda) | |
331 | else: | |
332 | # TODO: Error? | |
333 | pass | |
334 | ||
335 | # Save current SDA/SCL values for the next round. | |
336 | self.oldscl = scl | |
337 | self.oldsda = sda | |
338 |