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Add wiegand decoder.
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1##
2## This file is part of the libsigrokdecode project.
3##
4## Copyright (C) 2016 Sean Burford <sburford@google.com>
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; either version 2 of the License, or
9## (at your option) any later version.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
16## You should have received a copy of the GNU General Public License
17## along with this program; if not, write to the Free Software
18## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19##
20
21import sigrokdecode as srd
22
23class Decoder(srd.Decoder):
24 api_version = 2
25 id = 'wiegand'
26 name = 'Wiegand'
27 longname = 'Wiegand interface'
28 desc = 'Wiegand interface for electronic entry systems.'
29 license = 'gplv2+'
30 inputs = ['logic']
31 outputs = ['wiegand']
32 channels = (
33 {'id': 'd0', 'name': 'D0', 'desc': 'Data 0 line'},
34 {'id': 'd1', 'name': 'D1', 'desc': 'Data 1 line'},
35 )
36 options = (
37 {'id': 'active', 'desc': 'Data lines active level',
38 'default': 'low', 'values': ('low', 'high')},
39 {'id': 'bitwidth_ms', 'desc': 'Single bit width in milliseconds',
40 'default': '4', 'values': ('1', '2', '4', '8', '16', '32')},
41 )
42 annotations = (
43 ('bits', 'Bits'),
44 ('state', 'State'),
45 )
46 annotation_rows = (
47 ('bits', 'Binary value', (0,)),
48 ('state', 'Stream state', (1,)),
49 )
50
51 def __init__(self, **kwargs):
52 self._samples_per_bit = 10
53
54 self._d0_prev = None
55 self._d1_prev = None
56
57 self._state = None
58 self._ss_state = None
59
60 self.ss_bit = None
61 self.es_bit = None
62 self._bit = None
63 self._bits = []
64
65 def start(self):
66 'Register output types and verify user supplied decoder values.'
67 self.out_ann = self.register(srd.OUTPUT_ANN)
68 self._active = self.options['active'] == 'high' and 1 or 0
69 self._inactive = 1 - self._active
70
71 def metadata(self, key, value):
72 'Receive decoder metadata about the data stream.'
73 if key == srd.SRD_CONF_SAMPLERATE:
74 ms_per_sample = 1000 * (1.0 / value)
75 ms_per_bit = float(self.options['bitwidth_ms'])
76 self._samples_per_bit = int(max(1, int(ms_per_bit / ms_per_sample)))
77
78 def _update_state(self, state, bit=None):
79 'Update state and bit values when they change.'
80 if self._bit is not None:
81 self._bits.append(self._bit)
82 self.put(self.ss_bit, self.samplenum, self.out_ann,
83 [0, [str(self._bit)]])
84 self._bit = bit
85 self.ss_bit = self.samplenum
86 if bit is not None:
87 # Set a timeout so that the final bit ends.
88 self.es_bit = self.samplenum + self._samples_per_bit
89 else:
90 self.es_bit = None
91
92 if state != self._state:
93 ann = None
94 if self._state == 'data':
95 accum_bits = ''.join(str(x) for x in self._bits)
96 ann = [1, ['%d bits %s' % (len(self._bits), accum_bits),
97 '%d bits' % len(self._bits)]]
98 elif self._state == 'invalid':
99 ann = [1, [self._state]]
100 if ann:
101 self.put(self._ss_state, self.samplenum, self.out_ann, ann)
102 self._ss_state = self.samplenum
103 self._state = state
104 self._bits = []
105
106 def decode(self, ss, es, data):
107 for self.samplenum, (d0, d1) in data:
108 if d0 == self._d0_prev and d1 == self._d1_prev:
109 if self.es_bit and self.samplenum >= self.es_bit:
110 if (d0, d1) == (self._inactive, self._inactive):
111 self._update_state('idle')
112 else:
113 self._update_state('invalid')
114 continue
115
116 if self._state in (None, 'idle', 'data'):
117 if (d0, d1) == (self._active, self._inactive):
118 self._update_state('data', 0)
119 elif (d0, d1) == (self._inactive, self._active):
120 self._update_state('data', 1)
121 elif (d0, d1) == (self._active, self._active):
122 self._update_state('invalid')
123 elif self._state == 'invalid':
124 # Wait until we see an idle state before leaving invalid.
125 # This prevents inverted lines from being misread.
126 if (d0, d1) == (self._inactive, self._inactive):
127 self._update_state('idle')
128
129 self._d0_prev, self._d1_prev = d0, d1
130
131 def report(self):
132 return '%s: %s D0 %d D1 %d (active on %d), %d samples per bit' % (
133 self.name, self._state, self._d0_prev, self._d1_prev,
134 self._active, self._samples_per_bit)