]> sigrok.org Git - libsigrokdecode.git/blame - decoders/pca9571/pd.py
Implement basic flushing
[libsigrokdecode.git] / decoders / pca9571 / pd.py
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1##
2## This file is part of the libsigrokdecode project.
3##
4## Copyright (C) 2019 Mickael Bosch <mickael.bosch@linux.com>
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; either version 2 of the License, or
9## (at your option) any later version.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
16## You should have received a copy of the GNU General Public License
17## along with this program; if not, see <http://www.gnu.org/licenses/>.
18##
19
20import sigrokdecode as srd
21
22NUM_OUTPUT_CHANNELS = 8
23
24# TODO: Other I²C functions: general call / reset address, device ID address.
25
9b6c0354 26def logic_channels(num_channels):
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27 l = []
28 for i in range(num_channels):
460e6cfa 29 l.append(tuple(['p%d' % i, 'P%d' % i]))
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30 return tuple(l)
31
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32class Decoder(srd.Decoder):
33 api_version = 3
34 id = 'pca9571'
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35 name = 'PCA9571'
36 longname = 'NXP PCA9571'
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37 desc = 'NXP PCA9571 8-bit I²C output expander.'
38 license = 'gplv2+'
39 inputs = ['i2c']
40 outputs = []
41 tags = ['Embedded/industrial', 'IC']
42 annotations = (
43 ('register', 'Register type'),
44 ('value', 'Register value'),
e144452b 45 ('warning', 'Warning'),
70d258a5 46 )
f22b1c74 47 logic_output_channels = logic_channels(NUM_OUTPUT_CHANNELS)
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48 annotation_rows = (
49 ('regs', 'Registers', (0, 1)),
50 ('warnings', 'Warnings', (2,)),
51 )
52
53 def __init__(self):
54 self.reset()
55
56 def reset(self):
57 self.state = 'IDLE'
58 self.last_write = 0xFF # Chip port default state is high.
b8c8dc8a 59 self.last_write_es = 0
9b6c0354 60
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61 def start(self):
62 self.out_ann = self.register(srd.OUTPUT_ANN)
f22b1c74 63 self.out_logic = self.register(srd.OUTPUT_LOGIC)
70d258a5 64
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65 def flush(self):
66 self.put_logic_states()
b8c8dc8a 67
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68 def putx(self, data):
69 self.put(self.ss, self.es, self.out_ann, data)
70
9b6c0354 71 def put_logic_states(self):
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72 if (self.es > self.last_write_es):
73 data = bytes([self.last_write])
74 self.put(self.last_write_es, self.es, self.out_logic, [0, data])
75 self.last_write_es = self.es
f22b1c74 76
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77 def handle_io(self, b):
78 if self.state == 'READ DATA':
79 operation = ['Outputs read', 'R']
80 if b != self.last_write:
81 self.putx([2, ['Warning: read value and last write value '
82 '(%02X) are different' % self.last_write]])
83 else:
84 operation = ['Outputs set', 'W']
114adb49 85 self.put_logic_states()
70d258a5 86 self.last_write = b
b8c8dc8a 87
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88 self.putx([1, [operation[0] + ': %02X' % b,
89 operation[1] + ': %02X' % b]])
9b6c0354 90
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91 def check_correct_chip(self, addr):
92 if addr != 0x25:
93 self.putx([2, ['Warning: I²C slave 0x%02X not a PCA9571 '
94 'compatible chip.' % addr]])
95 return False
96 return True
97
98 def decode(self, ss, es, data):
99 cmd, databyte = data
100 self.ss, self.es = ss, es
101
102 # State machine.
103 if cmd in ('ACK', 'BITS'): # Discard 'ACK' and 'BITS'.
104 pass
105 elif cmd in ('START', 'START REPEAT'): # Start a communication.
106 self.state = 'GET SLAVE ADDR'
107 elif cmd in ('NACK', 'STOP'): # Reset the state machine.
108 self.state = 'IDLE'
109 elif cmd in ('ADDRESS READ', 'ADDRESS WRITE'):
110 if ((self.state == 'GET SLAVE ADDR') and
111 self.check_correct_chip(databyte)):
112 if cmd == 'ADDRESS READ':
113 self.state = 'READ DATA'
114 else:
115 self.state = 'WRITE DATA'
116 else:
117 self.state = 'IDLE'
118 elif cmd in ('DATA READ', 'DATA WRITE'):
119 if self.state in ('READ DATA', 'WRITE DATA'):
120 self.handle_io(databyte)
121 else:
122 self.state = 'IDLE'