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e88f6375 UH |
1 | ## |
2 | ## This file is part of the libsigrokdecode project. | |
3 | ## | |
4 | ## Copyright (C) 2012-2015 Uwe Hermann <uwe@hermann-uwe.de> | |
e349cbe9 KH |
5 | ## Copyright (C) 2019 Zhiyuan Wan <dv.xw@qq.com> |
6 | ## Copyright (C) 2019 Kongou Hikari <hikari@iloli.bid> | |
e88f6375 UH |
7 | ## |
8 | ## This program is free software; you can redistribute it and/or modify | |
9 | ## it under the terms of the GNU General Public License as published by | |
10 | ## the Free Software Foundation; either version 2 of the License, or | |
11 | ## (at your option) any later version. | |
12 | ## | |
13 | ## This program is distributed in the hope that it will be useful, | |
14 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | ## GNU General Public License for more details. | |
17 | ## | |
18 | ## You should have received a copy of the GNU General Public License | |
19 | ## along with this program; if not, see <http://www.gnu.org/licenses/>. | |
20 | ## | |
21 | ||
22 | import sigrokdecode as srd | |
23 | ||
24 | ''' | |
25 | OUTPUT_PYTHON format: | |
26 | ||
27 | Packet: | |
28 | [<ptype>, <pdata>] | |
29 | ||
30 | <ptype>: | |
31 | - 'NEW STATE': <pdata> is the new state of the JTAG state machine. | |
32 | Valid values: 'TEST-LOGIC-RESET', 'RUN-TEST/IDLE', 'SELECT-DR-SCAN', | |
33 | 'CAPTURE-DR', 'SHIFT-DR', 'EXIT1-DR', 'PAUSE-DR', 'EXIT2-DR', 'UPDATE-DR', | |
34 | 'SELECT-IR-SCAN', 'CAPTURE-IR', 'SHIFT-IR', 'EXIT1-IR', 'PAUSE-IR', | |
35 | 'EXIT2-IR', 'UPDATE-IR'. | |
36 | - 'IR TDI': Bitstring that was clocked into the IR register. | |
37 | - 'IR TDO': Bitstring that was clocked out of the IR register. | |
38 | - 'DR TDI': Bitstring that was clocked into the DR register. | |
39 | - 'DR TDO': Bitstring that was clocked out of the DR register. | |
40 | ||
41 | All bitstrings are a list consisting of two items. The first is a sequence | |
42 | of '1' and '0' characters (the right-most character is the LSB. Example: | |
43 | '01110001', where 1 is the LSB). The second item is a list of ss/es values | |
44 | for each bit that is in the bitstring. | |
45 | ''' | |
46 | ||
47 | jtag_states = [ | |
48 | # Intro "tree" | |
49 | 'TEST-LOGIC-RESET', 'RUN-TEST/IDLE', | |
50 | # DR "tree" | |
51 | 'SELECT-DR-SCAN', 'CAPTURE-DR', 'UPDATE-DR', 'PAUSE-DR', | |
52 | 'SHIFT-DR', 'EXIT1-DR', 'EXIT2-DR', | |
53 | # IR "tree" | |
54 | 'SELECT-IR-SCAN', 'CAPTURE-IR', 'UPDATE-IR', 'PAUSE-IR', | |
55 | 'SHIFT-IR', 'EXIT1-IR', 'EXIT2-IR', | |
56 | ] | |
57 | ||
58 | class Decoder(srd.Decoder): | |
59 | api_version = 3 | |
e349cbe9 KH |
60 | id = 'cjtag' |
61 | name = 'cJTAG' | |
62 | longname = 'Compact Joint Test Action Group (IEEE 1149.7)' | |
e88f6375 UH |
63 | desc = 'Protocol for testing, debugging, and flashing ICs.' |
64 | license = 'gplv2+' | |
65 | inputs = ['logic'] | |
66 | outputs = ['jtag'] | |
67 | tags = ['Debug/trace'] | |
68 | channels = ( | |
d178c8d1 UH |
69 | {'id': 'tckc', 'name': 'TCKC', 'desc': 'Test clock'}, |
70 | {'id': 'tmsc', 'name': 'TMSC', 'desc': 'Test mode select'}, | |
e88f6375 | 71 | ) |
e88f6375 UH |
72 | annotations = tuple([tuple([s.lower(), s]) for s in jtag_states]) + ( \ |
73 | ('bit-tdi', 'Bit (TDI)'), | |
74 | ('bit-tdo', 'Bit (TDO)'), | |
75 | ('bitstring-tdi', 'Bitstring (TDI)'), | |
76 | ('bitstring-tdo', 'Bitstring (TDO)'), | |
e349cbe9 KH |
77 | ('bit-tms', 'Bit (TMS)'), |
78 | ('state-tapc', 'TAPC state'), | |
e88f6375 UH |
79 | ) |
80 | annotation_rows = ( | |
81 | ('bits-tdi', 'Bits (TDI)', (16,)), | |
82 | ('bits-tdo', 'Bits (TDO)', (17,)), | |
83 | ('bitstrings-tdi', 'Bitstrings (TDI)', (18,)), | |
84 | ('bitstrings-tdo', 'Bitstrings (TDO)', (19,)), | |
0eac7149 UH |
85 | ('bits-tms', 'Bits (TMS)', (20,)), |
86 | ('states-tapc', 'TAPC states', (21,)), | |
e88f6375 UH |
87 | ('states', 'States', tuple(range(15 + 1))), |
88 | ) | |
89 | ||
90 | def __init__(self): | |
91 | self.reset() | |
92 | ||
93 | def reset(self): | |
94 | # self.state = 'TEST-LOGIC-RESET' | |
95 | self.state = 'RUN-TEST/IDLE' | |
e349cbe9 KH |
96 | self.cjtagstate = '4-WIRE' |
97 | self.oldcjtagstate = None | |
98 | self.escape_edges = 0 | |
99 | self.oaclen = 0 | |
100 | self.oldtms = 0 | |
101 | self.oacp = 0 | |
102 | self.oscan1cycle = 0 | |
e88f6375 UH |
103 | self.oldstate = None |
104 | self.bits_tdi = [] | |
105 | self.bits_tdo = [] | |
106 | self.bits_samplenums_tdi = [] | |
107 | self.bits_samplenums_tdo = [] | |
108 | self.ss_item = self.es_item = None | |
109 | self.ss_bitstring = self.es_bitstring = None | |
110 | self.saved_item = None | |
111 | self.first = True | |
112 | self.first_bit = True | |
113 | ||
114 | def start(self): | |
115 | self.out_python = self.register(srd.OUTPUT_PYTHON) | |
116 | self.out_ann = self.register(srd.OUTPUT_ANN) | |
117 | ||
118 | def putx(self, data): | |
119 | self.put(self.ss_item, self.es_item, self.out_ann, data) | |
120 | ||
121 | def putp(self, data): | |
122 | self.put(self.ss_item, self.es_item, self.out_python, data) | |
123 | ||
124 | def putx_bs(self, data): | |
125 | self.put(self.ss_bitstring, self.es_bitstring, self.out_ann, data) | |
126 | ||
127 | def putp_bs(self, data): | |
128 | self.put(self.ss_bitstring, self.es_bitstring, self.out_python, data) | |
129 | ||
130 | def advance_state_machine(self, tms): | |
131 | self.oldstate = self.state | |
132 | ||
e349cbe9 | 133 | if self.cjtagstate.startswith('CJTAG-'): |
d315969c | 134 | self.oacp += 1 |
38b7a482 | 135 | if self.oacp > 4 and self.oaclen == 12: |
e349cbe9 KH |
136 | self.cjtagstate = 'CJTAG-EC' |
137 | ||
38b7a482 | 138 | if self.oacp == 8 and tms == 0: |
e349cbe9 | 139 | self.oaclen = 36 |
38b7a482 | 140 | if self.oacp > 8 and self.oaclen == 36: |
e349cbe9 | 141 | self.cjtagstate = 'CJTAG-SPARE' |
38b7a482 | 142 | if self.oacp > 13 and self.oaclen == 36: |
e349cbe9 | 143 | self.cjtagstate = 'CJTAG-TPDEL' |
38b7a482 | 144 | if self.oacp > 16 and self.oaclen == 36: |
e349cbe9 | 145 | self.cjtagstate = 'CJTAG-TPREV' |
38b7a482 | 146 | if self.oacp > 18 and self.oaclen == 36: |
e349cbe9 | 147 | self.cjtagstate = 'CJTAG-TPST' |
38b7a482 | 148 | if self.oacp > 23 and self.oaclen == 36: |
e349cbe9 | 149 | self.cjtagstate = 'CJTAG-RDYC' |
38b7a482 | 150 | if self.oacp > 25 and self.oaclen == 36: |
e349cbe9 | 151 | self.cjtagstate = 'CJTAG-DLYC' |
38b7a482 | 152 | if self.oacp > 27 and self.oaclen == 36: |
e349cbe9 KH |
153 | self.cjtagstate = 'CJTAG-SCNFMT' |
154 | ||
38b7a482 | 155 | if self.oacp > 8 and self.oaclen == 12: |
e349cbe9 | 156 | self.cjtagstate = 'CJTAG-CP' |
38b7a482 | 157 | if self.oacp > 32 and self.oaclen == 36: |
e349cbe9 KH |
158 | self.cjtagstate = 'CJTAG-CP' |
159 | ||
38b7a482 | 160 | if self.oacp > self.oaclen: |
e349cbe9 KH |
161 | self.cjtagstate = 'OSCAN1' |
162 | self.oscan1cycle = 1 | |
163 | # Because Nuclei cJTAG device asserts a reset during cJTAG | |
164 | # online activating. | |
165 | self.state = 'TEST-LOGIC-RESET' | |
166 | return | |
167 | ||
e88f6375 UH |
168 | # Intro "tree" |
169 | if self.state == 'TEST-LOGIC-RESET': | |
170 | self.state = 'TEST-LOGIC-RESET' if (tms) else 'RUN-TEST/IDLE' | |
171 | elif self.state == 'RUN-TEST/IDLE': | |
172 | self.state = 'SELECT-DR-SCAN' if (tms) else 'RUN-TEST/IDLE' | |
173 | ||
174 | # DR "tree" | |
175 | elif self.state == 'SELECT-DR-SCAN': | |
176 | self.state = 'SELECT-IR-SCAN' if (tms) else 'CAPTURE-DR' | |
177 | elif self.state == 'CAPTURE-DR': | |
178 | self.state = 'EXIT1-DR' if (tms) else 'SHIFT-DR' | |
179 | elif self.state == 'SHIFT-DR': | |
180 | self.state = 'EXIT1-DR' if (tms) else 'SHIFT-DR' | |
181 | elif self.state == 'EXIT1-DR': | |
182 | self.state = 'UPDATE-DR' if (tms) else 'PAUSE-DR' | |
183 | elif self.state == 'PAUSE-DR': | |
184 | self.state = 'EXIT2-DR' if (tms) else 'PAUSE-DR' | |
185 | elif self.state == 'EXIT2-DR': | |
186 | self.state = 'UPDATE-DR' if (tms) else 'SHIFT-DR' | |
187 | elif self.state == 'UPDATE-DR': | |
188 | self.state = 'SELECT-DR-SCAN' if (tms) else 'RUN-TEST/IDLE' | |
189 | ||
190 | # IR "tree" | |
191 | elif self.state == 'SELECT-IR-SCAN': | |
192 | self.state = 'TEST-LOGIC-RESET' if (tms) else 'CAPTURE-IR' | |
193 | elif self.state == 'CAPTURE-IR': | |
194 | self.state = 'EXIT1-IR' if (tms) else 'SHIFT-IR' | |
195 | elif self.state == 'SHIFT-IR': | |
196 | self.state = 'EXIT1-IR' if (tms) else 'SHIFT-IR' | |
197 | elif self.state == 'EXIT1-IR': | |
198 | self.state = 'UPDATE-IR' if (tms) else 'PAUSE-IR' | |
199 | elif self.state == 'PAUSE-IR': | |
200 | self.state = 'EXIT2-IR' if (tms) else 'PAUSE-IR' | |
201 | elif self.state == 'EXIT2-IR': | |
202 | self.state = 'UPDATE-IR' if (tms) else 'SHIFT-IR' | |
203 | elif self.state == 'UPDATE-IR': | |
204 | self.state = 'SELECT-DR-SCAN' if (tms) else 'RUN-TEST/IDLE' | |
205 | ||
d178c8d1 | 206 | def handle_rising_tckc_edge(self, tdi, tdo, tck, tms): |
e88f6375 UH |
207 | |
208 | # Rising TCK edges always advance the state machine. | |
209 | self.advance_state_machine(tms) | |
210 | ||
211 | if self.first: | |
212 | # Save the start sample and item for later (no output yet). | |
213 | self.ss_item = self.samplenum | |
214 | self.first = False | |
215 | else: | |
216 | # Output the saved item (from the last CLK edge to the current). | |
217 | self.es_item = self.samplenum | |
218 | # Output the old state (from last rising TCK edge to current one). | |
219 | self.putx([jtag_states.index(self.oldstate), [self.oldstate]]) | |
220 | self.putp(['NEW STATE', self.state]) | |
221 | ||
e349cbe9 KH |
222 | self.putx([21, [self.oldcjtagstate]]) |
223 | if (self.oldcjtagstate.startswith('CJTAG-')): | |
224 | self.putx([20, [str(self.oldtms)]]) | |
225 | self.oldtms = tms | |
226 | ||
e88f6375 UH |
227 | # Upon SHIFT-*/EXIT1-* collect the current TDI/TDO values. |
228 | if self.oldstate.startswith('SHIFT-') or \ | |
229 | self.oldstate.startswith('EXIT1-'): | |
230 | if self.first_bit: | |
231 | self.ss_bitstring = self.samplenum | |
232 | self.first_bit = False | |
233 | else: | |
234 | self.putx([16, [str(self.bits_tdi[0])]]) | |
235 | self.putx([17, [str(self.bits_tdo[0])]]) | |
236 | # Use self.samplenum as ES of the previous bit. | |
237 | self.bits_samplenums_tdi[0][1] = self.samplenum | |
238 | self.bits_samplenums_tdo[0][1] = self.samplenum | |
239 | ||
240 | self.bits_tdi.insert(0, tdi) | |
241 | self.bits_tdo.insert(0, tdo) | |
242 | ||
243 | # Use self.samplenum as SS of the current bit. | |
244 | self.bits_samplenums_tdi.insert(0, [self.samplenum, -1]) | |
245 | self.bits_samplenums_tdo.insert(0, [self.samplenum, -1]) | |
246 | ||
247 | # Output all TDI/TDO bits if we just switched to UPDATE-*. | |
248 | if self.state.startswith('UPDATE-'): | |
249 | ||
250 | self.es_bitstring = self.samplenum | |
251 | ||
252 | t = self.state[-2:] + ' TDI' | |
253 | b = ''.join(map(str, self.bits_tdi[1:])) | |
254 | h = ' (0x%x' % int('0b0' + b, 2) + ')' | |
255 | s = t + ': ' + b + h + ', ' + str(len(self.bits_tdi[1:])) + ' bits' | |
256 | self.putx_bs([18, [s]]) | |
257 | self.putp_bs([t, [b, self.bits_samplenums_tdi[1:]]]) | |
258 | self.bits_tdi = [] | |
259 | self.bits_samplenums_tdi = [] | |
260 | ||
261 | t = self.state[-2:] + ' TDO' | |
262 | b = ''.join(map(str, self.bits_tdo[1:])) | |
263 | h = ' (0x%x' % int('0b0' + b, 2) + ')' | |
264 | s = t + ': ' + b + h + ', ' + str(len(self.bits_tdo[1:])) + ' bits' | |
265 | self.putx_bs([19, [s]]) | |
266 | self.putp_bs([t, [b, self.bits_samplenums_tdo[1:]]]) | |
267 | self.bits_tdo = [] | |
268 | self.bits_samplenums_tdo = [] | |
269 | ||
270 | self.first_bit = True | |
271 | ||
272 | self.ss_bitstring = self.samplenum | |
273 | ||
274 | self.ss_item = self.samplenum | |
275 | ||
d178c8d1 | 276 | def handle_tmsc_edge(self): |
d315969c | 277 | self.escape_edges += 1 |
e349cbe9 | 278 | |
89cc0719 | 279 | def handle_tapc_state(self): |
e349cbe9 KH |
280 | self.oldcjtagstate = self.cjtagstate |
281 | ||
282 | if self.escape_edges >= 8: | |
283 | self.cjtagstate = '4-WIRE' | |
284 | if self.escape_edges == 6: | |
285 | self.cjtagstate = 'CJTAG-OAC' | |
286 | self.oacp = 0 | |
287 | self.oaclen = 12 | |
288 | ||
289 | self.escape_edges = 0 | |
290 | ||
e88f6375 | 291 | def decode(self): |
e349cbe9 KH |
292 | tdi_real = 0 |
293 | tms_real = 0 | |
294 | tdo_real = 0 | |
295 | ||
e88f6375 | 296 | while True: |
d178c8d1 UH |
297 | # Wait for a rising edge on TCKC. |
298 | tckc, tmsc = self.wait({0: 'r'}) | |
89cc0719 | 299 | self.handle_tapc_state() |
e349cbe9 | 300 | |
38b7a482 UH |
301 | if self.cjtagstate == 'OSCAN1': |
302 | if self.oscan1cycle == 0: # nTDI | |
d178c8d1 | 303 | tdi_real = 1 if (tmsc == 0) else 0 |
e349cbe9 | 304 | self.oscan1cycle = 1 |
38b7a482 | 305 | elif self.oscan1cycle == 1: # TMS |
d178c8d1 | 306 | tms_real = tmsc |
e349cbe9 | 307 | self.oscan1cycle = 2 |
38b7a482 | 308 | elif self.oscan1cycle == 2: # TDO |
d178c8d1 UH |
309 | tdo_real = tmsc |
310 | self.handle_rising_tckc_edge(tdi_real, tdo_real, tckc, tms_real) | |
e349cbe9 KH |
311 | self.oscan1cycle = 0 |
312 | else: | |
d178c8d1 | 313 | self.handle_rising_tckc_edge(None, None, tckc, tmsc) |
e349cbe9 | 314 | |
d178c8d1 UH |
315 | while (tckc == 1): |
316 | tckc, tmsc_n = self.wait([{0: 'f'}, {1: 'e'}]) | |
317 | if tmsc_n != tmsc: | |
318 | tmsc = tmsc_n | |
319 | self.handle_tmsc_edge() |