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702fa251 | 1 | ## |
50bd5d25 | 2 | ## This file is part of the libsigrokdecode project. |
702fa251 | 3 | ## |
e20f455c | 4 | ## Copyright (C) 2012-2013 Uwe Hermann <uwe@hermann-uwe.de> |
702fa251 UH |
5 | ## |
6 | ## This program is free software; you can redistribute it and/or modify | |
7 | ## it under the terms of the GNU General Public License as published by | |
8 | ## the Free Software Foundation; either version 2 of the License, or | |
9 | ## (at your option) any later version. | |
10 | ## | |
11 | ## This program is distributed in the hope that it will be useful, | |
12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | ## GNU General Public License for more details. | |
15 | ## | |
16 | ## You should have received a copy of the GNU General Public License | |
17 | ## along with this program; if not, write to the Free Software | |
18 | ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
19 | ## | |
702fa251 UH |
20 | |
21 | import sigrokdecode as srd | |
22 | ||
23 | class Decoder(srd.Decoder): | |
24 | api_version = 1 | |
25 | id = 'can' | |
26 | name = 'CAN' | |
9e1437a0 | 27 | longname = 'Controller Area Network' |
702fa251 UH |
28 | desc = 'Field bus protocol for distributed realtime control.' |
29 | license = 'gplv2+' | |
30 | inputs = ['logic'] | |
31 | outputs = ['can'] | |
32 | probes = [ | |
33 | {'id': 'can_rx', 'name': 'CAN RX', 'desc': 'CAN bus line'}, | |
34 | ] | |
35 | optional_probes = [] | |
36 | options = { | |
37 | 'bitrate': ['Bitrate', 1000000], # 1Mbit/s | |
38 | 'sample_point': ['Sample point', 70], # 70% | |
39 | } | |
40 | annotations = [ | |
9f2f42c0 UH |
41 | ['data', 'CAN payload data'], |
42 | ['sof', 'Start of frame'], | |
43 | ['eof', 'End of frame'], | |
44 | ['id', 'Identifier'], | |
45 | ['ext-id', 'Extended identifier'], | |
46 | ['full-id', 'Full identifier'], | |
47 | ['ide', 'Identifier extension bit'], | |
48 | ['reserved-bit', 'Reserved bit 0 and 1'], | |
49 | ['rtr', 'Remote transmission request'], | |
50 | ['srr', 'Substitute remote request'], | |
51 | ['dlc', 'Data length count'], | |
52 | ['crc-sequence', 'CRC sequence'], | |
53 | ['crc-delimiter', 'CRC delimiter'], | |
54 | ['ack-slot', 'ACK slot'], | |
55 | ['ack-delimiter', 'ACK delimiter'], | |
56 | ['stuff-bit', 'Stuff bit'], | |
57 | ['warnings', 'Human-readable warnings'], | |
702fa251 UH |
58 | ] |
59 | ||
60 | def __init__(self, **kwargs): | |
f372d597 | 61 | self.samplerate = None |
702fa251 UH |
62 | self.reset_variables() |
63 | ||
f372d597 | 64 | def start(self): |
c515eed7 | 65 | # self.out_python = self.register(srd.OUTPUT_PYTHON) |
be465111 | 66 | self.out_ann = self.register(srd.OUTPUT_ANN) |
702fa251 | 67 | |
f372d597 BV |
68 | def metadata(self, key, value): |
69 | if key == srd.SRD_CONF_SAMPLERATE: | |
70 | self.samplerate = value | |
71 | self.bit_width = float(self.samplerate) / float(self.options['bitrate']) | |
72 | self.bitpos = (self.bit_width / 100.0) * self.options['sample_point'] | |
702fa251 | 73 | |
4b1813b4 UH |
74 | # Generic helper for CAN bit annotations. |
75 | def putg(self, ss, es, data): | |
76 | left, right = int(self.bitpos), int(self.bit_width - self.bitpos) | |
77 | self.put(ss - left, es + right, self.out_ann, data) | |
78 | ||
79 | # Single-CAN-bit annotation using the current samplenum. | |
e20f455c | 80 | def putx(self, data): |
4b1813b4 UH |
81 | self.putg(self.samplenum, self.samplenum, data) |
82 | ||
83 | # Single-CAN-bit annotation using the samplenum of CAN bit 12. | |
84 | def put12(self, data): | |
85 | self.putg(self.ss_bit12, self.ss_bit12, data) | |
86 | ||
87 | # Multi-CAN-bit annotation from self.ss_block to current samplenum. | |
88 | def putb(self, data): | |
89 | self.putg(self.ss_block, self.samplenum, data) | |
e20f455c | 90 | |
702fa251 UH |
91 | def reset_variables(self): |
92 | self.state = 'IDLE' | |
93 | self.sof = self.frame_type = self.dlc = None | |
94 | self.rawbits = [] # All bits, including stuff bits | |
95 | self.bits = [] # Only actual CAN frame bits (no stuff bits) | |
96 | self.curbit = 0 # Current bit of CAN frame (bit 0 == SOF) | |
97 | self.last_databit = 999 # Positive value that bitnum+x will never match | |
4b1813b4 UH |
98 | self.ss_block = None |
99 | self.ss_bit12 = None | |
100 | self.ss_databytebits = [] | |
702fa251 UH |
101 | |
102 | # Return True if we reached the desired bit position, False otherwise. | |
103 | def reached_bit(self, bitnum): | |
104 | bitpos = int(self.sof + (self.bit_width * bitnum) + self.bitpos) | |
105 | if self.samplenum >= bitpos: | |
106 | return True | |
107 | return False | |
108 | ||
109 | def is_stuff_bit(self): | |
110 | # CAN uses NRZ encoding and bit stuffing. | |
111 | # After 5 identical bits, a stuff bit of opposite value is added. | |
112 | last_6_bits = self.rawbits[-6:] | |
113 | if last_6_bits not in ([0, 0, 0, 0, 0, 1], [1, 1, 1, 1, 1, 0]): | |
114 | return False | |
115 | ||
116 | # Stuff bit. Keep it in self.rawbits, but drop it from self.bits. | |
74c9bb3c UH |
117 | self.putx([15, ['Stuff bit: %d' % self.rawbits[-1], |
118 | 'SB: %d' % self.rawbits[-1], 'SB']]) | |
702fa251 UH |
119 | self.bits.pop() # Drop last bit. |
120 | return True | |
121 | ||
122 | def is_valid_crc(self, crc_bits): | |
123 | return True # TODO | |
124 | ||
125 | def decode_error_frame(self, bits): | |
126 | pass # TODO | |
127 | ||
128 | def decode_overload_frame(self, bits): | |
129 | pass # TODO | |
130 | ||
131 | # Both standard and extended frames end with CRC, CRC delimiter, ACK, | |
132 | # ACK delimiter, and EOF fields. Handle them in a common function. | |
133 | # Returns True if the frame ended (EOF), False otherwise. | |
134 | def decode_frame_end(self, can_rx, bitnum): | |
135 | ||
4b1813b4 UH |
136 | # Remember start of CRC sequence (see below). |
137 | if bitnum == (self.last_databit + 1): | |
138 | self.ss_block = self.samplenum | |
139 | ||
702fa251 | 140 | # CRC sequence (15 bits) |
4b1813b4 | 141 | elif bitnum == (self.last_databit + 15): |
702fa251 UH |
142 | x = self.last_databit + 1 |
143 | crc_bits = self.bits[x:x + 15 + 1] | |
144 | self.crc = int(''.join(str(d) for d in crc_bits), 2) | |
74c9bb3c UH |
145 | self.putb([11, ['CRC sequence: 0x%04x' % self.crc, |
146 | 'CRC: 0x%04x' % self.crc, 'CRC']]) | |
702fa251 | 147 | if not self.is_valid_crc(crc_bits): |
74c9bb3c | 148 | self.putb([16, ['CRC is invalid']]) |
702fa251 UH |
149 | |
150 | # CRC delimiter bit (recessive) | |
151 | elif bitnum == (self.last_databit + 16): | |
74c9bb3c UH |
152 | self.putx([12, ['CRC delimiter: %d' % can_rx, |
153 | 'CRC d: %d' % can_rx, 'CRC d']]) | |
702fa251 UH |
154 | |
155 | # ACK slot bit (dominant: ACK, recessive: NACK) | |
156 | elif bitnum == (self.last_databit + 17): | |
157 | ack = 'ACK' if can_rx == 0 else 'NACK' | |
74c9bb3c | 158 | self.putx([13, ['ACK slot: %s' % ack, 'ACK s: %s' % ack, 'ACK s']]) |
702fa251 UH |
159 | |
160 | # ACK delimiter bit (recessive) | |
161 | elif bitnum == (self.last_databit + 18): | |
74c9bb3c UH |
162 | self.putx([14, ['ACK delimiter: %d' % can_rx, |
163 | 'ACK d: %d' % can_rx, 'ACK d']]) | |
702fa251 | 164 | |
4b1813b4 UH |
165 | # Remember start of EOF (see below). |
166 | elif bitnum == (self.last_databit + 19): | |
167 | self.ss_block = self.samplenum | |
168 | ||
702fa251 UH |
169 | # End of frame (EOF), 7 recessive bits |
170 | elif bitnum == (self.last_databit + 25): | |
74c9bb3c | 171 | self.putb([2, ['End of frame', 'EOF', 'E']]) |
702fa251 UH |
172 | self.reset_variables() |
173 | return True | |
174 | ||
175 | return False | |
176 | ||
177 | # Returns True if the frame ended (EOF), False otherwise. | |
178 | def decode_standard_frame(self, can_rx, bitnum): | |
179 | ||
180 | # Bit 14: RB0 (reserved bit) | |
181 | # Has to be sent dominant, but receivers should accept recessive too. | |
182 | if bitnum == 14: | |
74c9bb3c | 183 | self.putx([7, ['Reserved bit 0: %d' % can_rx, |
534ae912 | 184 | 'RB0: %d' % can_rx, 'RB0']]) |
702fa251 UH |
185 | |
186 | # Bit 12: Remote transmission request (RTR) bit | |
187 | # Data frame: dominant, remote frame: recessive | |
188 | # Remote frames do not contain a data field. | |
189 | rtr = 'remote' if self.bits[12] == 1 else 'data' | |
74c9bb3c | 190 | self.put12([8, ['Remote transmission request: %s frame' % rtr, |
534ae912 | 191 | 'RTR: %s frame' % rtr, 'RTR']]) |
4b1813b4 UH |
192 | |
193 | # Remember start of DLC (see below). | |
194 | elif bitnum == 15: | |
195 | self.ss_block = self.samplenum | |
702fa251 UH |
196 | |
197 | # Bits 15-18: Data length code (DLC), in number of bytes (0-8). | |
198 | elif bitnum == 18: | |
199 | self.dlc = int(''.join(str(d) for d in self.bits[15:18 + 1]), 2) | |
74c9bb3c UH |
200 | self.putb([10, ['Data length code: %d' % self.dlc, |
201 | 'DLC: %d' % self.dlc, 'DLC']]) | |
702fa251 UH |
202 | self.last_databit = 18 + (self.dlc * 8) |
203 | ||
4b1813b4 UH |
204 | # Remember all databyte bits, except the very last one. |
205 | elif bitnum in range(19, self.last_databit): | |
206 | self.ss_databytebits.append(self.samplenum) | |
207 | ||
702fa251 UH |
208 | # Bits 19-X: Data field (0-8 bytes, depending on DLC) |
209 | # The bits within a data byte are transferred MSB-first. | |
210 | elif bitnum == self.last_databit: | |
4b1813b4 | 211 | self.ss_databytebits.append(self.samplenum) # Last databyte bit. |
702fa251 UH |
212 | for i in range(self.dlc): |
213 | x = 18 + (8 * i) + 1 | |
214 | b = int(''.join(str(d) for d in self.bits[x:x + 8]), 2) | |
4b1813b4 UH |
215 | ss = self.ss_databytebits[i * 8] |
216 | es = self.ss_databytebits[((i + 1) * 8) - 1] | |
534ae912 UH |
217 | self.putg(ss, es, [0, ['Data byte %d: 0x%02x' % (i, b), |
218 | 'DB %d: 0x%02x' % (i, b), 'DB']]) | |
4b1813b4 | 219 | self.ss_databytebits = [] |
702fa251 UH |
220 | |
221 | elif bitnum > self.last_databit: | |
222 | return self.decode_frame_end(can_rx, bitnum) | |
223 | ||
224 | return False | |
225 | ||
226 | # Returns True if the frame ended (EOF), False otherwise. | |
227 | def decode_extended_frame(self, can_rx, bitnum): | |
228 | ||
4b1813b4 UH |
229 | # Remember start of EID (see below). |
230 | if bitnum == 14: | |
231 | self.ss_block = self.samplenum | |
232 | ||
702fa251 | 233 | # Bits 14-31: Extended identifier (EID[17..0]) |
4b1813b4 | 234 | elif bitnum == 31: |
702fa251 | 235 | self.eid = int(''.join(str(d) for d in self.bits[14:]), 2) |
534ae912 | 236 | s = '%d (0x%x)' % (self.eid, self.eid) |
74c9bb3c | 237 | self.putb([4, ['Extended Identifier: %s' % s, |
534ae912 | 238 | 'Extended ID: %s' % s, 'Extended ID', 'EID']]) |
702fa251 UH |
239 | |
240 | self.fullid = self.id << 18 | self.eid | |
534ae912 | 241 | s = '%d (0x%x)' % (self.fullid, self.fullid) |
74c9bb3c | 242 | self.putb([5, ['Full Identifier: %s' % s, 'Full ID: %s' % s, |
534ae912 | 243 | 'Full ID', 'FID']]) |
702fa251 UH |
244 | |
245 | # Bit 12: Substitute remote request (SRR) bit | |
74c9bb3c | 246 | self.put12([9, ['Substitute remote request: %d' % self.bits[12], |
534ae912 | 247 | 'SRR: %d' % self.bits[12], 'SRR']]) |
702fa251 UH |
248 | |
249 | # Bit 32: Remote transmission request (RTR) bit | |
250 | # Data frame: dominant, remote frame: recessive | |
251 | # Remote frames do not contain a data field. | |
252 | if bitnum == 32: | |
253 | rtr = 'remote' if can_rx == 1 else 'data' | |
74c9bb3c | 254 | self.putx([8, ['Remote transmission request: %s frame' % rtr, |
534ae912 | 255 | 'RTR: %s frame' % rtr, 'RTR']]) |
702fa251 UH |
256 | |
257 | # Bit 33: RB1 (reserved bit) | |
258 | elif bitnum == 33: | |
74c9bb3c | 259 | self.putx([7, ['Reserved bit 1: %d' % can_rx, |
534ae912 | 260 | 'RB1: %d' % can_rx, 'RB1']]) |
702fa251 UH |
261 | |
262 | # Bit 34: RB0 (reserved bit) | |
263 | elif bitnum == 34: | |
74c9bb3c | 264 | self.putx([7, ['Reserved bit 0: %d' % can_rx, |
534ae912 | 265 | 'RB0: %d' % can_rx, 'RB0']]) |
702fa251 | 266 | |
4b1813b4 UH |
267 | # Remember start of DLC (see below). |
268 | elif bitnum == 35: | |
269 | self.ss_block = self.samplenum | |
270 | ||
702fa251 UH |
271 | # Bits 35-38: Data length code (DLC), in number of bytes (0-8). |
272 | elif bitnum == 38: | |
273 | self.dlc = int(''.join(str(d) for d in self.bits[35:38 + 1]), 2) | |
74c9bb3c UH |
274 | self.putb([10, ['Data length code: %d' % self.dlc, |
275 | 'DLC: %d' % self.dlc, 'DLC']]) | |
702fa251 UH |
276 | self.last_databit = 38 + (self.dlc * 8) |
277 | ||
4b1813b4 UH |
278 | # Remember all databyte bits, except the very last one. |
279 | elif bitnum in range(39, self.last_databit): | |
280 | self.ss_databytebits.append(self.samplenum) | |
281 | ||
702fa251 UH |
282 | # Bits 39-X: Data field (0-8 bytes, depending on DLC) |
283 | # The bits within a data byte are transferred MSB-first. | |
284 | elif bitnum == self.last_databit: | |
4b1813b4 | 285 | self.ss_databytebits.append(self.samplenum) # Last databyte bit. |
702fa251 UH |
286 | for i in range(self.dlc): |
287 | x = 38 + (8 * i) + 1 | |
288 | b = int(''.join(str(d) for d in self.bits[x:x + 8]), 2) | |
4b1813b4 UH |
289 | ss = self.ss_databytebits[i * 8] |
290 | es = self.ss_databytebits[((i + 1) * 8) - 1] | |
534ae912 UH |
291 | self.putg(ss, es, [0, ['Data byte %d: 0x%02x' % (i, b), |
292 | 'DB %d: 0x%02x' % (i, b), 'DB']]) | |
4b1813b4 | 293 | self.ss_databytebits = [] |
702fa251 UH |
294 | |
295 | elif bitnum > self.last_databit: | |
296 | return self.decode_frame_end(can_rx, bitnum) | |
297 | ||
298 | return False | |
299 | ||
300 | def handle_bit(self, can_rx): | |
301 | self.rawbits.append(can_rx) | |
302 | self.bits.append(can_rx) | |
303 | ||
304 | # Get the index of the current CAN frame bit (without stuff bits). | |
305 | bitnum = len(self.bits) - 1 | |
306 | ||
307 | # For debugging. | |
e20f455c UH |
308 | # self.putx([0, ['Bit %d (CAN bit %d): %d' % \ |
309 | # (self.curbit, bitnum, can_rx)]]) | |
702fa251 UH |
310 | |
311 | # If this is a stuff bit, remove it from self.bits and ignore it. | |
312 | if self.is_stuff_bit(): | |
313 | self.curbit += 1 # Increase self.curbit (bitnum is not affected). | |
314 | return | |
315 | ||
316 | # Bit 0: Start of frame (SOF) bit | |
317 | if bitnum == 0: | |
318 | if can_rx == 0: | |
74c9bb3c | 319 | self.putx([1, ['Start of frame', 'SOF', 'S']]) |
702fa251 | 320 | else: |
74c9bb3c | 321 | self.putx([16, ['Start of frame (SOF) must be a dominant bit']]) |
702fa251 | 322 | |
4b1813b4 UH |
323 | # Remember start of ID (see below). |
324 | elif bitnum == 1: | |
325 | self.ss_block = self.samplenum | |
326 | ||
702fa251 UH |
327 | # Bits 1-11: Identifier (ID[10..0]) |
328 | # The bits ID[10..4] must NOT be all recessive. | |
329 | elif bitnum == 11: | |
330 | self.id = int(''.join(str(d) for d in self.bits[1:]), 2) | |
534ae912 | 331 | s = '%d (0x%x)' % (self.id, self.id), |
74c9bb3c | 332 | self.putb([3, ['Identifier: %s' % s, 'ID: %s' % s, 'ID']]) |
702fa251 UH |
333 | |
334 | # RTR or SRR bit, depending on frame type (gets handled later). | |
335 | elif bitnum == 12: | |
4b1813b4 UH |
336 | # self.putx([0, ['RTR/SRR: %d' % can_rx]]) # Debug only. |
337 | self.ss_bit12 = self.samplenum | |
702fa251 UH |
338 | |
339 | # Bit 13: Identifier extension (IDE) bit | |
340 | # Standard frame: dominant, extended frame: recessive | |
341 | elif bitnum == 13: | |
342 | ide = self.frame_type = 'standard' if can_rx == 0 else 'extended' | |
74c9bb3c | 343 | self.putx([6, ['Identifier extension bit: %s frame' % ide, |
534ae912 | 344 | 'IDE: %s frame' % ide, 'IDE']]) |
702fa251 UH |
345 | |
346 | # Bits 14-X: Frame-type dependent, passed to the resp. handlers. | |
347 | elif bitnum >= 14: | |
348 | if self.frame_type == 'standard': | |
349 | done = self.decode_standard_frame(can_rx, bitnum) | |
350 | else: | |
351 | done = self.decode_extended_frame(can_rx, bitnum) | |
352 | ||
353 | # The handlers return True if a frame ended (EOF). | |
354 | if done: | |
355 | return | |
356 | ||
357 | # After a frame there are 3 intermission bits (recessive). | |
358 | # After these bits, the bus is considered free. | |
359 | ||
360 | self.curbit += 1 | |
361 | ||
362 | def decode(self, ss, es, data): | |
f372d597 BV |
363 | if self.samplerate is None: |
364 | raise Exception("Cannot decode without samplerate.") | |
702fa251 UH |
365 | for (self.samplenum, pins) in data: |
366 | ||
367 | (can_rx,) = pins | |
368 | ||
369 | # State machine. | |
370 | if self.state == 'IDLE': | |
371 | # Wait for a dominant state (logic 0) on the bus. | |
372 | if can_rx == 1: | |
373 | continue | |
374 | self.sof = self.samplenum | |
702fa251 UH |
375 | self.state = 'GET BITS' |
376 | elif self.state == 'GET BITS': | |
377 | # Wait until we're in the correct bit/sampling position. | |
378 | if not self.reached_bit(self.curbit): | |
379 | continue | |
380 | self.handle_bit(can_rx) | |
381 | else: | |
382 | raise Exception("Invalid state: %s" % self.state) | |
383 |