For low sampling speeds (up to 25MHz) DSLogic offers a streaming mode where
samples are sent directly to the USB interface, like a fx2lafw device.
For high sampling speeds (up to 400MHz) only buffer mode is supported.
This commit allows the user to set which mode should be used. The configuration
is done by using SR_CONF_CONTINUOUS.
Signed-off-by: Diego Asanza <redacted>
};
static const uint32_t dslogic_devopts[] = {
};
static const uint32_t dslogic_devopts[] = {
- SR_CONF_CONTINUOUS | SR_CONF_SET,
+ SR_CONF_CONTINUOUS | SR_CONF_SET | SR_CONF_GET,
SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
SR_CONF_VOLTAGE_THRESHOLD | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
SR_CONF_CONN | SR_CONF_GET,
SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
SR_CONF_VOLTAGE_THRESHOLD | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
SR_CONF_CONN | SR_CONF_GET,
case SR_CONF_EXTERNAL_CLOCK:
*data = g_variant_new_boolean(devc->dslogic_external_clock);
break;
case SR_CONF_EXTERNAL_CLOCK:
*data = g_variant_new_boolean(devc->dslogic_external_clock);
break;
+ case SR_CONF_CONTINUOUS:
+ *data = g_variant_new_boolean(devc->dslogic_continuous_mode);
+ break;
default:
return SR_ERR_NA;
}
default:
return SR_ERR_NA;
}
case SR_CONF_EXTERNAL_CLOCK:
devc->dslogic_external_clock = g_variant_get_boolean(data);
break;
case SR_CONF_EXTERNAL_CLOCK:
devc->dslogic_external_clock = g_variant_get_boolean(data);
break;
+ case SR_CONF_CONTINUOUS:
+ devc->dslogic_continuous_mode = g_variant_get_boolean(data);
+ break;
default:
ret = SR_ERR_NA;
}
default:
ret = SR_ERR_NA;
}
* 13 1 = loopback test mode
* 12 1 = stream mode
* 11 1 = serial trigger
* 13 1 = loopback test mode
* 12 1 = stream mode
* 11 1 = serial trigger
* 7 1 = analog mode
* 6 1 = samplerate 400MHz
* 5 1 = samplerate 200MHz or analog mode
* 7 1 = analog mode
* 6 1 = samplerate 400MHz
* 5 1 = samplerate 200MHz or analog mode
v16 = 1 << 14;
else if (devc->dslogic_mode == DS_OP_LOOPBACK_TEST)
v16 = 1 << 13;
v16 = 1 << 14;
else if (devc->dslogic_mode == DS_OP_LOOPBACK_TEST)
v16 = 1 << 13;
+ if (devc->dslogic_continuous_mode)
+ v16 |= 1 << 12;
if (devc->dslogic_external_clock)
v16 |= 1 << 1;
if (devc->dslogic_external_clock)
v16 |= 1 << 1;
devc->limit_samples = 0;
devc->capture_ratio = 0;
devc->sample_wide = FALSE;
devc->limit_samples = 0;
devc->capture_ratio = 0;
devc->sample_wide = FALSE;
+ devc->dslogic_continuous_mode = FALSE;
devc->stl = NULL;
return devc;
devc->stl = NULL;
return devc;
uint16_t dslogic_mode;
uint32_t trigger_pos;
gboolean dslogic_external_clock;
uint16_t dslogic_mode;
uint32_t trigger_pos;
gboolean dslogic_external_clock;
+ gboolean dslogic_continuous_mode;
int dslogic_voltage_threshold;
};
int dslogic_voltage_threshold;
};