]> sigrok.org Git - libsigrok.git/blobdiff - src/hardware/agilent-dmm/protocol.c
output/csv: use intermediate time_t var, silence compiler warning
[libsigrok.git] / src / hardware / agilent-dmm / protocol.c
index 624ff597a76aad5c1293a99d0d19858c642bc073..f004ec4b751531d525f22196b664d20b4632ebe3 100644 (file)
@@ -1011,11 +1011,12 @@ SR_PRIV const struct agdmm_recv agdmm_recvs_u124x[] = {
        { "^\"(\\d\\d.{18}\\d)\"$", recv_stat_u124x },
        { "^\\*([0-9])$", recv_switch },
        { "^([-+][0-9]\\.[0-9]{8}E[-+][0-9]{2})$", recv_fetc },
-       { "^\"(VOLT|CURR|RES|CAP|FREQ) ([-+][0-9\\.E\\-+]+),([-+][0-9]\\.[0-9]{8}E([-+][0-9]{2}))\"$", recv_conf_u124x_5x },
-       { "^\"(VOLT:[ACD]+) ([-+][0-9\\.E\\-+]+),([-+][0-9]\\.[0-9]{8}E([-+][0-9]{2}))\"$", recv_conf_u124x_5x },
-       { "^\"(CURR:[ACD]+) ([-+][0-9\\.E\\-+]+),([-+][0-9]\\.[0-9]{8}E([-+][0-9]{2}))\"$", recv_conf_u124x_5x },
-       { "^\"(CPER:[40]-20mA) ([-+][0-9\\.E\\-+]+),([-+][0-9]\\.[0-9]{8}E([-+][0-9]{2}))\"$", recv_conf_u124x_5x },
+       { "^\"(VOLT|CURR|RES|CAP|FREQ) ([-+][0-9\\.E\\-+]+),([-+][0-9]\\.[0-9]{6,8}E([-+][0-9]{2}))\"$", recv_conf_u124x_5x },
+       { "^\"(VOLT:[ACD]+) ([-+][0-9\\.E\\-+]+),([-+][0-9]\\.[0-9]{6,8}E([-+][0-9]{2}))\"$", recv_conf_u124x_5x },
+       { "^\"(CURR:[ACD]+) ([-+][0-9\\.E\\-+]+),([-+][0-9]\\.[0-9]{6,8}E([-+][0-9]{2}))\"$", recv_conf_u124x_5x },
+       { "^\"(CPER:[40]-20mA) ([-+][0-9\\.E\\-+]+),([-+][0-9]\\.[0-9]{6,8}E([-+][0-9]{2}))\"$", recv_conf_u124x_5x },
        { "^\"(T[0-9]:[A-Z]+) ([A-Z]+)\"$", recv_conf_u124x_5x },
+       { "^\"(TEMP:[A-Z]+) ([A-Z]+)\"$", recv_conf_u124x_5x },
        { "^\"(DIOD)\"$", recv_conf_u124x_5x },
        ALL_ZERO
 };
@@ -1051,7 +1052,7 @@ SR_PRIV const struct agdmm_recv agdmm_recvs_u125x[] = {
 
 SR_PRIV const struct agdmm_recv agdmm_recvs_u127x[] = {
        { "^\"(\\d\\d.{18}\\d)\"$", recv_stat_u123x },
-       { "^\\*([0-9])$", recv_switch },
+       { "^\\*([0-9]+)$", recv_switch },
        { "^([-+][0-9]\\.[0-9]{8}E[-+][0-9]{2})$", recv_fetc },
        { "^\"(V|MV|A|MA|UA|FREQ),(\\d),(AC|DC|ACDC)\"$", recv_conf_u123x },
        { "^\"(RES|CAP),(\\d)\"$", recv_conf_u123x},