2 * This file is part of the libsigrok project.
4 * Copyright (C) 2017 Jan Luebbe <jluebbe@lasnet.de>
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
24 #define COMMAND_START_CAPTURE 0x01
25 #define COMMAND_STOP_CAPTURE 0x02
26 #define COMMAND_READ_EEPROM 0x07
27 #define COMMAND_INIT_BITSTREAM 0x7e
28 #define COMMAND_SEND_BITSTREAM 0x7f
29 #define COMMAND_WRITE_REG 0x80
30 #define COMMAND_READ_REG 0x81
31 #define COMMAND_READ_TEMP 0x86
32 #define COMMAND_WRITE_I2C 0x87
33 #define COMMAND_READ_I2C 0x88
34 #define COMMAND_WAKE_I2C 0x89
35 #define COMMAND_READ_FW_VER 0x8b
37 #define REG_ADC_IDX 0x03
38 #define REG_ADC_VAL_LSB 0x04
39 #define REG_ADC_VAL_MSB 0x05
40 #define REG_LED_RED 0x0f
41 #define REG_LED_GREEN 0x10
42 #define REG_LED_BLUE 0x11
43 #define REG_STATUS 0x40
45 static void iterate_lfsr(const struct sr_dev_inst *sdi)
47 struct dev_context *devc = sdi->priv;
48 uint32_t lfsr = devc->lfsr;
51 max = (lfsr & 0x1f) + 34;
52 for (i = 0; i <= max; i++) {
53 lfsr = (lfsr >> 1) | \
60 sr_spew("Iterate 0x%08x -> 0x%08x", devc->lfsr, lfsr);
64 static void encrypt(const struct sr_dev_inst *sdi, const uint8_t *in, uint8_t *out, uint16_t len)
66 struct dev_context *devc = sdi->priv;
67 uint32_t lfsr = devc->lfsr;
71 for (i = 0; i < len; i++) {
73 mask = lfsr >> (i % 4 * 8);
75 value = (value & 0x28) | ((value ^ mask) & ~0x28);
83 static void decrypt(const struct sr_dev_inst *sdi, uint8_t *data, uint16_t len)
85 struct dev_context *devc = sdi->priv;
86 uint32_t lfsr = devc->lfsr;
89 for (i = 0; i < len; i++)
90 data[i] ^= (lfsr >> (i % 4 * 8));
94 static int transact(const struct sr_dev_inst *sdi,
95 const uint8_t *req, uint16_t req_len,
96 uint8_t *rsp, uint16_t rsp_len)
98 struct sr_usb_dev_inst *usb = sdi->conn;
100 uint8_t rsp_dummy[1] = {};
103 if (req_len < 2 || req_len > 1024 || rsp_len > 128 ||
104 !req || (rsp_len > 0 && !rsp))
107 req_enc = g_malloc(req_len);
108 encrypt(sdi, req, req_enc, req_len);
110 ret = libusb_bulk_transfer(usb->devhdl, 1, req_enc, req_len, &xfer, 1000);
112 sr_dbg("Failed to send request 0x%02x: %s.",
113 req[1], libusb_error_name(ret));
116 if (xfer != req_len) {
117 sr_dbg("Failed to send request 0x%02x: incorrect length "
118 "%d != %d.", req[1], xfer, req_len);
122 if (req[0] == 0x20) { /* Reseed. */
124 } else if (rsp_len == 0) {
126 rsp_len = sizeof(rsp_dummy);
129 ret = libusb_bulk_transfer(usb->devhdl, 0x80 | 1, rsp, rsp_len,
132 sr_dbg("Failed to receive response to request 0x%02x: %s.",
133 req[1], libusb_error_name(ret));
136 if (xfer != rsp_len) {
137 sr_dbg("Failed to receive response to request 0x%02x: "
138 "incorrect length %d != %d.", req[1], xfer, rsp_len);
142 decrypt(sdi, rsp, rsp_len);
147 static int reseed(const struct sr_dev_inst *sdi)
149 struct dev_context *devc = sdi->priv;
150 uint8_t req[] = {0x20, 0x24, 0x4b, 0x35, 0x8e};
153 return transact(sdi, req, sizeof(req), NULL, 0);
156 static int write_regs(const struct sr_dev_inst *sdi, uint8_t (*regs)[2], uint8_t cnt)
161 if (cnt < 1 || cnt > 30)
165 req[1] = COMMAND_WRITE_REG;
168 for (i = 0; i < cnt; i++) {
169 req[3 + 2 * i] = regs[i][0];
170 req[4 + 2 * i] = regs[i][1];
173 return transact(sdi, req, 3 + (2 * cnt), NULL, 0);
176 static int write_reg(const struct sr_dev_inst *sdi,
177 uint8_t address, uint8_t value)
179 uint8_t regs[2] = {address, value};
181 return write_regs(sdi, ®s, 1);
184 static int read_regs(const struct sr_dev_inst *sdi,
185 const uint8_t *regs, uint8_t *values,
191 if (cnt < 1 || cnt > 30)
195 req[1] = COMMAND_READ_REG;
198 for (i = 0; i < cnt; i++) {
199 req[3 + i] = regs[i];
202 return transact(sdi, req, 3 + cnt, values, cnt);
205 static int read_reg(const struct sr_dev_inst *sdi,
206 uint8_t address, uint8_t *value)
208 return read_regs(sdi, &address, value, 1);
211 static int write_adc(const struct sr_dev_inst *sdi,
212 uint8_t address, uint16_t value)
214 uint8_t regs[][2] = {
215 {REG_ADC_IDX, address},
216 {REG_ADC_VAL_LSB, value},
217 {REG_ADC_VAL_MSB, value >> 8},
220 return write_regs(sdi, regs, G_N_ELEMENTS(regs));
223 static int read_eeprom(const struct sr_dev_inst *sdi,
224 uint16_t address, uint8_t *data, uint16_t len)
227 0x00, COMMAND_READ_EEPROM,
228 0x33, 0x81, /* Unknown values */
229 address, address >> 8,
233 return transact(sdi, req, sizeof(req), data, len);
236 static int read_eeprom_serial(const struct sr_dev_inst *sdi,
239 return read_eeprom(sdi, 0x08, data, 0x8);
242 static int read_eeprom_magic(const struct sr_dev_inst *sdi,
245 return read_eeprom(sdi, 0x10, data, 0x10);
248 static int read_temperature(const struct sr_dev_inst *sdi, int8_t *temp)
250 uint8_t req[2] = {0x00, COMMAND_READ_TEMP};
252 return transact(sdi, req, sizeof(req), (uint8_t*)temp, 1);
255 static int get_firmware_version(const struct sr_dev_inst *sdi)
257 uint8_t req[2] = {0x00, COMMAND_READ_FW_VER};
258 uint8_t rsp[128] = {};
261 ret = transact(sdi, req, sizeof(req), rsp, sizeof(rsp));
264 sr_dbg("fw-version: %s", rsp);
270 static int read_i2c(const struct sr_dev_inst *sdi, uint8_t *data, uint8_t len)
273 uint8_t rsp[1 + 128];
276 if (len < 1 || len > 128 || !data)
280 req[1] = COMMAND_READ_I2C;
281 req[2] = 0xc0; /* Fixed address */
283 req[4] = 0; /* Len MSB? */
285 ret = transact(sdi, req, sizeof(req), rsp, 1 + len);
288 if (rsp[0] != 0x02) {
289 sr_dbg("Failed to do I2C read (0x%02x).", rsp[0]);
293 memcpy(data, rsp + 1, len);
297 static int write_i2c(const struct sr_dev_inst *sdi, const uint8_t *data, uint8_t len)
299 uint8_t req[5 + 128];
303 if (len < 1 || len > 128 || !data)
307 req[1] = COMMAND_WRITE_I2C;
308 req[2] = 0xc0; /* Fixed address */
310 req[4] = 0; /* Len MSB? */
311 memcpy(req + 5, data, len);
313 ret = transact(sdi, req, 5 + len, rsp, sizeof(rsp));
316 if (rsp[0] != 0x02) {
317 sr_dbg("Failed to do I2C write (0x%02x).", rsp[0]);
324 static int wake_i2c(const struct sr_dev_inst *sdi)
326 uint8_t req[] = {0x00, COMMAND_WAKE_I2C};
328 uint8_t i2c_rsp[1 + 1 + 2] = {};
331 ret = transact(sdi, req, sizeof(req), rsp, sizeof(rsp));
334 if (rsp[0] != 0x00) {
335 sr_dbg("Failed to do I2C wake trigger (0x%02x).", rsp[0]);
339 ret = read_i2c(sdi, i2c_rsp, sizeof(i2c_rsp));
343 if (i2c_rsp[1] != 0x11) {
344 sr_dbg("Failed to do I2C wake read (0x%02x).", i2c_rsp[0]);
351 static int crypto_random(const struct sr_dev_inst *sdi, uint8_t *data)
353 uint8_t i2c_req[8] = {0x03, 0x07, 0x1b, 0x00, 0x00, 0x00, 0x24, 0xcd};
354 uint8_t i2c_rsp[1 + 32 + 2] = {};
357 ret = write_i2c(sdi, i2c_req, sizeof(i2c_req));
361 g_usleep(100000); /* TODO: Poll instead. */
363 ret = read_i2c(sdi, i2c_rsp, sizeof(i2c_rsp));
368 memcpy(data, i2c_rsp + 1, 32);
373 static int crypto_nonce(const struct sr_dev_inst *sdi, uint8_t *data)
375 uint8_t i2c_req[6 + 20 + 2] = {0x03, 0x1b, 0x16, 0x00, 0x00, 0x00};
376 uint8_t i2c_rsp[1 + 32 + 2] = {};
383 ret = write_i2c(sdi, i2c_req, sizeof(i2c_req));
387 g_usleep(100000); /* TODO: Poll instead. */
389 ret = read_i2c(sdi, i2c_rsp, sizeof(i2c_rsp));
394 memcpy(data, i2c_rsp + 1, 32);
399 static int crypto_sign(const struct sr_dev_inst *sdi, uint8_t *data, uint8_t *crc)
401 uint8_t i2c_req[8] = {0x03, 0x07, 0x41, 0x80, 0x00, 0x00, 0x28, 0x05};
402 uint8_t i2c_rsp[1 + 64 + 2] = {};
405 ret = write_i2c(sdi, i2c_req, sizeof(i2c_req));
409 g_usleep(100000); /* TODO: Poll instead. */
411 ret = read_i2c(sdi, i2c_rsp, sizeof(i2c_rsp));
415 memcpy(data, i2c_rsp + 1, 64);
416 memcpy(crc, i2c_rsp + 1 + 64, 2);
421 static int authenticate(const struct sr_dev_inst *sdi)
423 struct dev_context *devc = sdi->priv;
424 uint8_t random[32] = {};
425 uint8_t nonce[32] = {};
426 uint8_t sig[64] = {};
427 uint8_t sig_crc[64] = {};
435 ret = crypto_random(sdi, random);
438 sr_dbg("random: 0x%02x 0x%02x 0x%02x 0x%02x", random[0], random[1], random[2], random[3]);
440 ret = crypto_nonce(sdi, nonce);
443 sr_dbg("nonce: 0x%02x 0x%02x 0x%02x 0x%02x", nonce[0], nonce[1], nonce[2], nonce[3]);
445 ret = crypto_nonce(sdi, nonce);
448 sr_dbg("nonce: 0x%02x 0x%02x 0x%02x 0x%02x", nonce[0], nonce[1], nonce[2], nonce[3]);
450 ret = crypto_sign(sdi, sig, sig_crc);
453 sr_dbg("sig: 0x%02x 0x%02x 0x%02x 0x%02x", sig[0], sig[1], sig[2], sig[3]);
454 sr_dbg("sig crc: 0x%02x 0x%02x", sig_crc[0], sig_crc[1]);
457 for (i = 0; i < 28; i++)
458 lfsr ^= nonce[i] << (8 * (i % 4));
459 lfsr ^= sig_crc[0] | sig_crc[1] << 8;
461 sr_dbg("Authenticate 0x%08x -> 0x%08x", devc->lfsr, lfsr);
467 static int upload_bitstream_part(const struct sr_dev_inst *sdi,
468 const uint8_t *data, uint16_t len)
470 uint8_t req[4 + 1020];
474 if (len < 1 || len > 1020 || !data)
478 req[1] = COMMAND_SEND_BITSTREAM;
481 memcpy(req + 4, data, len);
483 ret = transact(sdi, req, 4 + len, rsp, sizeof(rsp));
486 if (rsp[0] != 0x00) {
487 sr_dbg("Failed to do bitstream upload (0x%02x).", rsp[0]);
494 static int upload_bitstream(const struct sr_dev_inst *sdi,
497 struct drv_context *drvc = sdi->driver->context;
498 unsigned char *bitstream = NULL;
503 size_t bs_size, bs_offset = 0, bs_part_size;
505 bitstream = sr_resource_load(drvc->sr_ctx, SR_RESOURCE_FIRMWARE,
506 name, &bs_size, 512 * 1024);
510 sr_info("Uploading bitstream '%s'.", name);
513 req[1] = COMMAND_INIT_BITSTREAM;
515 ret = transact(sdi, req, sizeof(req), rsp, sizeof(rsp));
518 if (rsp[0] != 0x00) {
519 sr_err("Failed to start bitstream upload (0x%02x).", rsp[0]);
524 while (bs_offset < bs_size) {
525 bs_part_size = MIN(bs_size - bs_offset, 1020);
526 sr_spew("Uploading %zd bytes.", bs_part_size);
527 ret = upload_bitstream_part(sdi, bitstream + bs_offset, bs_part_size);
530 bs_offset += bs_part_size;
535 sr_info("Bitstream upload done.");
537 /* Check a scratch register? */
538 ret = write_reg(sdi, 0x7f, 0xaa);
541 ret = read_reg(sdi, 0x7f, ®_val);
544 if (reg_val != 0xaa) {
545 sr_err("Failed FPGA register read-back (0x%02x != 0xaa).", rsp[0]);
557 static int set_led(const struct sr_dev_inst *sdi, uint8_t r, uint8_t g, uint8_t b)
559 uint8_t regs[][2] = {
567 return write_regs(sdi, regs, G_N_ELEMENTS(regs));
571 static int configure_channels(const struct sr_dev_inst *sdi)
573 struct dev_context *devc = sdi->priv;
574 const struct sr_channel *c;
578 devc->dig_channel_cnt = 0;
579 devc->dig_channel_mask = 0;
580 for (l = sdi->channels; l; l = l->next) {
585 mask = 1 << c->index;
586 devc->dig_channel_masks[devc->dig_channel_cnt++] = mask;
587 devc->dig_channel_mask |= mask;
590 sr_dbg("%d channels enabled (0x%04x)",
591 devc->dig_channel_cnt, devc->dig_channel_mask);
596 SR_PRIV int saleae_logic_pro_init(const struct sr_dev_inst *sdi)
609 ret = get_firmware_version(sdi);
613 sr_dbg("read serial");
614 ret = read_eeprom_serial(sdi, serial);
618 /* Check if we need to upload the bitstream. */
619 ret = read_reg(sdi, 0x7f, ®_val);
622 if (reg_val == 0xaa) {
623 sr_info("Skipping bitstream upload.");
625 ret = upload_bitstream(sdi, "saleae-logicpro16-fpga.bitstream");
632 ret = write_reg(sdi, 0x00, 0x00);
635 ret = write_reg(sdi, 0x00, 0x80);
640 ret = write_adc(sdi, 0x11, 0x0444);
643 ret = write_adc(sdi, 0x12, 0x0777);
646 ret = write_adc(sdi, 0x25, 0x0000);
649 ret = write_adc(sdi, 0x45, 0x0000);
652 ret = write_adc(sdi, 0x2a, 0x1111);
655 ret = write_adc(sdi, 0x2b, 0x1111);
658 ret = write_adc(sdi, 0x46, 0x0004);
661 ret = write_adc(sdi, 0x50, 0x0000);
664 ret = write_adc(sdi, 0x55, 0x0020);
667 ret = write_adc(sdi, 0x56, 0x0000);
671 ret = write_reg(sdi, 0x15, 0x00);
675 ret = write_adc(sdi, 0x0f, 0x0100);
681 ret = write_reg(sdi, 0x00, 0x02); /* bit 1 */
684 ret = write_reg(sdi, 0x00, 0x00);
687 ret = write_reg(sdi, 0x00, 0x04); /* bit 2 */
690 ret = write_reg(sdi, 0x00, 0x00);
693 ret = write_reg(sdi, 0x00, 0x08); /* bit 3 */
696 ret = write_reg(sdi, 0x00, 0x00);
700 sr_dbg("read dummy");
701 for (i = 0; i < 8; i++) {
702 ret = read_reg(sdi, 0x41 + i, &dummy[i]);
707 /* Read and write back magic EEPROM value. */
708 sr_dbg("read/write magic");
709 ret = read_eeprom_magic(sdi, magic);
712 for (i = 0; i < 16; i++) {
713 ret = write_reg(sdi, 0x17, magic[i]);
718 ret = read_temperature(sdi, &temperature);
721 sr_dbg("temperature = %d", temperature);
723 /* Setting the LED doesn't work yet. */
724 /* set_led(sdi, 0x00, 0x00, 0xff); */
729 SR_PRIV int saleae_logic_pro_prepare(const struct sr_dev_inst *sdi)
731 struct dev_context *devc = sdi->priv;
732 uint8_t regs_unknown[][2] = {
737 uint8_t regs_config[][2] = {
739 {0x08, 0x00}, /* Analog channel mask (LSB) */
740 {0x09, 0x00}, /* Analog channel mask (MSB) */
741 {0x06, 0x01}, /* Digital channel mask (LSB) */
742 {0x07, 0x00}, /* Digital channel mask (MSB) */
743 {0x0a, 0x00}, /* Analog sample rate? */
744 {0x0b, 0x64}, /* Digital sample rate? */
746 {0x0d, 0x00}, /* Analog mux rate? */
747 {0x0e, 0x01}, /* Digital mux rate? */
750 {0x14, 0xff}, /* Pre-divider? */
752 uint8_t start_req[] = {0x00, 0x01};
753 uint8_t start_rsp[2] = {};
755 configure_channels(sdi);
757 /* Digital channel mask and muxing */
758 regs_config[3][1] = devc->dig_channel_mask;
759 regs_config[4][1] = devc->dig_channel_mask >> 8;
760 regs_config[9][1] = devc->dig_channel_cnt;
763 switch (devc->dig_samplerate) {
765 regs_config[6][1] = 0x64;
768 regs_config[6][1] = 0x32;
771 regs_config[6][1] = 0x28;
774 regs_config[6][1] = 0x0a;
777 regs_config[6][1] = 0x04;
778 regs_config[12][1] = 0x80;
781 regs_config[6][1] = 0x02;
782 regs_config[12][1] = 0x40;
790 write_reg(sdi, 0x15, 0x03);
791 write_regs(sdi, regs_unknown, G_N_ELEMENTS(regs_unknown));
792 write_regs(sdi, regs_config, G_N_ELEMENTS(regs_config));
794 transact(sdi, start_req, sizeof(start_req), start_rsp, sizeof(start_rsp));
799 SR_PRIV int saleae_logic_pro_start(const struct sr_dev_inst *sdi)
801 struct dev_context *devc = sdi->priv;
804 devc->batch_index = 0;
806 write_reg(sdi, 0x00, 0x01);
811 SR_PRIV int saleae_logic_pro_stop(const struct sr_dev_inst *sdi)
813 uint8_t stop_req[] = {0x00, 0x02};
814 uint8_t stop_rsp[2] = {};
818 write_reg(sdi, 0x00, 0x00);
819 transact(sdi, stop_req, sizeof(stop_req), stop_rsp, sizeof(stop_rsp));
821 ret = read_reg(sdi, 0x40, &status);
824 if (status != 0x20) {
825 sr_err("Capture error (status reg = 0x%02x).", status);
832 static void saleae_logic_pro_send_data(const struct sr_dev_inst *sdi,
833 void *data, size_t length, size_t unitsize)
835 const struct sr_datafeed_logic logic = {
837 .unitsize = unitsize,
841 const struct sr_datafeed_packet packet = {
846 sr_session_send(sdi, &packet);
850 * One batch from the device consists of 32 samples per active digital channel.
851 * This stream of batches is packed into USB packets with 16384 bytes each.
853 static void saleae_logic_pro_convert_data(const struct sr_dev_inst *sdi,
854 const uint32_t *src, size_t srccnt)
856 struct dev_context *devc = sdi->priv;
857 uint8_t *dst = devc->conv_buffer;
859 uint16_t channel_mask;
860 unsigned int sample_index, batch_index;
863 /* Copy partial batch to the beginning. */
864 memcpy(dst, dst + devc->conv_size, CONV_BATCH_SIZE);
865 /* Reset converted size. */
868 batch_index = devc->batch_index;
871 dst_batch = (uint16_t*)dst;
873 /* First index of the batch. */
874 if (batch_index == 0)
875 memset(dst, 0, CONV_BATCH_SIZE);
877 /* Convert one channel. */
878 channel_mask = devc->dig_channel_masks[batch_index];
879 for (sample_index = 0; sample_index <= 31; sample_index++)
880 if ((samples >> (31 - sample_index)) & 1)
881 dst_batch[sample_index] |= channel_mask;
883 /* Last index of the batch. */
884 if (++batch_index == devc->dig_channel_cnt) {
885 devc->conv_size += CONV_BATCH_SIZE;
887 dst += CONV_BATCH_SIZE;
890 devc->batch_index = batch_index;
893 SR_PRIV void LIBUSB_CALL saleae_logic_pro_receive_data(struct libusb_transfer *transfer)
895 const struct sr_dev_inst *sdi = transfer->user_data;
896 struct dev_context *devc = sdi->priv;
899 switch (transfer->status) {
900 case LIBUSB_TRANSFER_NO_DEVICE:
901 sr_dbg("FIXME no device");
903 case LIBUSB_TRANSFER_COMPLETED:
904 case LIBUSB_TRANSFER_TIMED_OUT: /* We may have received some data though. */
911 saleae_logic_pro_convert_data(sdi, (uint32_t*)transfer->buffer, 16 * 1024 / 4);
912 saleae_logic_pro_send_data(sdi, devc->conv_buffer, devc->conv_size, 2);
914 if ((ret = libusb_submit_transfer(transfer)) != LIBUSB_SUCCESS)
915 sr_dbg("FIXME resubmit failed");