2 * This file is part of the libsigrok project.
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
32 #include <libsigrok/libsigrok.h>
33 #include "libsigrok-internal.h"
38 * This is a unified protocol driver for the DS1000 and DS2000 series.
40 * DS1000 support tested with a Rigol DS1102D.
42 * DS2000 support tested with a Rigol DS2072 using firmware version 01.01.00.02.
44 * The Rigol DS2000 series scopes try to adhere to the IEEE 488.2 (I think)
45 * standard. If you want to read it - it costs real money...
47 * Every response from the scope has a linefeed appended because the
48 * standard says so. In principle this could be ignored because sending the
49 * next command clears the output queue of the scope. This driver tries to
50 * avoid doing that because it may cause an error being generated inside the
51 * scope and who knows what bugs the firmware has WRT this.
53 * Waveform data is transferred in a format called "arbitrary block program
54 * data" specified in IEEE 488.2. See Agilents programming manuals for their
55 * 2000/3000 series scopes for a nice description.
57 * Each data block from the scope has a header, e.g. "#900000001400".
58 * The '#' marks the start of a block.
59 * Next is one ASCII decimal digit between 1 and 9, this gives the number of
60 * ASCII decimal digits following.
61 * Last are the ASCII decimal digits giving the number of bytes (not
62 * samples!) in the block.
64 * After this header as many data bytes as indicated follow.
66 * Each data block has a trailing linefeed too.
69 static int parse_int(const char *str, int *ret)
75 tmp = strtol(str, &e, 10);
76 if (e == str || *e != '\0') {
77 sr_dbg("Failed to parse integer: '%s'", str);
81 sr_dbg("Failed to parse integer: '%s', numerical overflow", str);
84 if (tmp > INT_MAX || tmp < INT_MIN) {
85 sr_dbg("Failed to parse integer: '%s', value to large/small", str);
93 /* Set the next event to wait for in rigol_ds_receive */
94 static void rigol_ds_set_wait_event(struct dev_context *devc, enum wait_events event)
96 if (event == WAIT_STOP)
97 devc->wait_status = 2;
99 devc->wait_status = 1;
100 devc->wait_event = event;
104 * Waiting for a event will return a timeout after 2 to 3 seconds in order
105 * to not block the application.
107 static int rigol_ds_event_wait(const struct sr_dev_inst *sdi, char status1, char status2)
110 struct dev_context *devc;
113 if (!(devc = sdi->priv))
119 * Trigger status may return:
120 * "TD" or "T'D" - triggered
121 * "AUTO" - autotriggered
123 * "WAIT" - waiting for trigger
127 if (devc->wait_status == 1) {
129 if (time(NULL) - start >= 3) {
130 sr_dbg("Timeout waiting for trigger");
131 return SR_ERR_TIMEOUT;
134 if (sr_scpi_get_string(sdi->conn, ":TRIG:STAT?", &buf) != SR_OK)
136 } while (buf[0] == status1 || buf[0] == status2);
138 devc->wait_status = 2;
140 if (devc->wait_status == 2) {
142 if (time(NULL) - start >= 3) {
143 sr_dbg("Timeout waiting for trigger");
144 return SR_ERR_TIMEOUT;
147 if (sr_scpi_get_string(sdi->conn, ":TRIG:STAT?", &buf) != SR_OK)
149 } while (buf[0] != status1 && buf[0] != status2);
151 rigol_ds_set_wait_event(devc, WAIT_NONE);
158 * For live capture we need to wait for a new trigger event to ensure that
159 * sample data is not returned twice.
161 * Unfortunately this will never really work because for sufficiently fast
162 * timebases and trigger rates it just can't catch the status changes.
164 * What would be needed is a trigger event register with autoreset like the
165 * Agilents have. The Rigols don't seem to have anything like this.
167 * The workaround is to only wait for the trigger when the timebase is slow
168 * enough. Of course this means that for faster timebases sample data can be
169 * returned multiple times, this effect is mitigated somewhat by sleeping
170 * for about one sweep time in that case.
172 static int rigol_ds_trigger_wait(const struct sr_dev_inst *sdi)
174 struct dev_context *devc;
177 if (!(devc = sdi->priv))
181 * If timebase < 50 msecs/DIV just sleep about one sweep time except
182 * for really fast sweeps.
184 if (devc->timebase < 0.0499) {
185 if (devc->timebase > 0.99e-6) {
187 * Timebase * num hor. divs * 85(%) * 1e6(usecs) / 100
188 * -> 85 percent of sweep time
190 s = (devc->timebase * devc->model->series->num_horizontal_divs
192 sr_spew("Sleeping for %ld usecs instead of trigger-wait", s);
195 rigol_ds_set_wait_event(devc, WAIT_NONE);
198 return rigol_ds_event_wait(sdi, 'T', 'A');
202 /* Wait for scope to got to "Stop" in single shot mode */
203 static int rigol_ds_stop_wait(const struct sr_dev_inst *sdi)
205 return rigol_ds_event_wait(sdi, 'S', 'S');
208 /* Check that a single shot acquisition actually succeeded on the DS2000 */
209 static int rigol_ds_check_stop(const struct sr_dev_inst *sdi)
211 struct dev_context *devc;
212 struct sr_channel *ch;
215 if (!(devc = sdi->priv))
218 ch = devc->channel_entry->data;
220 if (devc->model->series->protocol != PROTOCOL_V3)
223 if (ch->type == SR_CHANNEL_LOGIC) {
224 if (rigol_ds_config_set(sdi, ":WAV:SOUR LA") != SR_OK)
227 if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
228 ch->index + 1) != SR_OK)
231 /* Check that the number of samples will be accepted */
232 if (rigol_ds_config_set(sdi, ":WAV:POIN %d",
233 ch->type == SR_CHANNEL_LOGIC ?
234 devc->digital_frame_size :
235 devc->analog_frame_size) != SR_OK)
237 if (sr_scpi_get_int(sdi->conn, "*ESR?", &tmp) != SR_OK)
240 * If we get an "Execution error" the scope went from "Single" to
241 * "Stop" without actually triggering. There is no waveform
242 * displayed and trying to download one will fail - the scope thinks
243 * it has 1400 samples (like display memory) and the driver thinks
244 * it has a different number of samples.
246 * In that case just try to capture something again. Might still
247 * fail in interesting ways.
249 * Ain't firmware fun?
252 sr_warn("Single shot acquisition failed, retrying...");
253 /* Sleep a bit, otherwise the single shot will often fail */
254 g_usleep(500 * 1000);
255 rigol_ds_config_set(sdi, ":SING");
256 rigol_ds_set_wait_event(devc, WAIT_STOP);
263 /* Wait for enough data becoming available in scope output buffer */
264 static int rigol_ds_block_wait(const struct sr_dev_inst *sdi)
267 struct dev_context *devc;
271 if (!(devc = sdi->priv))
274 if (devc->model->series->protocol == PROTOCOL_V3) {
279 if (time(NULL) - start >= 3) {
280 sr_dbg("Timeout waiting for data block");
281 return SR_ERR_TIMEOUT;
285 * The scope copies data really slowly from sample
286 * memory to its output buffer, so try not to bother
287 * it too much with SCPI requests but don't wait too
288 * long for short sample frame sizes.
290 g_usleep(devc->analog_frame_size < (15 * 1000) ? (100 * 1000) : (1000 * 1000));
292 /* "READ,nnnn" (still working) or "IDLE,nnnn" (finished) */
293 if (sr_scpi_get_string(sdi->conn, ":WAV:STAT?", &buf) != SR_OK)
296 if (parse_int(buf + 5, &len) != SR_OK)
298 } while (buf[0] == 'R' && len < (1000 * 1000));
301 rigol_ds_set_wait_event(devc, WAIT_NONE);
306 /* Send a configuration setting. */
307 SR_PRIV int rigol_ds_config_set(const struct sr_dev_inst *sdi, const char *format, ...)
309 struct dev_context *devc = sdi->priv;
313 va_start(args, format);
314 ret = sr_scpi_send_variadic(sdi->conn, format, args);
320 if (devc->model->series->protocol == PROTOCOL_V2) {
321 /* The DS1000 series needs this stupid delay, *OPC? doesn't work. */
322 sr_spew("delay %dms", 100);
323 g_usleep(100 * 1000);
326 return sr_scpi_get_opc(sdi->conn);
330 /* Start capturing a new frameset */
331 SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
333 struct dev_context *devc;
335 unsigned int num_channels, i, j;
337 if (!(devc = sdi->priv))
340 if (devc->limit_frames == 0)
341 sr_dbg("Starting data capture for frameset %" PRIu64,
342 devc->num_frames + 1);
344 sr_dbg("Starting data capture for frameset %" PRIu64 " of %"
345 PRIu64, devc->num_frames + 1, devc->limit_frames);
347 switch (devc->model->series->protocol) {
349 rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
352 if (devc->data_source == DATA_SOURCE_LIVE) {
353 if (rigol_ds_config_set(sdi, ":WAV:POIN:MODE NORMAL") != SR_OK)
355 rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
357 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
359 if (rigol_ds_config_set(sdi, ":WAV:POIN:MODE RAW") != SR_OK)
361 if (sr_scpi_get_string(sdi->conn, ":TRIG:MODE?", &trig_mode) != SR_OK)
363 if (rigol_ds_config_set(sdi, ":TRIG:%s:SWE SING", trig_mode) != SR_OK)
365 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
367 rigol_ds_set_wait_event(devc, WAIT_STOP);
372 if (rigol_ds_config_set(sdi, ":WAV:FORM BYTE") != SR_OK)
374 if (devc->data_source == DATA_SOURCE_LIVE) {
375 if (rigol_ds_config_set(sdi, ":WAV:MODE NORM") != SR_OK)
377 devc->analog_frame_size = devc->model->series->live_samples;
378 devc->digital_frame_size = devc->model->series->live_samples;
379 rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
381 if (devc->model->series->protocol == PROTOCOL_V3) {
382 if (rigol_ds_config_set(sdi, ":WAV:MODE RAW") != SR_OK)
384 } else if (devc->model->series->protocol == PROTOCOL_V4) {
387 /* Channels 3 and 4 are multiplexed with D0-7 and D8-15 */
388 for (i = 0; i < devc->model->analog_channels; i++) {
389 if (devc->analog_channels[i]) {
391 } else if (i >= 2 && devc->model->has_digital) {
392 for (j = 0; j < 8; j++) {
393 if (devc->digital_channels[8 * (i - 2) + j]) {
401 devc->analog_frame_size = devc->digital_frame_size =
403 devc->model->series->buffer_samples :
405 devc->model->series->buffer_samples / 2 :
406 devc->model->series->buffer_samples / 4;
409 if (rigol_ds_config_set(sdi, ":SING") != SR_OK)
411 rigol_ds_set_wait_event(devc, WAIT_STOP);
419 /* Start reading data from the current channel */
420 SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi)
422 struct dev_context *devc;
423 struct sr_channel *ch;
425 if (!(devc = sdi->priv))
428 ch = devc->channel_entry->data;
430 sr_dbg("Starting reading data from channel %d", ch->index + 1);
432 switch (devc->model->series->protocol) {
435 if (ch->type == SR_CHANNEL_LOGIC) {
436 if (sr_scpi_send(sdi->conn, ":WAV:DATA? DIG") != SR_OK)
439 if (sr_scpi_send(sdi->conn, ":WAV:DATA? CHAN%d",
440 ch->index + 1) != SR_OK)
443 rigol_ds_set_wait_event(devc, WAIT_NONE);
446 if (ch->type == SR_CHANNEL_LOGIC) {
447 if (rigol_ds_config_set(sdi, ":WAV:SOUR LA") != SR_OK)
450 if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
451 ch->index + 1) != SR_OK)
454 if (devc->data_source != DATA_SOURCE_LIVE) {
455 if (rigol_ds_config_set(sdi, ":WAV:RES") != SR_OK)
457 if (rigol_ds_config_set(sdi, ":WAV:BEG") != SR_OK)
462 if (ch->type == SR_CHANNEL_ANALOG) {
463 if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
464 ch->index + 1) != SR_OK)
467 if (rigol_ds_config_set(sdi, ":WAV:SOUR D%d",
472 if (rigol_ds_config_set(sdi,
473 devc->data_source == DATA_SOURCE_LIVE ?
474 ":WAV:MODE NORM" :":WAV:MODE RAW") != SR_OK)
479 if (devc->model->series->protocol >= PROTOCOL_V3 &&
480 ch->type == SR_CHANNEL_ANALOG) {
481 /* Vertical increment. */
482 if (sr_scpi_get_float(sdi->conn, ":WAV:YINC?",
483 &devc->vert_inc[ch->index]) != SR_OK)
485 /* Vertical origin. */
486 if (sr_scpi_get_float(sdi->conn, ":WAV:YOR?",
487 &devc->vert_origin[ch->index]) != SR_OK)
489 /* Vertical reference. */
490 if (sr_scpi_get_int(sdi->conn, ":WAV:YREF?",
491 &devc->vert_reference[ch->index]) != SR_OK)
493 } else if (ch->type == SR_CHANNEL_ANALOG) {
494 devc->vert_inc[ch->index] = devc->vdiv[ch->index] / 25.6;
497 rigol_ds_set_wait_event(devc, WAIT_BLOCK);
499 devc->num_channel_bytes = 0;
500 devc->num_header_bytes = 0;
501 devc->num_block_bytes = 0;
506 /* Read the header of a data block */
507 static int rigol_ds_read_header(struct sr_dev_inst *sdi)
509 struct sr_scpi_dev_inst *scpi = sdi->conn;
510 struct dev_context *devc = sdi->priv;
511 char *buf = (char *) devc->buffer;
512 size_t header_length;
515 /* Try to read the hashsign and length digit. */
516 if (devc->num_header_bytes < 2) {
517 ret = sr_scpi_read_data(scpi, buf + devc->num_header_bytes,
518 2 - devc->num_header_bytes);
520 sr_err("Read error while reading data header.");
523 devc->num_header_bytes += ret;
526 if (devc->num_header_bytes < 2)
529 if (buf[0] != '#' || !isdigit(buf[1]) || buf[1] == '0') {
530 sr_err("Received invalid data block header '%c%c'.", buf[0], buf[1]);
534 header_length = 2 + buf[1] - '0';
536 /* Try to read the length. */
537 if (devc->num_header_bytes < header_length) {
538 ret = sr_scpi_read_data(scpi, buf + devc->num_header_bytes,
539 header_length - devc->num_header_bytes);
541 sr_err("Read error while reading data header.");
544 devc->num_header_bytes += ret;
547 if (devc->num_header_bytes < header_length)
550 /* Read the data length. */
551 buf[header_length] = '\0';
553 if (parse_int(buf + 2, &ret) != SR_OK) {
554 sr_err("Received invalid data block length '%s'.", buf + 2);
558 sr_dbg("Received data block header: '%s' -> block length %d", buf, ret);
563 SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
565 struct sr_dev_inst *sdi;
566 struct sr_scpi_dev_inst *scpi;
567 struct dev_context *devc;
568 struct sr_datafeed_packet packet;
569 struct sr_datafeed_analog analog;
570 struct sr_analog_encoding encoding;
571 struct sr_analog_meaning meaning;
572 struct sr_analog_spec spec;
573 struct sr_datafeed_logic logic;
574 double vdiv, offset, origin;
576 struct sr_channel *ch;
577 gsize expected_data_bytes;
581 if (!(sdi = cb_data))
584 if (!(devc = sdi->priv))
589 if (!(revents == G_IO_IN || revents == 0))
592 switch (devc->wait_event) {
596 if (rigol_ds_trigger_wait(sdi) != SR_OK)
598 if (rigol_ds_channel_start(sdi) != SR_OK)
602 if (rigol_ds_block_wait(sdi) != SR_OK)
606 if (rigol_ds_stop_wait(sdi) != SR_OK)
608 if (rigol_ds_check_stop(sdi) != SR_OK)
610 if (rigol_ds_channel_start(sdi) != SR_OK)
614 sr_err("BUG: Unknown event target encountered");
618 ch = devc->channel_entry->data;
620 expected_data_bytes = ch->type == SR_CHANNEL_ANALOG ?
621 devc->analog_frame_size : devc->digital_frame_size;
623 if (devc->num_block_bytes == 0) {
624 if (devc->model->series->protocol >= PROTOCOL_V4) {
625 if (rigol_ds_config_set(sdi, ":WAV:START %d",
626 devc->num_channel_bytes + 1) != SR_OK)
628 if (rigol_ds_config_set(sdi, ":WAV:STOP %d",
629 MIN(devc->num_channel_bytes + ACQ_BLOCK_SIZE,
630 devc->analog_frame_size)) != SR_OK)
634 if (devc->model->series->protocol >= PROTOCOL_V3)
635 if (sr_scpi_send(sdi->conn, ":WAV:DATA?") != SR_OK)
638 if (sr_scpi_read_begin(scpi) != SR_OK)
641 if (devc->format == FORMAT_IEEE488_2) {
642 sr_dbg("New block header expected");
643 len = rigol_ds_read_header(sdi);
645 /* Still reading the header. */
648 sr_err("Error while reading block header, aborting capture.");
649 packet.type = SR_DF_FRAME_END;
650 sr_session_send(sdi, &packet);
651 sr_dev_acquisition_stop(sdi);
654 /* At slow timebases in live capture the DS2072
655 * sometimes returns "short" data blocks, with
656 * apparently no way to get the rest of the data.
657 * Discard these, the complete data block will
660 if (devc->data_source == DATA_SOURCE_LIVE
661 && (unsigned)len < expected_data_bytes) {
662 sr_dbg("Discarding short data block");
663 sr_scpi_read_data(scpi, (char *)devc->buffer, len + 1);
666 devc->num_block_bytes = len;
668 devc->num_block_bytes = expected_data_bytes;
670 devc->num_block_read = 0;
673 len = devc->num_block_bytes - devc->num_block_read;
674 if (len > ACQ_BUFFER_SIZE)
675 len = ACQ_BUFFER_SIZE;
676 sr_dbg("Requesting read of %d bytes", len);
678 len = sr_scpi_read_data(scpi, (char *)devc->buffer, len);
681 sr_err("Error while reading block data, aborting capture.");
682 packet.type = SR_DF_FRAME_END;
683 sr_session_send(sdi, &packet);
684 sr_dev_acquisition_stop(sdi);
688 sr_dbg("Received %d bytes.", len);
690 devc->num_block_read += len;
692 if (ch->type == SR_CHANNEL_ANALOG) {
693 vref = devc->vert_reference[ch->index];
694 vdiv = devc->vert_inc[ch->index];
695 origin = devc->vert_origin[ch->index];
696 offset = devc->vert_offset[ch->index];
697 if (devc->model->series->protocol >= PROTOCOL_V3)
698 for (i = 0; i < len; i++)
699 devc->data[i] = ((int)devc->buffer[i] - vref - origin) * vdiv;
701 for (i = 0; i < len; i++)
702 devc->data[i] = (128 - devc->buffer[i]) * vdiv - offset;
703 float vdivlog = log10f(vdiv);
704 int digits = -(int)vdivlog + (vdivlog < 0.0);
705 sr_analog_init(&analog, &encoding, &meaning, &spec, digits);
706 analog.meaning->channels = g_slist_append(NULL, ch);
707 analog.num_samples = len;
708 analog.data = devc->data;
709 analog.meaning->mq = SR_MQ_VOLTAGE;
710 analog.meaning->unit = SR_UNIT_VOLT;
711 analog.meaning->mqflags = 0;
712 packet.type = SR_DF_ANALOG;
713 packet.payload = &analog;
714 sr_session_send(sdi, &packet);
715 g_slist_free(analog.meaning->channels);
718 // TODO: For the MSO1000Z series, we need a way to express that
719 // this data is in fact just for a single channel, with the valid
720 // data for that channel in the LSB of each byte.
721 logic.unitsize = devc->model->series->protocol == PROTOCOL_V4 ? 1 : 2;
722 logic.data = devc->buffer;
723 packet.type = SR_DF_LOGIC;
724 packet.payload = &logic;
725 sr_session_send(sdi, &packet);
728 if (devc->num_block_read == devc->num_block_bytes) {
729 sr_dbg("Block has been completed");
730 if (devc->model->series->protocol >= PROTOCOL_V3) {
731 /* Discard the terminating linefeed */
732 sr_scpi_read_data(scpi, (char *)devc->buffer, 1);
734 if (devc->format == FORMAT_IEEE488_2) {
735 /* Prepare for possible next block */
736 devc->num_header_bytes = 0;
737 devc->num_block_bytes = 0;
738 if (devc->data_source != DATA_SOURCE_LIVE)
739 rigol_ds_set_wait_event(devc, WAIT_BLOCK);
741 /* End acquisition when data for all channels is acquired. */
742 if (!sr_scpi_read_complete(scpi) && !devc->channel_entry->next) {
743 sr_err("Read should have been completed");
744 packet.type = SR_DF_FRAME_END;
745 sr_session_send(sdi, &packet);
746 sr_dev_acquisition_stop(sdi);
749 devc->num_block_read = 0;
751 sr_dbg("%" PRIu64 " of %" PRIu64 " block bytes read",
752 devc->num_block_read, devc->num_block_bytes);
755 devc->num_channel_bytes += len;
757 if (devc->num_channel_bytes < expected_data_bytes)
758 /* Don't have the full data for this channel yet, re-run. */
761 /* End of data for this channel. */
762 if (devc->model->series->protocol == PROTOCOL_V3) {
763 /* Signal end of data download to scope */
764 if (devc->data_source != DATA_SOURCE_LIVE)
766 * This causes a query error, without it switching
767 * to the next channel causes an error. Fun with
770 rigol_ds_config_set(sdi, ":WAV:END");
773 if (devc->channel_entry->next) {
774 /* We got the frame for this channel, now get the next channel. */
775 devc->channel_entry = devc->channel_entry->next;
776 rigol_ds_channel_start(sdi);
778 /* Done with this frame. */
779 packet.type = SR_DF_FRAME_END;
780 sr_session_send(sdi, &packet);
782 if (++devc->num_frames == devc->limit_frames) {
783 /* Last frame, stop capture. */
784 sr_dev_acquisition_stop(sdi);
786 /* Get the next frame, starting with the first channel. */
787 devc->channel_entry = devc->enabled_channels;
789 rigol_ds_capture_start(sdi);
791 /* Start of next frame. */
792 packet.type = SR_DF_FRAME_BEGIN;
793 sr_session_send(sdi, &packet);
800 SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi)
802 struct dev_context *devc;
803 struct sr_channel *ch;
810 /* Analog channel state. */
811 for (i = 0; i < devc->model->analog_channels; i++) {
812 cmd = g_strdup_printf(":CHAN%d:DISP?", i + 1);
813 res = sr_scpi_get_bool(sdi->conn, cmd, &devc->analog_channels[i]);
817 ch = g_slist_nth_data(sdi->channels, i);
818 ch->enabled = devc->analog_channels[i];
820 sr_dbg("Current analog channel state:");
821 for (i = 0; i < devc->model->analog_channels; i++)
822 sr_dbg("CH%d %s", i + 1, devc->analog_channels[i] ? "on" : "off");
824 /* Digital channel state. */
825 if (devc->model->has_digital) {
826 if (sr_scpi_get_bool(sdi->conn,
827 devc->model->series->protocol >= PROTOCOL_V3 ?
828 ":LA:STAT?" : ":LA:DISP?",
829 &devc->la_enabled) != SR_OK)
831 sr_dbg("Logic analyzer %s, current digital channel state:",
832 devc->la_enabled ? "enabled" : "disabled");
833 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
834 cmd = g_strdup_printf(
835 devc->model->series->protocol >= PROTOCOL_V3 ?
836 ":LA:DIG%d:DISP?" : ":DIG%d:TURN?", i);
837 res = sr_scpi_get_bool(sdi->conn, cmd, &devc->digital_channels[i]);
841 ch = g_slist_nth_data(sdi->channels, i + devc->model->analog_channels);
842 ch->enabled = devc->digital_channels[i];
843 sr_dbg("D%d: %s", i, devc->digital_channels[i] ? "on" : "off");
848 if (sr_scpi_get_float(sdi->conn, ":TIM:SCAL?", &devc->timebase) != SR_OK)
850 sr_dbg("Current timebase %g", devc->timebase);
852 /* Probe attenuation. */
853 for (i = 0; i < devc->model->analog_channels; i++) {
854 cmd = g_strdup_printf(":CHAN%d:PROB?", i + 1);
855 res = sr_scpi_get_float(sdi->conn, cmd, &devc->attenuation[i]);
860 sr_dbg("Current probe attenuation:");
861 for (i = 0; i < devc->model->analog_channels; i++)
862 sr_dbg("CH%d %g", i + 1, devc->attenuation[i]);
864 /* Vertical gain and offset. */
865 if (rigol_ds_get_dev_cfg_vertical(sdi) != SR_OK)
869 for (i = 0; i < devc->model->analog_channels; i++) {
870 cmd = g_strdup_printf(":CHAN%d:COUP?", i + 1);
871 res = sr_scpi_get_string(sdi->conn, cmd, &devc->coupling[i]);
876 sr_dbg("Current coupling:");
877 for (i = 0; i < devc->model->analog_channels; i++)
878 sr_dbg("CH%d %s", i + 1, devc->coupling[i]);
880 /* Trigger source. */
881 if (sr_scpi_get_string(sdi->conn, ":TRIG:EDGE:SOUR?", &devc->trigger_source) != SR_OK)
883 sr_dbg("Current trigger source %s", devc->trigger_source);
885 /* Horizontal trigger position. */
886 if (sr_scpi_get_float(sdi->conn, devc->model->cmds[CMD_GET_HORIZ_TRIGGERPOS].str,
887 &devc->horiz_triggerpos) != SR_OK)
889 sr_dbg("Current horizontal trigger position %g", devc->horiz_triggerpos);
892 if (sr_scpi_get_string(sdi->conn, ":TRIG:EDGE:SLOP?", &devc->trigger_slope) != SR_OK)
894 sr_dbg("Current trigger slope %s", devc->trigger_slope);
897 if (sr_scpi_get_float(sdi->conn, ":TRIG:EDGE:LEV?", &devc->trigger_level) != SR_OK)
899 sr_dbg("Current trigger level %g", devc->trigger_level);
904 SR_PRIV int rigol_ds_get_dev_cfg_vertical(const struct sr_dev_inst *sdi)
906 struct dev_context *devc;
914 for (i = 0; i < devc->model->analog_channels; i++) {
915 cmd = g_strdup_printf(":CHAN%d:SCAL?", i + 1);
916 res = sr_scpi_get_float(sdi->conn, cmd, &devc->vdiv[i]);
921 sr_dbg("Current vertical gain:");
922 for (i = 0; i < devc->model->analog_channels; i++)
923 sr_dbg("CH%d %g", i + 1, devc->vdiv[i]);
925 /* Vertical offset. */
926 for (i = 0; i < devc->model->analog_channels; i++) {
927 cmd = g_strdup_printf(":CHAN%d:OFFS?", i + 1);
928 res = sr_scpi_get_float(sdi->conn, cmd, &devc->vert_offset[i]);
933 sr_dbg("Current vertical offset:");
934 for (i = 0; i < devc->model->analog_channels; i++)
935 sr_dbg("CH%d %g", i + 1, devc->vert_offset[i]);