src/hardware/rigol-ds/api.c

   1 /*
   2  * This file is part of the libsigrok project.
   3  *
   4  * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
   5  * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
   6  * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
   7  *
   8  * This program is free software: you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation, either version 3 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 #include <config.h>
  23 #include <fcntl.h>
  24 #include <unistd.h>
  25 #include <stdlib.h>
  26 #include <string.h>
  27 #include <strings.h>
  28 #include <math.h>
  29 #include <glib.h>
  30 #include <libsigrok/libsigrok.h>
  31 #include "libsigrok-internal.h"
  32 #include "scpi.h"
  33 #include "protocol.h"
  34
  35 static const uint32_t scanopts[] = {
  36         SR_CONF_CONN,
  37         SR_CONF_SERIALCOMM
  38 };
  39
  40 static const uint32_t devopts[] = {
  41         SR_CONF_OSCILLOSCOPE,
  42         SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
  43         SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  44         SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  45         SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  46         SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET,
  47         SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
  48         SR_CONF_NUM_HDIV | SR_CONF_GET,
  49         SR_CONF_SAMPLERATE | SR_CONF_GET,
  50         SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  51 };
  52
  53 static const uint32_t analog_devopts[] = {
  54         SR_CONF_NUM_VDIV | SR_CONF_GET,
  55         SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  56         SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  57         SR_CONF_PROBE_FACTOR | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  58 };
  59
  60 static const uint64_t timebases[][2] = {
  61         /* nanoseconds */
  62         { 1, 1000000000 },
  63         { 2, 1000000000 },
  64         { 5, 1000000000 },
  65         { 10, 1000000000 },
  66         { 20, 1000000000 },
  67         { 50, 1000000000 },
  68         { 100, 1000000000 },
  69         { 500, 1000000000 },
  70         /* microseconds */
  71         { 1, 1000000 },
  72         { 2, 1000000 },
  73         { 5, 1000000 },
  74         { 10, 1000000 },
  75         { 20, 1000000 },
  76         { 50, 1000000 },
  77         { 100, 1000000 },
  78         { 200, 1000000 },
  79         { 500, 1000000 },
  80         /* milliseconds */
  81         { 1, 1000 },
  82         { 2, 1000 },
  83         { 5, 1000 },
  84         { 10, 1000 },
  85         { 20, 1000 },
  86         { 50, 1000 },
  87         { 100, 1000 },
  88         { 200, 1000 },
  89         { 500, 1000 },
  90         /* seconds */
  91         { 1, 1 },
  92         { 2, 1 },
  93         { 5, 1 },
  94         { 10, 1 },
  95         { 20, 1 },
  96         { 50, 1 },
  97         { 100, 1 },
  98         { 200, 1 },
  99         { 500, 1 },
 100         { 1000, 1 },
 101 };
 102
 103 static const uint64_t vdivs[][2] = {
 104         /* microvolts */
 105         { 500, 1000000 },
 106         /* millivolts */
 107         { 1, 1000 },
 108         { 2, 1000 },
 109         { 5, 1000 },
 110         { 10, 1000 },
 111         { 20, 1000 },
 112         { 50, 1000 },
 113         { 100, 1000 },
 114         { 200, 1000 },
 115         { 500, 1000 },
 116         /* volts */
 117         { 1, 1 },
 118         { 2, 1 },
 119         { 5, 1 },
 120         { 10, 1 },
 121         { 20, 1 },
 122         { 50, 1 },
 123         { 100, 1 },
 124 };
 125
 126 #define NUM_TIMEBASE  ARRAY_SIZE(timebases)
 127 #define NUM_VDIV      ARRAY_SIZE(vdivs)
 128
 129 static const char *trigger_sources[] = {
 130         "CH1",
 131         "CH2",
 132         "CH3",
 133         "CH4",
 134         "EXT",
 135         "AC Line",
 136         "D0",
 137         "D1",
 138         "D2",
 139         "D3",
 140         "D4",
 141         "D5",
 142         "D6",
 143         "D7",
 144         "D8",
 145         "D9",
 146         "D10",
 147         "D11",
 148         "D12",
 149         "D13",
 150         "D14",
 151         "D15",
 152 };
 153
 154 static const char *trigger_slopes[] = {
 155         "r",
 156         "f",
 157 };
 158
 159 static const char *coupling[] = {
 160         "AC",
 161         "DC",
 162         "GND",
 163 };
 164
 165 static const uint64_t probe_factor[] = {
 166         1,
 167         2,
 168         5,
 169         10,
 170         20,
 171         50,
 172         100,
 173         200,
 174         500,
 175         1000,
 176 };
 177
 178 /* Do not change the order of entries */
 179 static const char *data_sources[] = {
 180         "Live",
 181         "Memory",
 182         "Segmented",
 183 };
 184
 185 enum vendor {
 186         RIGOL,
 187         AGILENT,
 188 };
 189
 190 enum series {
 191         VS5000,
 192         DS1000,
 193         DS2000,
 194         DS2000A,
 195         DSO1000,
 196         DS1000Z,
 197 };
 198
 199 /* short name, full name */
 200 static const struct rigol_ds_vendor supported_vendors[] = {
 201         [RIGOL] = {"Rigol", "Rigol Technologies"},
 202         [AGILENT] = {"Agilent", "Agilent Technologies"},
 203 };
 204
 205 #define VENDOR(x) &supported_vendors[x]
 206 /* vendor, series, protocol, max timebase, min vdiv, number of horizontal divs,
 207  * live waveform samples, memory buffer samples */
 208 static const struct rigol_ds_series supported_series[] = {
 209         [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
 210                 {50, 1}, {2, 1000}, 14, 2048, 0},
 211         [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
 212                 {50, 1}, {2, 1000}, 12, 600, 1048576},
 213         [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
 214                 {500, 1}, {500, 1000000}, 14, 1400, 14000},
 215         [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
 216                 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
 217         [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
 218                 {50, 1}, {2, 1000}, 12, 600, 20480},
 219         [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
 220                 {50, 1}, {1, 1000}, 12, 1200, 12000000},
 221 };
 222
 223 #define SERIES(x) &supported_series[x]
 224 /* series, model, min timebase, analog channels, digital */
 225 static const struct rigol_ds_model supported_models[] = {
 226         {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
 227         {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
 228         {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
 229         {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
 230         {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
 231         {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
 232         {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
 233         {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
 234         {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
 235         {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
 236         {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
 237         {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
 238         {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
 239         {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
 240         {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
 241         {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
 242         {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
 243         {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
 244         {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
 245         {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
 246         {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
 247         {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
 248         {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
 249         {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
 250         {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
 251         {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
 252         {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
 253         {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
 254         {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
 255         {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
 256         {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, 4, false},
 257         {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, 4, false},
 258         {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, 4, false},
 259         {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, 4, false},
 260         {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, 4, false},
 261         {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, 4, false},
 262         {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, 4, false},
 263         {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, 4, true},
 264         {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, 4, true},
 265         {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, 4, true},
 266         {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, 4, true},
 267 };
 268
 269 static struct sr_dev_driver rigol_ds_driver_info;
 270
 271 static void clear_helper(void *priv)
 272 {
 273         struct dev_context *devc;
 274         unsigned int i;
 275
 276         devc = priv;
 277         g_free(devc->data);
 278         g_free(devc->buffer);
 279         for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
 280                 g_free(devc->coupling[i]);
 281         g_free(devc->trigger_source);
 282         g_free(devc->trigger_slope);
 283         g_free(devc->analog_groups);
 284         g_free(devc);
 285 }
 286
 287 static int dev_clear(const struct sr_dev_driver *di)
 288 {
 289         return std_dev_clear(di, clear_helper);
 290 }
 291
 292 static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
 293 {
 294         struct dev_context *devc;
 295         struct sr_dev_inst *sdi;
 296         struct sr_scpi_hw_info *hw_info;
 297         struct sr_channel *ch;
 298         long n[3];
 299         unsigned int i;
 300         const struct rigol_ds_model *model = NULL;
 301         gchar *channel_name, **version;
 302
 303         if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
 304                 sr_info("Couldn't get IDN response, retrying.");
 305                 sr_scpi_close(scpi);
 306                 sr_scpi_open(scpi);
 307                 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
 308                         sr_info("Couldn't get IDN response.");
 309                         return NULL;
 310                 }
 311         }
 312
 313         for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
 314                 if (!g_ascii_strcasecmp(hw_info->manufacturer,
 315                                         supported_models[i].series->vendor->full_name) &&
 316                                 !strcmp(hw_info->model, supported_models[i].name)) {
 317                         model = &supported_models[i];
 318                         break;
 319                 }
 320         }
 321
 322         if (!model) {
 323                 sr_scpi_hw_info_free(hw_info);
 324                 return NULL;
 325         }
 326
 327         sdi = g_malloc0(sizeof(struct sr_dev_inst));
 328         sdi->vendor = g_strdup(model->series->vendor->name);
 329         sdi->model = g_strdup(model->name);
 330         sdi->version = g_strdup(hw_info->firmware_version);
 331         sdi->conn = scpi;
 332         sdi->driver = &rigol_ds_driver_info;
 333         sdi->inst_type = SR_INST_SCPI;
 334         sdi->serial_num = g_strdup(hw_info->serial_number);
 335         devc = g_malloc0(sizeof(struct dev_context));
 336         devc->limit_frames = 0;
 337         devc->model = model;
 338         devc->format = model->series->format;
 339
 340         /* DS1000 models with firmware before 0.2.4 used the old data format. */
 341         if (model->series == SERIES(DS1000)) {
 342                 version = g_strsplit(hw_info->firmware_version, ".", 0);
 343                 do {
 344                         if (!version[0] || !version[1] || !version[2])
 345                                 break;
 346                         if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
 347                                 break;
 348                         for (i = 0; i < 3; i++) {
 349                                 if (sr_atol(version[i], &n[i]) != SR_OK)
 350                                         break;
 351                         }
 352                         if (i != 3)
 353                                 break;
 354                         scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2];
 355                         if (scpi->firmware_version < 24) {
 356                                 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
 357                                 devc->format = FORMAT_RAW;
 358                         }
 359                         break;
 360                 } while (0);
 361                 g_strfreev(version);
 362         }
 363
 364         sr_scpi_hw_info_free(hw_info);
 365
 366         devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
 367                                         model->analog_channels);
 368
 369         for (i = 0; i < model->analog_channels; i++) {
 370                 channel_name = g_strdup_printf("CH%d", i + 1);
 371                 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
 372
 373                 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
 374
 375                 devc->analog_groups[i]->name = channel_name;
 376                 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
 377                 sdi->channel_groups = g_slist_append(sdi->channel_groups,
 378                                 devc->analog_groups[i]);
 379         }
 380
 381         if (devc->model->has_digital) {
 382                 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
 383
 384                 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
 385                         channel_name = g_strdup_printf("D%d", i);
 386                         ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
 387                         g_free(channel_name);
 388                         devc->digital_group->channels = g_slist_append(
 389                                         devc->digital_group->channels, ch);
 390                 }
 391                 devc->digital_group->name = g_strdup("LA");
 392                 sdi->channel_groups = g_slist_append(sdi->channel_groups,
 393                                 devc->digital_group);
 394         }
 395
 396         for (i = 0; i < NUM_TIMEBASE; i++) {
 397                 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
 398                         devc->timebases = &timebases[i];
 399                 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
 400                         devc->num_timebases = &timebases[i] - devc->timebases + 1;
 401         }
 402
 403         for (i = 0; i < NUM_VDIV; i++) {
 404                 if (!memcmp(&devc->model->series->min_vdiv,
 405                                         &vdivs[i], sizeof(uint64_t[2]))) {
 406                         devc->vdivs = &vdivs[i];
 407                         devc->num_vdivs = NUM_VDIV - i;
 408                 }
 409         }
 410
 411         devc->buffer = g_malloc(ACQ_BUFFER_SIZE);
 412         devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float));
 413
 414         devc->data_source = DATA_SOURCE_LIVE;
 415
 416         sdi->priv = devc;
 417
 418         return sdi;
 419 }
 420
 421 static GSList *scan(struct sr_dev_driver *di, GSList *options)
 422 {
 423         return sr_scpi_scan(di->context, options, probe_device);
 424 }
 425
 426 static int dev_open(struct sr_dev_inst *sdi)
 427 {
 428         int ret;
 429         struct sr_scpi_dev_inst *scpi = sdi->conn;
 430
 431         if ((ret = sr_scpi_open(scpi)) < 0) {
 432                 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
 433                 return SR_ERR;
 434         }
 435
 436         if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
 437                 sr_err("Failed to get device config: %s.", sr_strerror(ret));
 438                 return SR_ERR;
 439         }
 440
 441         sdi->status = SR_ST_ACTIVE;
 442
 443         return SR_OK;
 444 }
 445
 446 static int dev_close(struct sr_dev_inst *sdi)
 447 {
 448         struct sr_scpi_dev_inst *scpi;
 449         struct dev_context *devc;
 450
 451         if (sdi->status != SR_ST_ACTIVE)
 452                 return SR_ERR_DEV_CLOSED;
 453
 454         scpi = sdi->conn;
 455         devc = sdi->priv;
 456
 457         if (devc->model->series->protocol == PROTOCOL_V2)
 458                 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
 459
 460         if (scpi) {
 461                 if (sr_scpi_close(scpi) < 0)
 462                         return SR_ERR;
 463                 sdi->status = SR_ST_INACTIVE;
 464         }
 465
 466         return SR_OK;
 467 }
 468
 469 static int analog_frame_size(const struct sr_dev_inst *sdi)
 470 {
 471         struct dev_context *devc = sdi->priv;
 472         struct sr_channel *ch;
 473         int analog_channels = 0;
 474         GSList *l;
 475
 476         for (l = sdi->channels; l; l = l->next) {
 477                 ch = l->data;
 478                 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
 479                         analog_channels++;
 480         }
 481
 482         if (analog_channels == 0)
 483                 return 0;
 484
 485         switch (devc->data_source) {
 486         case DATA_SOURCE_LIVE:
 487                 return devc->model->series->live_samples;
 488         case DATA_SOURCE_MEMORY:
 489                 return devc->model->series->buffer_samples / analog_channels;
 490         default:
 491                 return 0;
 492         }
 493 }
 494
 495 static int digital_frame_size(const struct sr_dev_inst *sdi)
 496 {
 497         struct dev_context *devc = sdi->priv;
 498
 499         switch (devc->data_source) {
 500         case DATA_SOURCE_LIVE:
 501                 return devc->model->series->live_samples * 2;
 502         case DATA_SOURCE_MEMORY:
 503                 return devc->model->series->buffer_samples * 2;
 504         default:
 505                 return 0;
 506         }
 507 }
 508
 509 static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
 510                 const struct sr_channel_group *cg)
 511 {
 512         struct dev_context *devc;
 513         struct sr_channel *ch;
 514         const char *tmp_str;
 515         uint64_t samplerate;
 516         int analog_channel = -1;
 517         float smallest_diff = INFINITY;
 518         int idx = -1;
 519         unsigned i;
 520
 521         if (!sdi)
 522                 return SR_ERR_ARG;
 523
 524         devc = sdi->priv;
 525
 526         /* If a channel group is specified, it must be a valid one. */
 527         if (cg && !g_slist_find(sdi->channel_groups, cg)) {
 528                 sr_err("Invalid channel group specified.");
 529                 return SR_ERR;
 530         }
 531
 532         if (cg) {
 533                 ch = g_slist_nth_data(cg->channels, 0);
 534                 if (!ch)
 535                         return SR_ERR;
 536                 if (ch->type == SR_CHANNEL_ANALOG) {
 537                         if (ch->name[2] < '1' || ch->name[2] > '4')
 538                                 return SR_ERR;
 539                         analog_channel = ch->name[2] - '1';
 540                 }
 541         }
 542
 543         switch (key) {
 544         case SR_CONF_NUM_HDIV:
 545                 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
 546                 break;
 547         case SR_CONF_NUM_VDIV:
 548                 *data = g_variant_new_int32(devc->num_vdivs);
 549                 break;
 550         case SR_CONF_DATA_SOURCE:
 551                 if (devc->data_source == DATA_SOURCE_LIVE)
 552                         *data = g_variant_new_string("Live");
 553                 else if (devc->data_source == DATA_SOURCE_MEMORY)
 554                         *data = g_variant_new_string("Memory");
 555                 else
 556                         *data = g_variant_new_string("Segmented");
 557                 break;
 558         case SR_CONF_SAMPLERATE:
 559                 if (devc->data_source == DATA_SOURCE_LIVE) {
 560                         samplerate = analog_frame_size(sdi) /
 561                                 (devc->timebase * devc->model->series->num_horizontal_divs);
 562                         *data = g_variant_new_uint64(samplerate);
 563                 } else {
 564                         sr_dbg("Unknown data source: %d.", devc->data_source);
 565                         return SR_ERR_NA;
 566                 }
 567                 break;
 568         case SR_CONF_TRIGGER_SOURCE:
 569                 if (!strcmp(devc->trigger_source, "ACL"))
 570                         tmp_str = "AC Line";
 571                 else if (!strcmp(devc->trigger_source, "CHAN1"))
 572                         tmp_str = "CH1";
 573                 else if (!strcmp(devc->trigger_source, "CHAN2"))
 574                         tmp_str = "CH2";
 575                 else if (!strcmp(devc->trigger_source, "CHAN3"))
 576                         tmp_str = "CH3";
 577                 else if (!strcmp(devc->trigger_source, "CHAN4"))
 578                         tmp_str = "CH4";
 579                 else
 580                         tmp_str = devc->trigger_source;
 581                 *data = g_variant_new_string(tmp_str);
 582                 break;
 583         case SR_CONF_TRIGGER_SLOPE:
 584                 if (!strncmp(devc->trigger_slope, "POS", 3)) {
 585                         tmp_str = "r";
 586                 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
 587                         tmp_str = "f";
 588                 } else {
 589                         sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
 590                         return SR_ERR_NA;
 591                 }
 592                 *data = g_variant_new_string(tmp_str);
 593                 break;
 594         case SR_CONF_TRIGGER_LEVEL:
 595                 *data = g_variant_new_double(devc->trigger_level);
 596                 break;
 597         case SR_CONF_TIMEBASE:
 598                 for (i = 0; i < devc->num_timebases; i++) {
 599                         float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
 600                         float diff = fabs(devc->timebase - tb);
 601                         if (diff < smallest_diff) {
 602                                 smallest_diff = diff;
 603                                 idx = i;
 604                         }
 605                 }
 606                 if (idx < 0) {
 607                         sr_dbg("Negative timebase index: %d.", idx);
 608                         return SR_ERR_NA;
 609                 }
 610                 *data = g_variant_new("(tt)", devc->timebases[idx][0],
 611                                               devc->timebases[idx][1]);
 612                 break;
 613         case SR_CONF_VDIV:
 614                 if (analog_channel < 0) {
 615                         sr_dbg("Negative analog channel: %d.", analog_channel);
 616                         return SR_ERR_NA;
 617                 }
 618                 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
 619                         float vdiv = (float)vdivs[i][0] / vdivs[i][1];
 620                         float diff = fabs(devc->vdiv[analog_channel] - vdiv);
 621                         if (diff < smallest_diff) {
 622                                 smallest_diff = diff;
 623                                 idx = i;
 624                         }
 625                 }
 626                 if (idx < 0) {
 627                         sr_dbg("Negative vdiv index: %d.", idx);
 628                         return SR_ERR_NA;
 629                 }
 630                 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
 631                 break;
 632         case SR_CONF_COUPLING:
 633                 if (analog_channel < 0) {
 634                         sr_dbg("Negative analog channel: %d.", analog_channel);
 635                         return SR_ERR_NA;
 636                 }
 637                 *data = g_variant_new_string(devc->coupling[analog_channel]);
 638                 break;
 639         case SR_CONF_PROBE_FACTOR:
 640                 if (analog_channel < 0) {
 641                         sr_dbg("Negative analog channel: %d.", analog_channel);
 642                         return SR_ERR_NA;
 643                 }
 644                 *data = g_variant_new_uint64(devc->attenuation[analog_channel]);
 645                 break;
 646         default:
 647                 return SR_ERR_NA;
 648         }
 649
 650         return SR_OK;
 651 }
 652
 653 static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
 654                 const struct sr_channel_group *cg)
 655 {
 656         struct dev_context *devc;
 657         uint64_t p, q;
 658         double t_dbl;
 659         unsigned int i, j;
 660         int ret;
 661         const char *tmp_str;
 662         char buffer[16];
 663
 664         devc = sdi->priv;
 665
 666         if (sdi->status != SR_ST_ACTIVE)
 667                 return SR_ERR_DEV_CLOSED;
 668
 669         /* If a channel group is specified, it must be a valid one. */
 670         if (cg && !g_slist_find(sdi->channel_groups, cg)) {
 671                 sr_err("Invalid channel group specified.");
 672                 return SR_ERR;
 673         }
 674
 675         ret = SR_OK;
 676         switch (key) {
 677         case SR_CONF_LIMIT_FRAMES:
 678                 devc->limit_frames = g_variant_get_uint64(data);
 679                 break;
 680         case SR_CONF_TRIGGER_SLOPE:
 681                 tmp_str = g_variant_get_string(data, NULL);
 682
 683                 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r')) {
 684                         sr_err("Unknown trigger slope: '%s'.",
 685                                (tmp_str) ? tmp_str : "NULL");
 686                         return SR_ERR_ARG;
 687                 }
 688
 689                 g_free(devc->trigger_slope);
 690                 devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG");
 691                 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
 692                 break;
 693         case SR_CONF_HORIZ_TRIGGERPOS:
 694                 t_dbl = g_variant_get_double(data);
 695                 if (t_dbl < 0.0 || t_dbl > 1.0) {
 696                         sr_err("Invalid horiz. trigger position: %g.", t_dbl);
 697                         return SR_ERR;
 698                 }
 699                 devc->horiz_triggerpos = t_dbl;
 700                 /* We have the trigger offset as a percentage of the frame, but
 701                  * need to express this in seconds. */
 702                 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
 703                 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
 704                 ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
 705                 break;
 706         case SR_CONF_TRIGGER_LEVEL:
 707                 t_dbl = g_variant_get_double(data);
 708                 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl);
 709                 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:LEV %s", buffer);
 710                 if (ret == SR_OK)
 711                         devc->trigger_level = t_dbl;
 712                 break;
 713         case SR_CONF_TIMEBASE:
 714                 g_variant_get(data, "(tt)", &p, &q);
 715                 for (i = 0; i < devc->num_timebases; i++) {
 716                         if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
 717                                 devc->timebase = (float)p / q;
 718                                 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
 719                                                 devc->timebase);
 720                                 ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
 721                                 break;
 722                         }
 723                 }
 724                 if (i == devc->num_timebases) {
 725                         sr_err("Invalid timebase index: %d.", i);
 726                         ret = SR_ERR_ARG;
 727                 }
 728                 break;
 729         case SR_CONF_TRIGGER_SOURCE:
 730                 tmp_str = g_variant_get_string(data, NULL);
 731                 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
 732                         if (!strcmp(trigger_sources[i], tmp_str)) {
 733                                 g_free(devc->trigger_source);
 734                                 devc->trigger_source = g_strdup(trigger_sources[i]);
 735                                 if (!strcmp(devc->trigger_source, "AC Line"))
 736                                         tmp_str = "ACL";
 737                                 else if (!strcmp(devc->trigger_source, "CH1"))
 738                                         tmp_str = "CHAN1";
 739                                 else if (!strcmp(devc->trigger_source, "CH2"))
 740                                         tmp_str = "CHAN2";
 741                                 else if (!strcmp(devc->trigger_source, "CH3"))
 742                                         tmp_str = "CHAN3";
 743                                 else if (!strcmp(devc->trigger_source, "CH4"))
 744                                         tmp_str = "CHAN4";
 745                                 else
 746                                         tmp_str = (char *)devc->trigger_source;
 747                                 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
 748                                 break;
 749                         }
 750                 }
 751                 if (i == ARRAY_SIZE(trigger_sources)) {
 752                         sr_err("Invalid trigger source index: %d.", i);
 753                         ret = SR_ERR_ARG;
 754                 }
 755                 break;
 756         case SR_CONF_VDIV:
 757                 if (!cg) {
 758                         sr_err("No channel group specified.");
 759                         return SR_ERR_CHANNEL_GROUP;
 760                 }
 761                 g_variant_get(data, "(tt)", &p, &q);
 762                 for (i = 0; i < devc->model->analog_channels; i++) {
 763                         if (cg == devc->analog_groups[i]) {
 764                                 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
 765                                         if (vdivs[j][0] != p || vdivs[j][1] != q)
 766                                                 continue;
 767                                         devc->vdiv[i] = (float)p / q;
 768                                         g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
 769                                                         devc->vdiv[i]);
 770                                         return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
 771                                                         buffer);
 772                                 }
 773                                 sr_err("Invalid vdiv index: %d.", j);
 774                                 return SR_ERR_ARG;
 775                         }
 776                 }
 777                 sr_dbg("Didn't set vdiv, unknown channel(group).");
 778                 return SR_ERR_NA;
 779         case SR_CONF_COUPLING:
 780                 if (!cg) {
 781                         sr_err("No channel group specified.");
 782                         return SR_ERR_CHANNEL_GROUP;
 783                 }
 784                 tmp_str = g_variant_get_string(data, NULL);
 785                 for (i = 0; i < devc->model->analog_channels; i++) {
 786                         if (cg == devc->analog_groups[i]) {
 787                                 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
 788                                         if (!strcmp(tmp_str, coupling[j])) {
 789                                                 g_free(devc->coupling[i]);
 790                                                 devc->coupling[i] = g_strdup(coupling[j]);
 791                                                 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
 792                                                                 devc->coupling[i]);
 793                                         }
 794                                 }
 795                                 sr_err("Invalid coupling index: %d.", j);
 796                                 return SR_ERR_ARG;
 797                         }
 798                 }
 799                 sr_dbg("Didn't set coupling, unknown channel(group).");
 800                 return SR_ERR_NA;
 801         case SR_CONF_PROBE_FACTOR:
 802                 if (!cg) {
 803                         sr_err("No channel group specified.");
 804                         return SR_ERR_CHANNEL_GROUP;
 805                 }
 806                 p = g_variant_get_uint64(data);
 807                 for (i = 0; i < devc->model->analog_channels; i++) {
 808                         if (cg == devc->analog_groups[i]) {
 809                                 for (j = 0; j < ARRAY_SIZE(probe_factor); j++) {
 810                                         if (p == probe_factor[j]) {
 811                                                 devc->attenuation[i] = p;
 812                                                 ret = rigol_ds_config_set(sdi, ":CHAN%d:PROB %"PRIu64,
 813                                                                           i + 1, p);
 814                                                 if (ret == SR_OK)
 815                                                         rigol_ds_get_dev_cfg_vertical(sdi);
 816                                                 return ret;
 817                                         }
 818                                 }
 819                                 sr_err("Invalid probe factor: %"PRIu64".", p);
 820                                 return SR_ERR_ARG;
 821                         }
 822                 }
 823                 sr_dbg("Didn't set probe factor, unknown channel(group).");
 824                 return SR_ERR_NA;
 825         case SR_CONF_DATA_SOURCE:
 826                 tmp_str = g_variant_get_string(data, NULL);
 827                 if (!strcmp(tmp_str, "Live"))
 828                         devc->data_source = DATA_SOURCE_LIVE;
 829                 else if (devc->model->series->protocol >= PROTOCOL_V2
 830                         && !strcmp(tmp_str, "Memory"))
 831                         devc->data_source = DATA_SOURCE_MEMORY;
 832                 else if (devc->model->series->protocol >= PROTOCOL_V3
 833                          && !strcmp(tmp_str, "Segmented"))
 834                         devc->data_source = DATA_SOURCE_SEGMENTED;
 835                 else {
 836                         sr_err("Unknown data source: '%s'.", tmp_str);
 837                         return SR_ERR;
 838                 }
 839                 break;
 840         default:
 841                 return SR_ERR_NA;
 842         }
 843
 844         return ret;
 845 }
 846
 847 static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
 848                 const struct sr_channel_group *cg)
 849 {
 850         GVariant *tuple, *rational[2];
 851         GVariantBuilder gvb;
 852         unsigned int i;
 853         struct dev_context *devc = NULL;
 854
 855         if (key == SR_CONF_SCAN_OPTIONS) {
 856                 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
 857                                 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
 858                 return SR_OK;
 859         } else if (key == SR_CONF_DEVICE_OPTIONS && !cg) {
 860                 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
 861                                 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
 862                 return SR_OK;
 863         }
 864
 865         /* Every other option requires a valid device instance. */
 866         if (!sdi)
 867                 return SR_ERR_ARG;
 868         devc = sdi->priv;
 869
 870         /* If a channel group is specified, it must be a valid one. */
 871         if (cg && !g_slist_find(sdi->channel_groups, cg)) {
 872                 sr_err("Invalid channel group specified.");
 873                 return SR_ERR;
 874         }
 875
 876         switch (key) {
 877         case SR_CONF_DEVICE_OPTIONS:
 878                 if (!cg) {
 879                         sr_err("No channel group specified.");
 880                         return SR_ERR_CHANNEL_GROUP;
 881                 }
 882                 if (cg == devc->digital_group) {
 883                         *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
 884                                 NULL, 0, sizeof(uint32_t));
 885                         return SR_OK;
 886                 } else {
 887                         for (i = 0; i < devc->model->analog_channels; i++) {
 888                                 if (cg == devc->analog_groups[i]) {
 889                                         *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
 890                                                 analog_devopts, ARRAY_SIZE(analog_devopts), sizeof(uint32_t));
 891                                         return SR_OK;
 892                                 }
 893                         }
 894                         return SR_ERR_NA;
 895                 }
 896                 break;
 897         case SR_CONF_COUPLING:
 898                 if (!cg) {
 899                         sr_err("No channel group specified.");
 900                         return SR_ERR_CHANNEL_GROUP;
 901                 }
 902                 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
 903                 break;
 904         case SR_CONF_PROBE_FACTOR:
 905                 if (!cg) {
 906                         sr_err("No channel group specified.");
 907                         return SR_ERR_CHANNEL_GROUP;
 908                 }
 909                 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT64,
 910                         probe_factor, ARRAY_SIZE(probe_factor), sizeof(uint64_t));
 911                 break;
 912         case SR_CONF_VDIV:
 913                 if (!devc)
 914                         /* Can't know this until we have the exact model. */
 915                         return SR_ERR_ARG;
 916                 if (!cg) {
 917                         sr_err("No channel group specified.");
 918                         return SR_ERR_CHANNEL_GROUP;
 919                 }
 920                 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
 921                 for (i = 0; i < devc->num_vdivs; i++) {
 922                         rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
 923                         rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
 924                         tuple = g_variant_new_tuple(rational, 2);
 925                         g_variant_builder_add_value(&gvb, tuple);
 926                 }
 927                 *data = g_variant_builder_end(&gvb);
 928                 break;
 929         case SR_CONF_TIMEBASE:
 930                 if (!devc)
 931                         /* Can't know this until we have the exact model. */
 932                         return SR_ERR_ARG;
 933                 if (devc->num_timebases <= 0)
 934                         return SR_ERR_NA;
 935                 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
 936                 for (i = 0; i < devc->num_timebases; i++) {
 937                         rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
 938                         rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
 939                         tuple = g_variant_new_tuple(rational, 2);
 940                         g_variant_builder_add_value(&gvb, tuple);
 941                 }
 942                 *data = g_variant_builder_end(&gvb);
 943                 break;
 944         case SR_CONF_TRIGGER_SOURCE:
 945                 if (!devc)
 946                         /* Can't know this until we have the exact model. */
 947                         return SR_ERR_ARG;
 948                 *data = g_variant_new_strv(trigger_sources,
 949                                 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
 950                 break;
 951         case SR_CONF_TRIGGER_SLOPE:
 952                 *data = g_variant_new_strv(trigger_slopes, ARRAY_SIZE(trigger_slopes));
 953                 break;
 954         case SR_CONF_DATA_SOURCE:
 955                 if (!devc)
 956                         /* Can't know this until we have the exact model. */
 957                         return SR_ERR_ARG;
 958                 switch (devc->model->series->protocol) {
 959                 case PROTOCOL_V1:
 960                         *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
 961                         break;
 962                 case PROTOCOL_V2:
 963                         *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
 964                         break;
 965                 default:
 966                         *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
 967                         break;
 968                 }
 969                 break;
 970         default:
 971                 return SR_ERR_NA;
 972         }
 973
 974         return SR_OK;
 975 }
 976
 977 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 978 {
 979         struct sr_scpi_dev_inst *scpi;
 980         struct dev_context *devc;
 981         struct sr_channel *ch;
 982         struct sr_datafeed_packet packet;
 983         gboolean some_digital;
 984         GSList *l;
 985
 986         if (sdi->status != SR_ST_ACTIVE)
 987                 return SR_ERR_DEV_CLOSED;
 988
 989         scpi = sdi->conn;
 990         devc = sdi->priv;
 991
 992         devc->num_frames = 0;
 993
 994         some_digital = FALSE;
 995         for (l = sdi->channels; l; l = l->next) {
 996                 ch = l->data;
 997                 sr_dbg("handling channel %s", ch->name);
 998                 if (ch->type == SR_CHANNEL_ANALOG) {
 999                         if (ch->enabled)
1000                                 devc->enabled_channels = g_slist_append(
1001                                                 devc->enabled_channels, ch);
1002                         if (ch->enabled != devc->analog_channels[ch->index]) {
1003                                 /* Enabled channel is currently disabled, or vice versa. */
1004                                 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
1005                                                 ch->enabled ? "ON" : "OFF") != SR_OK)
1006                                         return SR_ERR;
1007                                 devc->analog_channels[ch->index] = ch->enabled;
1008                         }
1009                 } else if (ch->type == SR_CHANNEL_LOGIC) {
1010                         /* Only one list entry for DS1000D series. All channels are retrieved
1011                          * together when this entry is processed. */
1012                         if (ch->enabled && (
1013                                                 devc->model->series->protocol > PROTOCOL_V2 ||
1014                                                 !some_digital))
1015                                 devc->enabled_channels = g_slist_append(
1016                                                 devc->enabled_channels, ch);
1017                         if (ch->enabled) {
1018                                 some_digital = TRUE;
1019                                 /* Turn on LA module if currently off. */
1020                                 if (!devc->la_enabled) {
1021                                         if (rigol_ds_config_set(sdi,
1022                                                         devc->model->series->protocol >= PROTOCOL_V4 ?
1023                                                                 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
1024                                                 return SR_ERR;
1025                                         devc->la_enabled = TRUE;
1026                                 }
1027                         }
1028                         if (ch->enabled != devc->digital_channels[ch->index]) {
1029                                 /* Enabled channel is currently disabled, or vice versa. */
1030                                 if (rigol_ds_config_set(sdi,
1031                                                 devc->model->series->protocol >= PROTOCOL_V4 ?
1032                                                         ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index,
1033                                                 ch->enabled ? "ON" : "OFF") != SR_OK)
1034                                         return SR_ERR;
1035                                 devc->digital_channels[ch->index] = ch->enabled;
1036                         }
1037                 }
1038         }
1039
1040         if (!devc->enabled_channels)
1041                 return SR_ERR;
1042
1043         /* Turn off LA module if on and no digital channels selected. */
1044         if (devc->la_enabled && !some_digital)
1045                 if (rigol_ds_config_set(sdi,
1046                                 devc->model->series->protocol >= PROTOCOL_V4 ?
1047                                         ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
1048                         return SR_ERR;
1049
1050         /* Set memory mode. */
1051         if (devc->data_source == DATA_SOURCE_SEGMENTED) {
1052                 sr_err("Data source 'Segmented' not yet supported");
1053                 return SR_ERR;
1054         }
1055
1056         devc->analog_frame_size = analog_frame_size(sdi);
1057         devc->digital_frame_size = digital_frame_size(sdi);
1058
1059         switch (devc->model->series->protocol) {
1060         case PROTOCOL_V2:
1061                 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
1062                         return SR_ERR;
1063                 break;
1064         case PROTOCOL_V3:
1065                 /* Apparently for the DS2000 the memory
1066                  * depth can only be set in Running state -
1067                  * this matches the behaviour of the UI. */
1068                 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1069                         return SR_ERR;
1070                 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
1071                                         devc->analog_frame_size) != SR_OK)
1072                         return SR_ERR;
1073                 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
1074                         return SR_ERR;
1075                 break;
1076         default:
1077                 break;
1078         }
1079
1080         if (devc->data_source == DATA_SOURCE_LIVE)
1081                 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1082                         return SR_ERR;
1083
1084         sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
1085                         rigol_ds_receive, (void *)sdi);
1086
1087         std_session_send_df_header(sdi);
1088
1089         devc->channel_entry = devc->enabled_channels;
1090
1091         if (rigol_ds_capture_start(sdi) != SR_OK)
1092                 return SR_ERR;
1093
1094         /* Start of first frame. */
1095         packet.type = SR_DF_FRAME_BEGIN;
1096         sr_session_send(sdi, &packet);
1097
1098         return SR_OK;
1099 }
1100
1101 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
1102 {
1103         struct dev_context *devc;
1104         struct sr_scpi_dev_inst *scpi;
1105
1106         devc = sdi->priv;
1107
1108         if (sdi->status != SR_ST_ACTIVE) {
1109                 sr_err("Device inactive, can't stop acquisition.");
1110                 return SR_ERR;
1111         }
1112
1113         std_session_send_df_end(sdi);
1114
1115         g_slist_free(devc->enabled_channels);
1116         devc->enabled_channels = NULL;
1117         scpi = sdi->conn;
1118         sr_scpi_source_remove(sdi->session, scpi);
1119
1120         return SR_OK;
1121 }
1122
1123 static struct sr_dev_driver rigol_ds_driver_info = {
1124         .name = "rigol-ds",
1125         .longname = "Rigol DS",
1126         .api_version = 1,
1127         .init = std_init,
1128         .cleanup = std_cleanup,
1129         .scan = scan,
1130         .dev_list = std_dev_list,
1131         .dev_clear = dev_clear,
1132         .config_get = config_get,
1133         .config_set = config_set,
1134         .config_list = config_list,
1135         .dev_open = dev_open,
1136         .dev_close = dev_close,
1137         .dev_acquisition_start = dev_acquisition_start,
1138         .dev_acquisition_stop = dev_acquisition_stop,
1139         .context = NULL,
1140 };
1141 SR_REGISTER_DEV_DRIVER(rigol_ds_driver_info);