]> sigrok.org Git - libsigrok.git/blob - src/hardware/rigol-ds/api.c
rigol-ds: Get correct samplerate for Memory and Segmented sources
[libsigrok.git] / src / hardware / rigol-ds / api.c
1 /*
2  * This file is part of the libsigrok project.
3  *
4  * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5  * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6  * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7  *
8  * This program is free software: you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation, either version 3 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
20  */
21
22 #include <config.h>
23 #include <fcntl.h>
24 #include <unistd.h>
25 #include <stdlib.h>
26 #include <string.h>
27 #include <strings.h>
28 #include <math.h>
29 #include <glib.h>
30 #include <libsigrok/libsigrok.h>
31 #include "libsigrok-internal.h"
32 #include "scpi.h"
33 #include "protocol.h"
34
35 static const uint32_t scanopts[] = {
36         SR_CONF_CONN,
37         SR_CONF_SERIALCOMM,
38 };
39
40 static const uint32_t drvopts[] = {
41         SR_CONF_OSCILLOSCOPE,
42 };
43
44 static const uint32_t devopts[] = {
45         SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
46         SR_CONF_SAMPLERATE | SR_CONF_GET,
47         SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
48         SR_CONF_NUM_HDIV | SR_CONF_GET,
49         SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
50         SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
51         SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52         SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET,
53         SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
54 };
55
56 static const uint32_t devopts_cg_analog[] = {
57         SR_CONF_NUM_VDIV | SR_CONF_GET,
58         SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
59         SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
60         SR_CONF_PROBE_FACTOR | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
61 };
62
63 static const uint64_t timebases[][2] = {
64         /* nanoseconds */
65         { 1, 1000000000 },
66         { 2, 1000000000 },
67         { 5, 1000000000 },
68         { 10, 1000000000 },
69         { 20, 1000000000 },
70         { 50, 1000000000 },
71         { 100, 1000000000 },
72         { 500, 1000000000 },
73         /* microseconds */
74         { 1, 1000000 },
75         { 2, 1000000 },
76         { 5, 1000000 },
77         { 10, 1000000 },
78         { 20, 1000000 },
79         { 50, 1000000 },
80         { 100, 1000000 },
81         { 200, 1000000 },
82         { 500, 1000000 },
83         /* milliseconds */
84         { 1, 1000 },
85         { 2, 1000 },
86         { 5, 1000 },
87         { 10, 1000 },
88         { 20, 1000 },
89         { 50, 1000 },
90         { 100, 1000 },
91         { 200, 1000 },
92         { 500, 1000 },
93         /* seconds */
94         { 1, 1 },
95         { 2, 1 },
96         { 5, 1 },
97         { 10, 1 },
98         { 20, 1 },
99         { 50, 1 },
100         { 100, 1 },
101         { 200, 1 },
102         { 500, 1 },
103         { 1000, 1 },
104 };
105
106 static const uint64_t vdivs[][2] = {
107         /* microvolts */
108         { 500, 1000000 },
109         /* millivolts */
110         { 1, 1000 },
111         { 2, 1000 },
112         { 5, 1000 },
113         { 10, 1000 },
114         { 20, 1000 },
115         { 50, 1000 },
116         { 100, 1000 },
117         { 200, 1000 },
118         { 500, 1000 },
119         /* volts */
120         { 1, 1 },
121         { 2, 1 },
122         { 5, 1 },
123         { 10, 1 },
124         { 20, 1 },
125         { 50, 1 },
126         { 100, 1 },
127 };
128
129 static const char *trigger_sources_2_chans[] = {
130         "CH1", "CH2",
131         "EXT", "AC Line",
132         "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7",
133         "D8", "D9", "D10", "D11", "D12", "D13", "D14", "D15",
134 };
135
136 static const char *trigger_sources_4_chans[] = {
137         "CH1", "CH2", "CH3", "CH4",
138         "EXT", "AC Line",
139         "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7",
140         "D8", "D9", "D10", "D11", "D12", "D13", "D14", "D15",
141 };
142
143 static const char *trigger_slopes[] = {
144         "r", "f",
145 };
146
147 static const char *coupling[] = {
148         "AC", "DC", "GND",
149 };
150
151 static const uint64_t probe_factor[] = {
152         1, 2, 5, 10, 20, 50, 100, 200, 500, 1000,
153 };
154
155 /* Do not change the order of entries */
156 static const char *data_sources[] = {
157         "Live",
158         "Memory",
159         "Segmented",
160 };
161
162 static const struct rigol_ds_command std_cmd[] = {
163         { CMD_GET_HORIZ_TRIGGERPOS, ":TIM:OFFS?" },
164         { CMD_SET_HORIZ_TRIGGERPOS, ":TIM:OFFS %s" },
165 };
166
167 static const struct rigol_ds_command mso7000a_cmd[] = {
168         { CMD_GET_HORIZ_TRIGGERPOS, ":TIM:POS?" },
169         { CMD_SET_HORIZ_TRIGGERPOS, ":TIM:POS %s" },
170 };
171
172 enum vendor {
173         RIGOL,
174         AGILENT,
175 };
176
177 enum series {
178         VS5000,
179         DS1000,
180         DS2000,
181         DS2000A,
182         DSO1000,
183         DSO1000B,
184         DS1000Z,
185         DS4000,
186         MSO5000,
187         MSO7000A,
188 };
189
190 /* short name, full name */
191 static const struct rigol_ds_vendor supported_vendors[] = {
192         [RIGOL] = {"Rigol", "Rigol Technologies"},
193         [AGILENT] = {"Agilent", "Agilent Technologies"},
194 };
195
196 #define VENDOR(x) &supported_vendors[x]
197 /* vendor, series/name, protocol, data format, max timebase, min vdiv,
198  * number of horizontal divs, live waveform samples, memory buffer samples */
199 static const struct rigol_ds_series supported_series[] = {
200         [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
201                 {50, 1}, {2, 1000}, 14, 2048, 0},
202         [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
203                 {50, 1}, {2, 1000}, 12, 600, 1048576},
204         [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
205                 {500, 1}, {500, 1000000}, 14, 1400, 14000},
206         [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
207                 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
208         [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
209                 {50, 1}, {2, 1000}, 12, 600, 20480},
210         [DSO1000B] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
211                 {50, 1}, {2, 1000}, 12, 600, 20480},
212         [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
213                 {50, 1}, {1, 1000}, 12, 1200, 12000000},
214         [DS4000] = {VENDOR(RIGOL), "DS4000", PROTOCOL_V4, FORMAT_IEEE488_2,
215                 {1000, 1}, {1, 1000}, 14, 1400, 0},
216         [MSO5000] = {VENDOR(RIGOL), "MSO5000", PROTOCOL_V5, FORMAT_IEEE488_2,
217                 {1000, 1}, {500, 1000000}, 10, 1000, 0},
218         [MSO7000A] = {VENDOR(AGILENT), "MSO7000A", PROTOCOL_V4, FORMAT_IEEE488_2,
219                 {50, 1}, {2, 1000}, 10, 1000, 8000000},
220 };
221
222 #define SERIES(x) &supported_series[x]
223 /*
224  * Use a macro to select the correct list of trigger sources and its length
225  * based on the number of analog channels and presence of digital channels.
226  */
227 #define CH_INFO(num, digital) \
228         num, digital, trigger_sources_##num##_chans, \
229         digital ? ARRAY_SIZE(trigger_sources_##num##_chans) : (num + 2)
230 /* series, model, min timebase, analog channels, digital */
231 static const struct rigol_ds_model supported_models[] = {
232         {SERIES(VS5000), "VS5022", {20, 1000000000}, CH_INFO(2, false), std_cmd},
233         {SERIES(VS5000), "VS5042", {10, 1000000000}, CH_INFO(2, false), std_cmd},
234         {SERIES(VS5000), "VS5062", {5, 1000000000}, CH_INFO(2, false), std_cmd},
235         {SERIES(VS5000), "VS5102", {2, 1000000000}, CH_INFO(2, false), std_cmd},
236         {SERIES(VS5000), "VS5202", {2, 1000000000}, CH_INFO(2, false), std_cmd},
237         {SERIES(VS5000), "VS5022D", {20, 1000000000}, CH_INFO(2, true), std_cmd},
238         {SERIES(VS5000), "VS5042D", {10, 1000000000}, CH_INFO(2, true), std_cmd},
239         {SERIES(VS5000), "VS5062D", {5, 1000000000}, CH_INFO(2, true), std_cmd},
240         {SERIES(VS5000), "VS5102D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
241         {SERIES(VS5000), "VS5202D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
242         {SERIES(DS1000), "DS1052E", {5, 1000000000}, CH_INFO(2, false), std_cmd},
243         {SERIES(DS1000), "DS1102E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
244         {SERIES(DS1000), "DS1152E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
245         {SERIES(DS1000), "DS1152E-EDU", {2, 1000000000}, CH_INFO(2, false), std_cmd},
246         {SERIES(DS1000), "DS1052D", {5, 1000000000}, CH_INFO(2, true), std_cmd},
247         {SERIES(DS1000), "DS1102D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
248         {SERIES(DS1000), "DS1152D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
249         {SERIES(DS2000), "DS2072", {5, 1000000000}, CH_INFO(2, false), std_cmd},
250         {SERIES(DS2000), "DS2102", {5, 1000000000}, CH_INFO(2, false), std_cmd},
251         {SERIES(DS2000), "DS2202", {2, 1000000000}, CH_INFO(2, false), std_cmd},
252         {SERIES(DS2000), "DS2302", {1, 1000000000}, CH_INFO(2, false), std_cmd},
253         {SERIES(DS2000A), "DS2072A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
254         {SERIES(DS2000A), "DS2102A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
255         {SERIES(DS2000A), "DS2202A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
256         {SERIES(DS2000A), "DS2302A", {1, 1000000000}, CH_INFO(2, false), std_cmd},
257         {SERIES(DS2000A), "MSO2072A", {5, 1000000000}, CH_INFO(2, true), std_cmd},
258         {SERIES(DS2000A), "MSO2102A", {5, 1000000000}, CH_INFO(2, true), std_cmd},
259         {SERIES(DS2000A), "MSO2202A", {2, 1000000000}, CH_INFO(2, true), std_cmd},
260         {SERIES(DS2000A), "MSO2302A", {1, 1000000000}, CH_INFO(2, true), std_cmd},
261         {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
262         {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, CH_INFO(4, false), std_cmd},
263         {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
264         {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, CH_INFO(4, false), std_cmd},
265         {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
266         {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, CH_INFO(4, false), std_cmd},
267         {SERIES(DSO1000B), "DSO1052B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
268         {SERIES(DSO1000B), "DSO1072B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
269         {SERIES(DSO1000B), "DSO1102B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
270         {SERIES(DSO1000B), "DSO1152B", {2, 1000000000}, CH_INFO(2, false), std_cmd},
271         {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
272         {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
273         {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
274         {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, CH_INFO(4, false), std_cmd},
275         {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, CH_INFO(4, false), std_cmd},
276         {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, CH_INFO(4, false), std_cmd},
277         {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, CH_INFO(4, false), std_cmd},
278         {SERIES(DS1000Z), "DS1202Z-E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
279         {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, CH_INFO(4, true), std_cmd},
280         {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, CH_INFO(4, true), std_cmd},
281         {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, CH_INFO(4, true), std_cmd},
282         {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, CH_INFO(4, true), std_cmd},
283         {SERIES(DS4000), "DS4024", {1, 1000000000}, CH_INFO(4, false), std_cmd},
284         {SERIES(MSO5000), "MSO5072", {1, 1000000000}, CH_INFO(2, true), std_cmd},
285         {SERIES(MSO5000), "MSO5074", {1, 1000000000}, CH_INFO(4, true), std_cmd},
286         {SERIES(MSO5000), "MSO5102", {1, 1000000000}, CH_INFO(2, true), std_cmd},
287         {SERIES(MSO5000), "MSO5104", {1, 1000000000}, CH_INFO(4, true), std_cmd},
288         {SERIES(MSO5000), "MSO5204", {1, 1000000000}, CH_INFO(4, true), std_cmd},
289         {SERIES(MSO5000), "MSO5354", {1, 1000000000}, CH_INFO(4, true), std_cmd},
290         /* TODO: Digital channels are not yet supported on MSO7000A. */
291         {SERIES(MSO7000A), "MSO7034A", {2, 1000000000}, CH_INFO(4, false), mso7000a_cmd},
292 };
293
294 static struct sr_dev_driver rigol_ds_driver_info;
295
296 static void clear_helper(struct dev_context *devc)
297 {
298         unsigned int i;
299
300         g_free(devc->data);
301         g_free(devc->buffer);
302         for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
303                 g_free(devc->coupling[i]);
304         g_free(devc->trigger_source);
305         g_free(devc->trigger_slope);
306         g_free(devc->analog_groups);
307 }
308
309 static int dev_clear(const struct sr_dev_driver *di)
310 {
311         return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
312 }
313
314 static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
315 {
316         struct dev_context *devc;
317         struct sr_dev_inst *sdi;
318         struct sr_scpi_hw_info *hw_info;
319         struct sr_channel *ch;
320         long n[3];
321         unsigned int i;
322         const struct rigol_ds_model *model = NULL;
323         gchar *channel_name, **version;
324
325         if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
326                 sr_info("Couldn't get IDN response, retrying.");
327                 sr_scpi_close(scpi);
328                 sr_scpi_open(scpi);
329                 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
330                         sr_info("Couldn't get IDN response.");
331                         return NULL;
332                 }
333         }
334
335         for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
336                 if (!g_ascii_strcasecmp(hw_info->manufacturer,
337                                         supported_models[i].series->vendor->full_name) &&
338                                 !strcmp(hw_info->model, supported_models[i].name)) {
339                         model = &supported_models[i];
340                         break;
341                 }
342         }
343
344         if (!model) {
345                 sr_scpi_hw_info_free(hw_info);
346                 return NULL;
347         }
348
349         sdi = g_malloc0(sizeof(struct sr_dev_inst));
350         sdi->vendor = g_strdup(model->series->vendor->name);
351         sdi->model = g_strdup(model->name);
352         sdi->version = g_strdup(hw_info->firmware_version);
353         sdi->conn = scpi;
354         sdi->driver = &rigol_ds_driver_info;
355         sdi->inst_type = SR_INST_SCPI;
356         sdi->serial_num = g_strdup(hw_info->serial_number);
357         devc = g_malloc0(sizeof(struct dev_context));
358         devc->limit_frames = 0;
359         devc->model = model;
360         devc->format = model->series->format;
361
362         /* DS1000 models with firmware before 0.2.4 used the old data format. */
363         if (model->series == SERIES(DS1000)) {
364                 version = g_strsplit(hw_info->firmware_version, ".", 0);
365                 do {
366                         if (!version[0] || !version[1] || !version[2])
367                                 break;
368                         if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
369                                 break;
370                         for (i = 0; i < 3; i++) {
371                                 if (sr_atol(version[i], &n[i]) != SR_OK)
372                                         break;
373                         }
374                         if (i != 3)
375                                 break;
376                         scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2];
377                         if (scpi->firmware_version < 24) {
378                                 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
379                                 devc->format = FORMAT_RAW;
380                         }
381                         break;
382                 } while (0);
383                 g_strfreev(version);
384         }
385
386         sr_scpi_hw_info_free(hw_info);
387
388         devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
389                                         model->analog_channels);
390
391         for (i = 0; i < model->analog_channels; i++) {
392                 channel_name = g_strdup_printf("CH%d", i + 1);
393                 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
394
395                 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
396
397                 devc->analog_groups[i]->name = channel_name;
398                 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
399                 sdi->channel_groups = g_slist_append(sdi->channel_groups,
400                                 devc->analog_groups[i]);
401         }
402
403         if (devc->model->has_digital) {
404                 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
405
406                 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
407                         channel_name = g_strdup_printf("D%d", i);
408                         ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
409                         g_free(channel_name);
410                         devc->digital_group->channels = g_slist_append(
411                                         devc->digital_group->channels, ch);
412                 }
413                 devc->digital_group->name = g_strdup("LA");
414                 sdi->channel_groups = g_slist_append(sdi->channel_groups,
415                                 devc->digital_group);
416         }
417
418         for (i = 0; i < ARRAY_SIZE(timebases); i++) {
419                 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
420                         devc->timebases = &timebases[i];
421                 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
422                         devc->num_timebases = &timebases[i] - devc->timebases + 1;
423         }
424
425         for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
426                 if (!memcmp(&devc->model->series->min_vdiv,
427                                         &vdivs[i], sizeof(uint64_t[2]))) {
428                         devc->vdivs = &vdivs[i];
429                         devc->num_vdivs = ARRAY_SIZE(vdivs) - i;
430                 }
431         }
432
433         devc->buffer = g_malloc(ACQ_BUFFER_SIZE);
434         devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float));
435
436         devc->data_source = DATA_SOURCE_LIVE;
437
438         sdi->priv = devc;
439
440         return sdi;
441 }
442
443 static GSList *scan(struct sr_dev_driver *di, GSList *options)
444 {
445         return sr_scpi_scan(di->context, options, probe_device);
446 }
447
448 static int dev_open(struct sr_dev_inst *sdi)
449 {
450         int ret;
451         struct sr_scpi_dev_inst *scpi = sdi->conn;
452
453         if ((ret = sr_scpi_open(scpi)) < 0) {
454                 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
455                 return SR_ERR;
456         }
457
458         if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
459                 sr_err("Failed to get device config: %s.", sr_strerror(ret));
460                 return SR_ERR;
461         }
462
463         return SR_OK;
464 }
465
466 static int dev_close(struct sr_dev_inst *sdi)
467 {
468         struct sr_scpi_dev_inst *scpi;
469         struct dev_context *devc;
470
471         scpi = sdi->conn;
472         devc = sdi->priv;
473
474         if (!scpi)
475                 return SR_ERR_BUG;
476
477         if (devc->model->series->protocol == PROTOCOL_V2)
478                 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
479
480         return sr_scpi_close(scpi);
481 }
482
483 static int analog_frame_size(const struct sr_dev_inst *sdi)
484 {
485         struct dev_context *devc = sdi->priv;
486         struct sr_channel *ch;
487         int analog_channels = 0;
488         GSList *l;
489
490         for (l = sdi->channels; l; l = l->next) {
491                 ch = l->data;
492                 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
493                         analog_channels++;
494         }
495
496         if (analog_channels == 0)
497                 return 0;
498
499         switch (devc->data_source) {
500         case DATA_SOURCE_LIVE:
501                 return devc->model->series->live_samples;
502         case DATA_SOURCE_MEMORY:
503                 return devc->model->series->buffer_samples / analog_channels;
504         default:
505                 return 0;
506         }
507 }
508
509 static int digital_frame_size(const struct sr_dev_inst *sdi)
510 {
511         struct dev_context *devc = sdi->priv;
512
513         switch (devc->data_source) {
514         case DATA_SOURCE_LIVE:
515                 return devc->model->series->live_samples * 2;
516         case DATA_SOURCE_MEMORY:
517                 return devc->model->series->buffer_samples * 2;
518         default:
519                 return 0;
520         }
521 }
522
523 static int config_get(uint32_t key, GVariant **data,
524         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
525 {
526         struct dev_context *devc;
527         struct sr_channel *ch;
528         const char *tmp_str;
529         int analog_channel = -1;
530         float smallest_diff = INFINITY;
531         int idx = -1;
532         unsigned i;
533
534         if (!sdi)
535                 return SR_ERR_ARG;
536
537         devc = sdi->priv;
538
539         /* If a channel group is specified, it must be a valid one. */
540         if (cg && !g_slist_find(sdi->channel_groups, cg)) {
541                 sr_err("Invalid channel group specified.");
542                 return SR_ERR;
543         }
544
545         if (cg) {
546                 ch = g_slist_nth_data(cg->channels, 0);
547                 if (!ch)
548                         return SR_ERR;
549                 if (ch->type == SR_CHANNEL_ANALOG) {
550                         if (ch->name[2] < '1' || ch->name[2] > '4')
551                                 return SR_ERR;
552                         analog_channel = ch->name[2] - '1';
553                 }
554         }
555
556         switch (key) {
557         case SR_CONF_NUM_HDIV:
558                 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
559                 break;
560         case SR_CONF_NUM_VDIV:
561                 *data = g_variant_new_int32(devc->num_vdivs);
562                 break;
563         case SR_CONF_DATA_SOURCE:
564                 if (devc->data_source == DATA_SOURCE_LIVE)
565                         *data = g_variant_new_string("Live");
566                 else if (devc->data_source == DATA_SOURCE_MEMORY)
567                         *data = g_variant_new_string("Memory");
568                 else
569                         *data = g_variant_new_string("Segmented");
570                 break;
571         case SR_CONF_SAMPLERATE:
572                 *data = g_variant_new_uint64(devc->sample_rate);
573                 break;
574         case SR_CONF_TRIGGER_SOURCE:
575                 if (!strcmp(devc->trigger_source, "ACL"))
576                         tmp_str = "AC Line";
577                 else if (!strcmp(devc->trigger_source, "CHAN1"))
578                         tmp_str = "CH1";
579                 else if (!strcmp(devc->trigger_source, "CHAN2"))
580                         tmp_str = "CH2";
581                 else if (!strcmp(devc->trigger_source, "CHAN3"))
582                         tmp_str = "CH3";
583                 else if (!strcmp(devc->trigger_source, "CHAN4"))
584                         tmp_str = "CH4";
585                 else
586                         tmp_str = devc->trigger_source;
587                 *data = g_variant_new_string(tmp_str);
588                 break;
589         case SR_CONF_TRIGGER_SLOPE:
590                 if (!strncmp(devc->trigger_slope, "POS", 3)) {
591                         tmp_str = "r";
592                 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
593                         tmp_str = "f";
594                 } else {
595                         sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
596                         return SR_ERR_NA;
597                 }
598                 *data = g_variant_new_string(tmp_str);
599                 break;
600         case SR_CONF_TRIGGER_LEVEL:
601                 *data = g_variant_new_double(devc->trigger_level);
602                 break;
603         case SR_CONF_TIMEBASE:
604                 for (i = 0; i < devc->num_timebases; i++) {
605                         float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
606                         float diff = fabs(devc->timebase - tb);
607                         if (diff < smallest_diff) {
608                                 smallest_diff = diff;
609                                 idx = i;
610                         }
611                 }
612                 if (idx < 0) {
613                         sr_dbg("Negative timebase index: %d.", idx);
614                         return SR_ERR_NA;
615                 }
616                 *data = g_variant_new("(tt)", devc->timebases[idx][0],
617                                               devc->timebases[idx][1]);
618                 break;
619         case SR_CONF_VDIV:
620                 if (analog_channel < 0) {
621                         sr_dbg("Negative analog channel: %d.", analog_channel);
622                         return SR_ERR_NA;
623                 }
624                 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
625                         float vdiv = (float)vdivs[i][0] / vdivs[i][1];
626                         float diff = fabs(devc->vdiv[analog_channel] - vdiv);
627                         if (diff < smallest_diff) {
628                                 smallest_diff = diff;
629                                 idx = i;
630                         }
631                 }
632                 if (idx < 0) {
633                         sr_dbg("Negative vdiv index: %d.", idx);
634                         return SR_ERR_NA;
635                 }
636                 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
637                 break;
638         case SR_CONF_COUPLING:
639                 if (analog_channel < 0) {
640                         sr_dbg("Negative analog channel: %d.", analog_channel);
641                         return SR_ERR_NA;
642                 }
643                 *data = g_variant_new_string(devc->coupling[analog_channel]);
644                 break;
645         case SR_CONF_PROBE_FACTOR:
646                 if (analog_channel < 0) {
647                         sr_dbg("Negative analog channel: %d.", analog_channel);
648                         return SR_ERR_NA;
649                 }
650                 *data = g_variant_new_uint64(devc->attenuation[analog_channel]);
651                 break;
652         default:
653                 return SR_ERR_NA;
654         }
655
656         return SR_OK;
657 }
658
659 static int config_set(uint32_t key, GVariant *data,
660         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
661 {
662         struct dev_context *devc;
663         uint64_t p;
664         double t_dbl;
665         int ret, idx, i;
666         const char *tmp_str;
667         char buffer[16];
668
669         devc = sdi->priv;
670
671         /* If a channel group is specified, it must be a valid one. */
672         if (cg && !g_slist_find(sdi->channel_groups, cg)) {
673                 sr_err("Invalid channel group specified.");
674                 return SR_ERR;
675         }
676
677         switch (key) {
678         case SR_CONF_LIMIT_FRAMES:
679                 devc->limit_frames = g_variant_get_uint64(data);
680                 break;
681         case SR_CONF_TRIGGER_SLOPE:
682                 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(trigger_slopes))) < 0)
683                         return SR_ERR_ARG;
684                 g_free(devc->trigger_slope);
685                 devc->trigger_slope = g_strdup((trigger_slopes[idx][0] == 'r') ? "POS" : "NEG");
686                 return rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
687         case SR_CONF_HORIZ_TRIGGERPOS:
688                 t_dbl = g_variant_get_double(data);
689                 if (t_dbl < 0.0 || t_dbl > 1.0) {
690                         sr_err("Invalid horiz. trigger position: %g.", t_dbl);
691                         return SR_ERR;
692                 }
693                 devc->horiz_triggerpos = t_dbl;
694                 /* We have the trigger offset as a percentage of the frame, but
695                  * need to express this in seconds. */
696                 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
697                 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
698                 return rigol_ds_config_set(sdi,
699                         devc->model->cmds[CMD_SET_HORIZ_TRIGGERPOS].str, buffer);
700         case SR_CONF_TRIGGER_LEVEL:
701                 t_dbl = g_variant_get_double(data);
702                 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl);
703                 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:LEV %s", buffer);
704                 if (ret == SR_OK)
705                         devc->trigger_level = t_dbl;
706                 return ret;
707         case SR_CONF_TIMEBASE:
708                 if ((idx = std_u64_tuple_idx(data, devc->timebases, devc->num_timebases)) < 0)
709                         return SR_ERR_ARG;
710                 devc->timebase = (float)devc->timebases[idx][0] / devc->timebases[idx][1];
711                 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
712                                 devc->timebase);
713                 return rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
714         case SR_CONF_TRIGGER_SOURCE:
715                 if ((idx = std_str_idx(data, devc->model->trigger_sources, devc->model->num_trigger_sources)) < 0)
716                         return SR_ERR_ARG;
717                 g_free(devc->trigger_source);
718                 devc->trigger_source = g_strdup(devc->model->trigger_sources[idx]);
719                 if (!strcmp(devc->trigger_source, "AC Line"))
720                         tmp_str = "ACL";
721                 else if (!strcmp(devc->trigger_source, "CH1"))
722                         tmp_str = "CHAN1";
723                 else if (!strcmp(devc->trigger_source, "CH2"))
724                         tmp_str = "CHAN2";
725                 else if (!strcmp(devc->trigger_source, "CH3"))
726                         tmp_str = "CHAN3";
727                 else if (!strcmp(devc->trigger_source, "CH4"))
728                         tmp_str = "CHAN4";
729                 else
730                         tmp_str = (char *)devc->trigger_source;
731                 return rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
732         case SR_CONF_VDIV:
733                 if (!cg)
734                         return SR_ERR_CHANNEL_GROUP;
735                 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
736                         return SR_ERR_ARG;
737                 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(vdivs))) < 0)
738                         return SR_ERR_ARG;
739                 devc->vdiv[i] = (float)vdivs[idx][0] / vdivs[idx][1];
740                 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", devc->vdiv[i]);
741                 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1, buffer);
742         case SR_CONF_COUPLING:
743                 if (!cg)
744                         return SR_ERR_CHANNEL_GROUP;
745                 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
746                         return SR_ERR_ARG;
747                 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(coupling))) < 0)
748                         return SR_ERR_ARG;
749                 g_free(devc->coupling[i]);
750                 devc->coupling[i] = g_strdup(coupling[idx]);
751                 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1, devc->coupling[i]);
752         case SR_CONF_PROBE_FACTOR:
753                 if (!cg)
754                         return SR_ERR_CHANNEL_GROUP;
755                 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
756                         return SR_ERR_ARG;
757                 if ((idx = std_u64_idx(data, ARRAY_AND_SIZE(probe_factor))) < 0)
758                         return SR_ERR_ARG;
759                 p = g_variant_get_uint64(data);
760                 devc->attenuation[i] = probe_factor[idx];
761                 ret = rigol_ds_config_set(sdi, ":CHAN%d:PROB %"PRIu64, i + 1, p);
762                 if (ret == SR_OK)
763                         rigol_ds_get_dev_cfg_vertical(sdi);
764                 return ret;
765         case SR_CONF_DATA_SOURCE:
766                 tmp_str = g_variant_get_string(data, NULL);
767                 if (!strcmp(tmp_str, "Live"))
768                         devc->data_source = DATA_SOURCE_LIVE;
769                 else if (devc->model->series->protocol >= PROTOCOL_V2
770                         && !strcmp(tmp_str, "Memory"))
771                         devc->data_source = DATA_SOURCE_MEMORY;
772                 else if (devc->model->series->protocol >= PROTOCOL_V3
773                          && !strcmp(tmp_str, "Segmented"))
774                         devc->data_source = DATA_SOURCE_SEGMENTED;
775                 else {
776                         sr_err("Unknown data source: '%s'.", tmp_str);
777                         return SR_ERR;
778                 }
779                 break;
780         default:
781                 return SR_ERR_NA;
782         }
783
784         return SR_OK;
785 }
786
787 static int config_list(uint32_t key, GVariant **data,
788         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
789 {
790         struct dev_context *devc;
791
792         devc = (sdi) ? sdi->priv : NULL;
793
794         switch (key) {
795         case SR_CONF_SCAN_OPTIONS:
796         case SR_CONF_DEVICE_OPTIONS:
797                 if (!cg)
798                         return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
799                 if (!devc)
800                         return SR_ERR_ARG;
801                 if (cg == devc->digital_group) {
802                         *data = std_gvar_array_u32(NULL, 0);
803                         return SR_OK;
804                 } else {
805                         if (std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels) < 0)
806                                 return SR_ERR_ARG;
807                         *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg_analog));
808                         return SR_OK;
809                 }
810                 break;
811         case SR_CONF_COUPLING:
812                 if (!cg)
813                         return SR_ERR_CHANNEL_GROUP;
814                 *data = g_variant_new_strv(ARRAY_AND_SIZE(coupling));
815                 break;
816         case SR_CONF_PROBE_FACTOR:
817                 if (!cg)
818                         return SR_ERR_CHANNEL_GROUP;
819                 *data = std_gvar_array_u64(ARRAY_AND_SIZE(probe_factor));
820                 break;
821         case SR_CONF_VDIV:
822                 if (!devc)
823                         /* Can't know this until we have the exact model. */
824                         return SR_ERR_ARG;
825                 if (!cg)
826                         return SR_ERR_CHANNEL_GROUP;
827                 *data = std_gvar_tuple_array(devc->vdivs, devc->num_vdivs);
828                 break;
829         case SR_CONF_TIMEBASE:
830                 if (!devc)
831                         /* Can't know this until we have the exact model. */
832                         return SR_ERR_ARG;
833                 if (devc->num_timebases <= 0)
834                         return SR_ERR_NA;
835                 *data = std_gvar_tuple_array(devc->timebases, devc->num_timebases);
836                 break;
837         case SR_CONF_TRIGGER_SOURCE:
838                 if (!devc)
839                         /* Can't know this until we have the exact model. */
840                         return SR_ERR_ARG;
841                 *data = g_variant_new_strv(devc->model->trigger_sources, devc->model->num_trigger_sources);
842                 break;
843         case SR_CONF_TRIGGER_SLOPE:
844                 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_slopes));
845                 break;
846         case SR_CONF_DATA_SOURCE:
847                 if (!devc)
848                         /* Can't know this until we have the exact model. */
849                         return SR_ERR_ARG;
850                 switch (devc->model->series->protocol) {
851                 case PROTOCOL_V1:
852                         *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
853                         break;
854                 case PROTOCOL_V2:
855                         *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
856                         break;
857                 default:
858                         *data = g_variant_new_strv(ARRAY_AND_SIZE(data_sources));
859                         break;
860                 }
861                 break;
862         default:
863                 return SR_ERR_NA;
864         }
865
866         return SR_OK;
867 }
868
869 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
870 {
871         struct sr_scpi_dev_inst *scpi;
872         struct dev_context *devc;
873         struct sr_channel *ch;
874         gboolean some_digital;
875         GSList *l;
876         char *cmd;
877
878         scpi = sdi->conn;
879         devc = sdi->priv;
880
881         devc->num_frames = 0;
882
883         some_digital = FALSE;
884         for (l = sdi->channels; l; l = l->next) {
885                 ch = l->data;
886                 sr_dbg("handling channel %s", ch->name);
887                 if (ch->type == SR_CHANNEL_ANALOG) {
888                         if (ch->enabled)
889                                 devc->enabled_channels = g_slist_append(
890                                                 devc->enabled_channels, ch);
891                         if (ch->enabled != devc->analog_channels[ch->index]) {
892                                 /* Enabled channel is currently disabled, or vice versa. */
893                                 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
894                                                 ch->enabled ? "ON" : "OFF") != SR_OK)
895                                         return SR_ERR;
896                                 devc->analog_channels[ch->index] = ch->enabled;
897                         }
898                 } else if (ch->type == SR_CHANNEL_LOGIC) {
899                         /* Only one list entry for older protocols. All channels are
900                          * retrieved together when this entry is processed. */
901                         if (ch->enabled && (
902                                                 devc->model->series->protocol > PROTOCOL_V3 ||
903                                                 !some_digital))
904                                 devc->enabled_channels = g_slist_append(
905                                                 devc->enabled_channels, ch);
906                         if (ch->enabled) {
907                                 some_digital = TRUE;
908                                 /* Turn on LA module if currently off. */
909                                 if (!devc->la_enabled) {
910                                         if (rigol_ds_config_set(sdi,
911                                                         devc->model->series->protocol >= PROTOCOL_V3 ?
912                                                                 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
913                                                 return SR_ERR;
914                                         devc->la_enabled = TRUE;
915                                 }
916                         }
917                         if (ch->enabled != devc->digital_channels[ch->index]) {
918                                 /* Enabled channel is currently disabled, or vice versa. */
919                                 if (devc->model->series->protocol >= PROTOCOL_V5)
920                                         cmd = ":LA:DISP D%d,%s";
921                                 else if (devc->model->series->protocol >= PROTOCOL_V3)
922                                         cmd = ":LA:DIG%d:DISP %s";
923                                 else
924                                         cmd = ":DIG%d:TURN %s";
925
926                                 if (rigol_ds_config_set(sdi, cmd, ch->index,
927                                                 ch->enabled ? "ON" : "OFF") != SR_OK)
928                                         return SR_ERR;
929                                 devc->digital_channels[ch->index] = ch->enabled;
930                         }
931                 }
932         }
933
934         if (!devc->enabled_channels)
935                 return SR_ERR;
936
937         /* Turn off LA module if on and no digital channels selected. */
938         if (devc->la_enabled && !some_digital)
939                 if (rigol_ds_config_set(sdi,
940                                 devc->model->series->protocol >= PROTOCOL_V3 ?
941                                         ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
942                         return SR_ERR;
943
944         /* Set memory mode. */
945         if (devc->data_source == DATA_SOURCE_SEGMENTED) {
946                 sr_err("Data source 'Segmented' not yet supported");
947                 return SR_ERR;
948         }
949
950         devc->analog_frame_size = analog_frame_size(sdi);
951         devc->digital_frame_size = digital_frame_size(sdi);
952
953         switch (devc->model->series->protocol) {
954         case PROTOCOL_V2:
955                 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
956                         return SR_ERR;
957                 break;
958         case PROTOCOL_V3:
959                 /* Apparently for the DS2000 the memory
960                  * depth can only be set in Running state -
961                  * this matches the behaviour of the UI. */
962                 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
963                         return SR_ERR;
964                 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
965                                         devc->analog_frame_size) != SR_OK)
966                         return SR_ERR;
967                 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
968                         return SR_ERR;
969                 break;
970         default:
971                 break;
972         }
973
974         if (devc->data_source == DATA_SOURCE_LIVE)
975                 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
976                         return SR_ERR;
977
978         sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
979                         rigol_ds_receive, (void *)sdi);
980
981         std_session_send_df_header(sdi);
982
983         devc->channel_entry = devc->enabled_channels;
984
985         if (devc->data_source == DATA_SOURCE_LIVE)
986                 devc->sample_rate = analog_frame_size(sdi) / 
987                         (devc->timebase * devc->model->series->num_horizontal_divs);
988         else {
989                 float xinc;
990                 if (devc->model->series->protocol >= PROTOCOL_V3 && 
991                                 sr_scpi_get_float(sdi->conn, "WAV:XINC?", &xinc) != SR_OK) {
992                         sr_err("Couldn't get sampling rate");
993                         return SR_ERR;
994                 }
995                 devc->sample_rate = 1. / xinc;
996         }
997
998
999         if (rigol_ds_capture_start(sdi) != SR_OK)
1000                 return SR_ERR;
1001
1002         /* Start of first frame. */
1003         std_session_send_df_frame_begin(sdi);
1004
1005         return SR_OK;
1006 }
1007
1008 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
1009 {
1010         struct dev_context *devc;
1011         struct sr_scpi_dev_inst *scpi;
1012
1013         devc = sdi->priv;
1014
1015         std_session_send_df_end(sdi);
1016
1017         g_slist_free(devc->enabled_channels);
1018         devc->enabled_channels = NULL;
1019         scpi = sdi->conn;
1020         sr_scpi_source_remove(sdi->session, scpi);
1021
1022         return SR_OK;
1023 }
1024
1025 static struct sr_dev_driver rigol_ds_driver_info = {
1026         .name = "rigol-ds",
1027         .longname = "Rigol DS",
1028         .api_version = 1,
1029         .init = std_init,
1030         .cleanup = std_cleanup,
1031         .scan = scan,
1032         .dev_list = std_dev_list,
1033         .dev_clear = dev_clear,
1034         .config_get = config_get,
1035         .config_set = config_set,
1036         .config_list = config_list,
1037         .dev_open = dev_open,
1038         .dev_close = dev_close,
1039         .dev_acquisition_start = dev_acquisition_start,
1040         .dev_acquisition_stop = dev_acquisition_stop,
1041         .context = NULL,
1042 };
1043 SR_REGISTER_DEV_DRIVER(rigol_ds_driver_info);