src/hardware/pipistrello-ols/api.c

   1 /*
   2  * This file is part of the libsigrok project.
   3  *
   4  * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
   5  *
   6  * This program is free software: you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation, either version 3 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <config.h>
  21 #include "protocol.h"
  22
  23 static const uint32_t drvopts[] = {
  24         SR_CONF_LOGIC_ANALYZER,
  25 };
  26
  27 static const uint32_t devopts[] = {
  28         SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  29         SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  30         SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
  31         SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
  32         SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  33         SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET,
  34         SR_CONF_SWAP | SR_CONF_SET,
  35         SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET,
  36 };
  37
  38 static const int32_t trigger_matches[] = {
  39         SR_TRIGGER_ZERO,
  40         SR_TRIGGER_ONE,
  41         SR_TRIGGER_RISING,
  42         SR_TRIGGER_FALLING,
  43 };
  44
  45 #define STR_PATTERN_NONE     "None"
  46 #define STR_PATTERN_EXTERNAL "External"
  47 #define STR_PATTERN_INTERNAL "Internal"
  48
  49 /* Supported methods of test pattern outputs */
  50 enum {
  51         /**
  52          * Capture pins 31:16 (unbuffered wing) output a test pattern
  53          * that can captured on pins 0:15.
  54          */
  55         PATTERN_EXTERNAL,
  56
  57         /** Route test pattern internally to capture buffer. */
  58         PATTERN_INTERNAL,
  59 };
  60
  61 static const char *patterns[] = {
  62         STR_PATTERN_NONE,
  63         STR_PATTERN_EXTERNAL,
  64         STR_PATTERN_INTERNAL,
  65 };
  66
  67 /* Channels are numbered 0-31 (on the PCB silkscreen). */
  68 SR_PRIV const char *p_ols_channel_names[] = {
  69         "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
  70         "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
  71         "24", "25", "26", "27", "28", "29", "30", "31",
  72 };
  73
  74 /* Default supported samplerates, can be overridden by device metadata. */
  75 static const uint64_t samplerates[] = {
  76         SR_HZ(10),
  77         SR_MHZ(200),
  78         SR_HZ(1),
  79 };
  80
  81 static GSList *scan(struct sr_dev_driver *di, GSList *options)
  82 {
  83         struct sr_dev_inst *sdi;
  84         struct dev_context *devc;
  85         GSList *devices;
  86         int ret, i;
  87         char buf[70];
  88         int bytes_read;
  89
  90         (void)options;
  91
  92         devices = NULL;
  93
  94         devc = g_malloc0(sizeof(struct dev_context));
  95
  96         devc->max_samplebytes = devc->max_samplerate = devc->protocol_version = 0;
  97
  98         devc->limit_samples = devc->capture_ratio = 0;
  99         devc->trigger_at = -1;
 100         devc->channel_mask = 0xffffffff;
 101         devc->flag_reg = 0;
 102
 103         devc->ftdi_buf = g_malloc0(FTDI_BUF_SIZE);
 104
 105         if (!(devc->ftdic = ftdi_new())) {
 106                 sr_err("Failed to initialize libftdi.");
 107                 goto err_free_ftdi_buf;;
 108         }
 109
 110         if (p_ols_open(devc) != SR_OK)
 111                 goto err_free_ftdic;
 112
 113         /* The discovery procedure is like this: first send the Reset
 114          * command (0x00) 5 times, since the device could be anywhere
 115          * in a 5-byte command. Then send the ID command (0x02).
 116          * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
 117          * have a match.
 118          */
 119
 120         ret = SR_OK;
 121         for (i = 0; i < 5; i++) {
 122                 if ((ret = write_shortcommand(devc, CMD_RESET)) != SR_OK) {
 123                         break;
 124                 }
 125         }
 126         if (ret != SR_OK) {
 127                 sr_err("Could not reset device. Quitting.");
 128                 goto err_close_ftdic;
 129         }
 130         write_shortcommand(devc, CMD_ID);
 131
 132         /* Read the response data. */
 133         bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 4);
 134         if (bytes_read < 0) {
 135                 sr_err("Failed to read FTDI data (%d): %s.",
 136                        bytes_read, ftdi_get_error_string(devc->ftdic));
 137                 goto err_close_ftdic;
 138         }
 139         if (bytes_read == 0) {
 140                 goto err_close_ftdic;
 141         }
 142
 143         if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
 144                 goto err_close_ftdic;
 145
 146         /* Definitely using the OLS protocol, check if it supports
 147          * the metadata command.
 148          */
 149         write_shortcommand(devc, CMD_METADATA);
 150
 151         /* Read the metadata. */
 152         bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 64);
 153         if (bytes_read < 0) {
 154                 sr_err("Failed to read FTDI data (%d): %s.",
 155                        bytes_read, ftdi_get_error_string(devc->ftdic));
 156                 goto err_close_ftdic;
 157         }
 158         if (bytes_read == 0) {
 159                 goto err_close_ftdic;
 160         }
 161
 162         p_ols_close(devc);
 163
 164         /* Parse the metadata. */
 165         sdi = p_ols_get_metadata((uint8_t *)buf, bytes_read, devc);
 166
 167         /* Configure samplerate and divider. */
 168         if (p_ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
 169                 sr_dbg("Failed to set default samplerate (%"PRIu64").",
 170                                 DEFAULT_SAMPLERATE);
 171
 172         devices = g_slist_append(devices, sdi);
 173
 174         return std_scan_complete(di, devices);
 175
 176 err_close_ftdic:
 177         p_ols_close(devc);
 178 err_free_ftdic:
 179         ftdi_free(devc->ftdic);
 180 err_free_ftdi_buf:
 181         g_free(devc->ftdi_buf);
 182         g_free(devc);
 183
 184         return NULL;
 185 }
 186
 187 static void clear_helper(struct dev_context *devc)
 188 {
 189         ftdi_free(devc->ftdic);
 190         g_free(devc->ftdi_buf);
 191 }
 192
 193 static int dev_clear(const struct sr_dev_driver *di)
 194 {
 195         return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
 196 }
 197
 198 static int config_get(uint32_t key, GVariant **data,
 199         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
 200 {
 201         struct dev_context *devc;
 202
 203         (void)cg;
 204
 205         if (!sdi)
 206                 return SR_ERR_ARG;
 207
 208         devc = sdi->priv;
 209
 210         switch (key) {
 211         case SR_CONF_SAMPLERATE:
 212                 *data = g_variant_new_uint64(devc->cur_samplerate);
 213                 break;
 214         case SR_CONF_CAPTURE_RATIO:
 215                 *data = g_variant_new_uint64(devc->capture_ratio);
 216                 break;
 217         case SR_CONF_LIMIT_SAMPLES:
 218                 *data = g_variant_new_uint64(devc->limit_samples);
 219                 break;
 220         case SR_CONF_PATTERN_MODE:
 221                 if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
 222                         *data = g_variant_new_string(STR_PATTERN_EXTERNAL);
 223                 else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
 224                         *data = g_variant_new_string(STR_PATTERN_INTERNAL);
 225                 else
 226                         *data = g_variant_new_string(STR_PATTERN_NONE);
 227                 break;
 228         case SR_CONF_RLE:
 229                 *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
 230                 break;
 231         case SR_CONF_EXTERNAL_CLOCK:
 232                 *data = g_variant_new_boolean(devc->flag_reg & FLAG_CLOCK_EXTERNAL ? TRUE : FALSE);
 233                 break;
 234         default:
 235                 return SR_ERR_NA;
 236         }
 237
 238         return SR_OK;
 239 }
 240
 241 static int config_set(uint32_t key, GVariant *data,
 242         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
 243 {
 244         struct dev_context *devc;
 245         uint16_t flag;
 246         uint64_t tmp_u64;
 247         const char *stropt;
 248
 249         (void)cg;
 250
 251         devc = sdi->priv;
 252
 253         switch (key) {
 254         case SR_CONF_SAMPLERATE:
 255                 tmp_u64 = g_variant_get_uint64(data);
 256                 if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
 257                         return SR_ERR_SAMPLERATE;
 258                 return p_ols_set_samplerate(sdi, g_variant_get_uint64(data));
 259         case SR_CONF_LIMIT_SAMPLES:
 260                 tmp_u64 = g_variant_get_uint64(data);
 261                 if (tmp_u64 < MIN_NUM_SAMPLES)
 262                         return SR_ERR;
 263                 devc->limit_samples = tmp_u64;
 264                 break;
 265         case SR_CONF_CAPTURE_RATIO:
 266                 devc->capture_ratio = g_variant_get_uint64(data);
 267                 if (devc->capture_ratio < 0 || devc->capture_ratio > 100)
 268                         return SR_ERR;
 269                 else
 270                         return SR_OK;
 271                 break;
 272         case SR_CONF_EXTERNAL_CLOCK:
 273                 if (g_variant_get_boolean(data)) {
 274                         sr_info("Enabling external clock.");
 275                         devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
 276                 } else {
 277                         sr_info("Disabled external clock.");
 278                         devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
 279                 }
 280                 break;
 281         case SR_CONF_PATTERN_MODE:
 282                 stropt = g_variant_get_string(data, NULL);
 283                 flag = 0xffff;
 284                 if (!strcmp(stropt, STR_PATTERN_NONE)) {
 285                         sr_info("Disabling test modes.");
 286                         flag = 0x0000;
 287                 } else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
 288                         sr_info("Enabling internal test mode.");
 289                         flag = FLAG_INTERNAL_TEST_MODE;
 290                 } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
 291                         sr_info("Enabling external test mode.");
 292                         flag = FLAG_EXTERNAL_TEST_MODE;
 293                 } else {
 294                         return SR_ERR;
 295                 }
 296                 if (flag != 0xffff) {
 297                         devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE);
 298                         devc->flag_reg |= flag;
 299                 }
 300                 break;
 301         case SR_CONF_SWAP:
 302                 if (g_variant_get_boolean(data)) {
 303                         sr_info("Enabling channel swapping.");
 304                         devc->flag_reg |= FLAG_SWAP_CHANNELS;
 305                 } else {
 306                         sr_info("Disabling channel swapping.");
 307                         devc->flag_reg &= ~FLAG_SWAP_CHANNELS;
 308                 }
 309                 break;
 310         case SR_CONF_RLE:
 311                 if (g_variant_get_boolean(data)) {
 312                         sr_info("Enabling RLE.");
 313                         devc->flag_reg |= FLAG_RLE;
 314                 } else {
 315                         sr_info("Disabling RLE.");
 316                         devc->flag_reg &= ~FLAG_RLE;
 317                 }
 318                 break;
 319         default:
 320                 return SR_ERR_NA;
 321         }
 322
 323         return SR_OK;
 324 }
 325
 326 static int config_list(uint32_t key, GVariant **data,
 327         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
 328 {
 329         struct dev_context *devc;
 330         int num_pols_changrp, i;
 331
 332         switch (key) {
 333         case SR_CONF_DEVICE_OPTIONS:
 334                 return STD_CONFIG_LIST(key, data, sdi, cg, NULL, drvopts, devopts);
 335         case SR_CONF_SAMPLERATE:
 336                 *data = std_gvar_samplerates_steps(ARRAY_AND_SIZE(samplerates));
 337                 break;
 338         case SR_CONF_TRIGGER_MATCH:
 339                 *data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches));
 340                 break;
 341         case SR_CONF_PATTERN_MODE:
 342                 *data = g_variant_new_strv(ARRAY_AND_SIZE(patterns));
 343                 break;
 344         case SR_CONF_LIMIT_SAMPLES:
 345                 if (!sdi)
 346                         return SR_ERR_ARG;
 347                 devc = sdi->priv;
 348                 if (devc->flag_reg & FLAG_RLE)
 349                         return SR_ERR_NA;
 350                 if (devc->max_samplebytes == 0)
 351                         /* Device didn't specify sample memory size in metadata. */
 352                         return SR_ERR_NA;
 353                 /*
 354                  * Channel groups are turned off if no channels in that group are
 355                  * enabled, making more room for samples for the enabled group.
 356                 */
 357                 pols_channel_mask(sdi);
 358                 num_pols_changrp = 0;
 359                 for (i = 0; i < 4; i++) {
 360                         if (devc->channel_mask & (0xff << (i * 8)))
 361                                 num_pols_changrp++;
 362                 }
 363                 /* 3 channel groups takes as many bytes as 4 channel groups */
 364                 if (num_pols_changrp == 3)
 365                         num_pols_changrp = 4;
 366
 367                 *data = std_gvar_tuple_u64(MIN_NUM_SAMPLES,
 368                         (num_pols_changrp) ? devc->max_samplebytes / num_pols_changrp : MIN_NUM_SAMPLES);
 369                 break;
 370         default:
 371                 return SR_ERR_NA;
 372         }
 373
 374         return SR_OK;
 375 }
 376
 377 static int dev_open(struct sr_dev_inst *sdi)
 378 {
 379         struct dev_context *devc;
 380
 381         devc = sdi->priv;
 382
 383         return p_ols_open(devc);
 384 }
 385
 386 static int dev_close(struct sr_dev_inst *sdi)
 387 {
 388         struct dev_context *devc;
 389
 390         devc = sdi->priv;
 391
 392         return p_ols_close(devc);
 393 }
 394
 395 static int set_trigger(const struct sr_dev_inst *sdi, int stage)
 396 {
 397         struct dev_context *devc;
 398         uint8_t cmd, arg[4];
 399
 400         devc = sdi->priv;
 401
 402         cmd = CMD_SET_TRIGGER_MASK + stage * 4;
 403         arg[0] = devc->trigger_mask[stage] & 0xff;
 404         arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
 405         arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
 406         arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
 407         if (write_longcommand(devc, cmd, arg) != SR_OK)
 408                 return SR_ERR;
 409
 410         cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
 411         arg[0] = devc->trigger_value[stage] & 0xff;
 412         arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
 413         arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
 414         arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
 415         if (write_longcommand(devc, cmd, arg) != SR_OK)
 416                 return SR_ERR;
 417
 418         cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
 419         arg[0] = arg[1] = arg[3] = 0x00;
 420         arg[2] = stage;
 421         if (stage == devc->num_stages)
 422                 /* Last stage, fire when this one matches. */
 423                 arg[3] |= TRIGGER_START;
 424         if (write_longcommand(devc, cmd, arg) != SR_OK)
 425                 return SR_ERR;
 426
 427         cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
 428         arg[0] = devc->trigger_edge[stage] & 0xff;
 429         arg[1] = (devc->trigger_edge[stage] >> 8) & 0xff;
 430         arg[2] = (devc->trigger_edge[stage] >> 16) & 0xff;
 431         arg[3] = (devc->trigger_edge[stage] >> 24) & 0xff;
 432         if (write_longcommand(devc, cmd, arg) != SR_OK)
 433                 return SR_ERR;
 434
 435         return SR_OK;
 436 }
 437
 438 static int disable_trigger(const struct sr_dev_inst *sdi, int stage)
 439 {
 440         struct dev_context *devc;
 441         uint8_t cmd, arg[4];
 442
 443         devc = sdi->priv;
 444
 445         cmd = CMD_SET_TRIGGER_MASK + stage * 4;
 446         arg[0] = arg[1] = arg[2] = arg[3] = 0x00;
 447         if (write_longcommand(devc, cmd, arg) != SR_OK)
 448                 return SR_ERR;
 449
 450         cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
 451         if (write_longcommand(devc, cmd, arg) != SR_OK)
 452                 return SR_ERR;
 453
 454         cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
 455         arg[2] = 0x03;
 456         if (write_longcommand(devc, cmd, arg) != SR_OK)
 457                 return SR_ERR;
 458
 459         cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
 460         arg[2] = 0x00;
 461         if (write_longcommand(devc, cmd, arg) != SR_OK)
 462                 return SR_ERR;
 463
 464         return SR_OK;
 465 }
 466
 467 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 468 {
 469         struct dev_context *devc;
 470         uint32_t samplecount, readcount, delaycount;
 471         uint8_t pols_changrp_mask, arg[4];
 472         uint16_t flag_tmp;
 473         int num_pols_changrp, samplespercount;
 474         int ret, i;
 475
 476         devc = sdi->priv;
 477
 478         pols_channel_mask(sdi);
 479
 480         /*
 481          * Enable/disable channel groups in the flag register according to the
 482          * channel mask. Calculate this here, because num_pols_changrp is
 483          * needed to limit readcount.
 484          */
 485         pols_changrp_mask = 0;
 486         num_pols_changrp = 0;
 487         for (i = 0; i < 4; i++) {
 488                 if (devc->channel_mask & (0xff << (i * 8))) {
 489                         pols_changrp_mask |= (1 << i);
 490                         num_pols_changrp++;
 491                 }
 492         }
 493         /* 3 channel groups takes as many bytes as 4 channel groups */
 494         if (num_pols_changrp == 3)
 495                 num_pols_changrp = 4;
 496         /* maximum number of samples (or RLE counts) the buffer memory can hold */
 497         devc->max_samples = devc->max_samplebytes / num_pols_changrp;
 498
 499         /*
 500          * Limit readcount to prevent reading past the end of the hardware
 501          * buffer.
 502          */
 503         sr_dbg("max_samples = %d", devc->max_samples);
 504         sr_dbg("limit_samples = %" PRIu64, devc->limit_samples);
 505         samplecount = MIN(devc->max_samples, devc->limit_samples);
 506         sr_dbg("Samplecount = %d", samplecount);
 507
 508         /* In demux mode the OLS is processing two samples per clock */
 509         if (devc->flag_reg & FLAG_DEMUX) {
 510                 samplespercount = 8;
 511         }
 512         else {
 513                 samplespercount = 4;
 514         }
 515
 516         readcount = samplecount / samplespercount;
 517
 518         /* Rather read too many samples than too few. */
 519         if (samplecount % samplespercount != 0)
 520                 readcount++;
 521
 522         /* Basic triggers. */
 523         if (pols_convert_trigger(sdi) != SR_OK) {
 524                 sr_err("Failed to configure channels.");
 525                 return SR_ERR;
 526         }
 527
 528         if (devc->num_stages > 0) {
 529                 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
 530                 devc->trigger_at = (readcount - delaycount) * samplespercount - devc->num_stages;
 531                 for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
 532                         if (i <= devc->num_stages) {
 533                                 sr_dbg("Setting p-ols stage %d trigger.", i);
 534                                 if ((ret = set_trigger(sdi, i)) != SR_OK)
 535                                         return ret;
 536                         }
 537                         else {
 538                                 sr_dbg("Disabling p-ols stage %d trigger.", i);
 539                                 if ((ret = disable_trigger(sdi, i)) != SR_OK)
 540                                         return ret;
 541                         }
 542                 }
 543         } else {
 544                 /* No triggers configured, force trigger on first stage. */
 545                 sr_dbg("Forcing trigger at stage 0.");
 546                 if ((ret = set_trigger(sdi, 0)) != SR_OK)
 547                         return ret;
 548                 delaycount = readcount;
 549         }
 550
 551         /* Samplerate. */
 552         sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
 553                         devc->cur_samplerate, devc->cur_samplerate_divider);
 554         arg[0] = devc->cur_samplerate_divider & 0xff;
 555         arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
 556         arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
 557         arg[3] = 0x00;
 558         if (write_longcommand(devc, CMD_SET_DIVIDER, arg) != SR_OK)
 559                 return SR_ERR;
 560
 561         /* Send extended sample limit and pre/post-trigger capture ratio. */
 562         arg[0] = ((readcount - 1) & 0xff);
 563         arg[1] = ((readcount - 1) & 0xff00) >> 8;
 564         arg[2] = ((readcount - 1) & 0xff0000) >> 16;
 565         arg[3] = ((readcount - 1) & 0xff000000) >> 24;
 566         if (write_longcommand(devc, CMD_CAPTURE_DELAY, arg) != SR_OK)
 567                 return SR_ERR;
 568         arg[0] = ((delaycount - 1) & 0xff);
 569         arg[1] = ((delaycount - 1) & 0xff00) >> 8;
 570         arg[2] = ((delaycount - 1) & 0xff0000) >> 16;
 571         arg[3] = ((delaycount - 1) & 0xff000000) >> 24;
 572         if (write_longcommand(devc, CMD_CAPTURE_COUNT, arg) != SR_OK)
 573                 return SR_ERR;
 574
 575         /* Flag register. */
 576         sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
 577                         devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
 578                         devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
 579                         devc->flag_reg & FLAG_RLE ? "on" : "off",
 580                         devc->flag_reg & FLAG_FILTER ? "on": "off",
 581                         devc->flag_reg & FLAG_DEMUX ? "on" : "off");
 582
 583         /*
 584         * Enable/disable OLS channel groups in the flag register according
 585         * to the channel mask. 1 means "disable channel".
 586         */
 587         devc->flag_reg &= ~0x3c;
 588         devc->flag_reg |= ~(pols_changrp_mask << 2) & 0x3c;
 589         sr_dbg("flag_reg = %x", devc->flag_reg);
 590
 591         /*
 592         * In demux mode the OLS is processing two 8-bit or 16-bit samples
 593         * in parallel and for this to work the lower two bits of the four
 594         * "channel_disable" bits must be replicated to the upper two bits.
 595         */
 596         flag_tmp = devc->flag_reg;
 597         if (devc->flag_reg & FLAG_DEMUX) {
 598                 flag_tmp &= ~0x30;
 599                 flag_tmp |= ~(pols_changrp_mask << 4) & 0x30;
 600         }
 601         arg[0] = flag_tmp & 0xff;
 602         arg[1] = flag_tmp >> 8;
 603         arg[2] = arg[3] = 0x00;
 604         if (write_longcommand(devc, CMD_SET_FLAGS, arg) != SR_OK)
 605                 return SR_ERR;
 606
 607         /* Start acquisition on the device. */
 608         if (write_shortcommand(devc, CMD_RUN) != SR_OK)
 609                 return SR_ERR;
 610
 611         /* Reset all operational states. */
 612         devc->rle_count = devc->num_transfers = 0;
 613         devc->num_samples = devc->num_bytes = 0;
 614         devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
 615         memset(devc->sample, 0, 4);
 616
 617         std_session_send_df_header(sdi);
 618
 619         /* Hook up a dummy handler to receive data from the device. */
 620         sr_session_source_add(sdi->session, -1, 0, 10, p_ols_receive_data,
 621                                 (struct sr_dev_inst *)sdi);
 622
 623         return SR_OK;
 624 }
 625
 626 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
 627 {
 628         struct dev_context *devc;
 629
 630         devc = sdi->priv;
 631
 632         write_shortcommand(devc, CMD_RESET);
 633         write_shortcommand(devc, CMD_RESET);
 634         write_shortcommand(devc, CMD_RESET);
 635         write_shortcommand(devc, CMD_RESET);
 636         write_shortcommand(devc, CMD_RESET);
 637
 638         sr_session_source_remove(sdi->session, -1);
 639
 640         std_session_send_df_end(sdi);
 641
 642         return SR_OK;
 643 }
 644
 645 SR_PRIV struct sr_dev_driver p_ols_driver_info = {
 646         .name = "p-ols",
 647         .longname = "Pipistrello OLS",
 648         .api_version = 1,
 649         .init = std_init,
 650         .cleanup = std_cleanup,
 651         .scan = scan,
 652         .dev_list = std_dev_list,
 653         .dev_clear = dev_clear,
 654         .config_get = config_get,
 655         .config_set = config_set,
 656         .config_list = config_list,
 657         .dev_open = dev_open,
 658         .dev_close = dev_close,
 659         .dev_acquisition_start = dev_acquisition_start,
 660         .dev_acquisition_stop = dev_acquisition_stop,
 661         .context = NULL,
 662 };
 663 SR_REGISTER_DEV_DRIVER(p_ols_driver_info);