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1 /*
2  * This file is part of the libsigrok project.
3  *
4  * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5  *
6  * This program is free software: you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation, either version 3 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
18  */
19
20 #include <config.h>
21 #include "protocol.h"
22
23 static const uint32_t drvopts[] = {
24         SR_CONF_LOGIC_ANALYZER,
25 };
26
27 static const uint32_t devopts[] = {
28         SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
29         SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
30         SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
31         SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
32         SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
33         SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET,
34         SR_CONF_SWAP | SR_CONF_SET,
35         SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET,
36 };
37
38 static const int32_t trigger_matches[] = {
39         SR_TRIGGER_ZERO,
40         SR_TRIGGER_ONE,
41         SR_TRIGGER_RISING,
42         SR_TRIGGER_FALLING,
43 };
44
45 #define STR_PATTERN_NONE     "None"
46 #define STR_PATTERN_EXTERNAL "External"
47 #define STR_PATTERN_INTERNAL "Internal"
48
49 /* Supported methods of test pattern outputs */
50 enum {
51         /**
52          * Capture pins 31:16 (unbuffered wing) output a test pattern
53          * that can captured on pins 0:15.
54          */
55         PATTERN_EXTERNAL,
56
57         /** Route test pattern internally to capture buffer. */
58         PATTERN_INTERNAL,
59 };
60
61 static const char *patterns[] = {
62         STR_PATTERN_NONE,
63         STR_PATTERN_EXTERNAL,
64         STR_PATTERN_INTERNAL,
65 };
66
67 /* Channels are numbered 0-31 (on the PCB silkscreen). */
68 SR_PRIV const char *p_ols_channel_names[] = {
69         "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
70         "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
71         "24", "25", "26", "27", "28", "29", "30", "31",
72 };
73
74 /* Default supported samplerates, can be overridden by device metadata. */
75 static const uint64_t samplerates[] = {
76         SR_HZ(10),
77         SR_MHZ(200),
78         SR_HZ(1),
79 };
80
81 static GSList *scan(struct sr_dev_driver *di, GSList *options)
82 {
83         struct sr_dev_inst *sdi;
84         struct dev_context *devc;
85         GSList *devices;
86         int ret, i;
87         char buf[70];
88         int bytes_read;
89
90         (void)options;
91
92         devices = NULL;
93
94         devc = g_malloc0(sizeof(struct dev_context));
95
96         devc->max_samplebytes = devc->max_samplerate = devc->protocol_version = 0;
97
98         devc->limit_samples = devc->capture_ratio = 0;
99         devc->trigger_at = -1;
100         devc->channel_mask = 0xffffffff;
101         devc->flag_reg = 0;
102
103         devc->ftdi_buf = g_malloc0(FTDI_BUF_SIZE);
104
105         if (!(devc->ftdic = ftdi_new())) {
106                 sr_err("Failed to initialize libftdi.");
107                 goto err_free_ftdi_buf;;
108         }
109
110         if (p_ols_open(devc) != SR_OK)
111                 goto err_free_ftdic;
112
113         /* The discovery procedure is like this: first send the Reset
114          * command (0x00) 5 times, since the device could be anywhere
115          * in a 5-byte command. Then send the ID command (0x02).
116          * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
117          * have a match.
118          */
119
120         ret = SR_OK;
121         for (i = 0; i < 5; i++) {
122                 if ((ret = write_shortcommand(devc, CMD_RESET)) != SR_OK) {
123                         break;
124                 }
125         }
126         if (ret != SR_OK) {
127                 sr_err("Could not reset device. Quitting.");
128                 goto err_close_ftdic;
129         }
130         write_shortcommand(devc, CMD_ID);
131
132         /* Read the response data. */
133         bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 4);
134         if (bytes_read < 0) {
135                 sr_err("Failed to read FTDI data (%d): %s.",
136                        bytes_read, ftdi_get_error_string(devc->ftdic));
137                 goto err_close_ftdic;
138         }
139         if (bytes_read == 0) {
140                 goto err_close_ftdic;
141         }
142
143         if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
144                 goto err_close_ftdic;
145
146         /* Definitely using the OLS protocol, check if it supports
147          * the metadata command.
148          */
149         write_shortcommand(devc, CMD_METADATA);
150
151         /* Read the metadata. */
152         bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 64);
153         if (bytes_read < 0) {
154                 sr_err("Failed to read FTDI data (%d): %s.",
155                        bytes_read, ftdi_get_error_string(devc->ftdic));
156                 goto err_close_ftdic;
157         }
158         if (bytes_read == 0) {
159                 goto err_close_ftdic;
160         }
161
162         p_ols_close(devc);
163
164         /* Parse the metadata. */
165         sdi = p_ols_get_metadata((uint8_t *)buf, bytes_read, devc);
166
167         /* Configure samplerate and divider. */
168         if (p_ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
169                 sr_dbg("Failed to set default samplerate (%"PRIu64").",
170                                 DEFAULT_SAMPLERATE);
171
172         devices = g_slist_append(devices, sdi);
173
174         return std_scan_complete(di, devices);
175
176 err_close_ftdic:
177         p_ols_close(devc);
178 err_free_ftdic:
179         ftdi_free(devc->ftdic);
180 err_free_ftdi_buf:
181         g_free(devc->ftdi_buf);
182         g_free(devc);
183
184         return NULL;
185 }
186
187 static void clear_helper(struct dev_context *devc)
188 {
189         ftdi_free(devc->ftdic);
190         g_free(devc->ftdi_buf);
191 }
192
193 static int dev_clear(const struct sr_dev_driver *di)
194 {
195         return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
196 }
197
198 static int config_get(uint32_t key, GVariant **data,
199         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
200 {
201         struct dev_context *devc;
202
203         (void)cg;
204
205         if (!sdi)
206                 return SR_ERR_ARG;
207
208         devc = sdi->priv;
209         switch (key) {
210         case SR_CONF_SAMPLERATE:
211                 *data = g_variant_new_uint64(devc->cur_samplerate);
212                 break;
213         case SR_CONF_CAPTURE_RATIO:
214                 *data = g_variant_new_uint64(devc->capture_ratio);
215                 break;
216         case SR_CONF_LIMIT_SAMPLES:
217                 *data = g_variant_new_uint64(devc->limit_samples);
218                 break;
219         case SR_CONF_PATTERN_MODE:
220                 if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
221                         *data = g_variant_new_string(STR_PATTERN_EXTERNAL);
222                 else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
223                         *data = g_variant_new_string(STR_PATTERN_INTERNAL);
224                 else
225                         *data = g_variant_new_string(STR_PATTERN_NONE);
226                 break;
227         case SR_CONF_RLE:
228                 *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
229                 break;
230         case SR_CONF_EXTERNAL_CLOCK:
231                 *data = g_variant_new_boolean(devc->flag_reg & FLAG_CLOCK_EXTERNAL ? TRUE : FALSE);
232                 break;
233         default:
234                 return SR_ERR_NA;
235         }
236
237         return SR_OK;
238 }
239
240 static int config_set(uint32_t key, GVariant *data,
241         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
242 {
243         struct dev_context *devc;
244         uint16_t flag;
245         uint64_t tmp_u64;
246         int ret;
247         const char *stropt;
248
249         (void)cg;
250
251         devc = sdi->priv;
252
253         switch (key) {
254         case SR_CONF_SAMPLERATE:
255                 tmp_u64 = g_variant_get_uint64(data);
256                 if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
257                         return SR_ERR_SAMPLERATE;
258                 ret = p_ols_set_samplerate(sdi, g_variant_get_uint64(data));
259                 break;
260         case SR_CONF_LIMIT_SAMPLES:
261                 tmp_u64 = g_variant_get_uint64(data);
262                 if (tmp_u64 < MIN_NUM_SAMPLES)
263                         return SR_ERR;
264                 devc->limit_samples = tmp_u64;
265                 ret = SR_OK;
266                 break;
267         case SR_CONF_CAPTURE_RATIO:
268                 devc->capture_ratio = g_variant_get_uint64(data);
269                 if (devc->capture_ratio < 0 || devc->capture_ratio > 100)
270                         ret = SR_ERR;
271                 else
272                         ret = SR_OK;
273                 break;
274         case SR_CONF_EXTERNAL_CLOCK:
275                 if (g_variant_get_boolean(data)) {
276                         sr_info("Enabling external clock.");
277                         devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
278                 } else {
279                         sr_info("Disabled external clock.");
280                         devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
281                 }
282                 ret = SR_OK;
283                 break;
284         case SR_CONF_PATTERN_MODE:
285                 stropt = g_variant_get_string(data, NULL);
286                 ret = SR_OK;
287                 flag = 0xffff;
288                 if (!strcmp(stropt, STR_PATTERN_NONE)) {
289                         sr_info("Disabling test modes.");
290                         flag = 0x0000;
291                 }else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
292                         sr_info("Enabling internal test mode.");
293                         flag = FLAG_INTERNAL_TEST_MODE;
294                 } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
295                         sr_info("Enabling external test mode.");
296                         flag = FLAG_EXTERNAL_TEST_MODE;
297                 } else {
298                         ret = SR_ERR;
299                 }
300                 if (flag != 0xffff) {
301                         devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE);
302                         devc->flag_reg |= flag;
303                 }
304                 break;
305         case SR_CONF_SWAP:
306                 if (g_variant_get_boolean(data)) {
307                         sr_info("Enabling channel swapping.");
308                         devc->flag_reg |= FLAG_SWAP_CHANNELS;
309                 } else {
310                         sr_info("Disabling channel swapping.");
311                         devc->flag_reg &= ~FLAG_SWAP_CHANNELS;
312                 }
313                 ret = SR_OK;
314                 break;
315
316         case SR_CONF_RLE:
317                 if (g_variant_get_boolean(data)) {
318                         sr_info("Enabling RLE.");
319                         devc->flag_reg |= FLAG_RLE;
320                 } else {
321                         sr_info("Disabling RLE.");
322                         devc->flag_reg &= ~FLAG_RLE;
323                 }
324                 ret = SR_OK;
325                 break;
326         default:
327                 ret = SR_ERR_NA;
328         }
329
330         return ret;
331 }
332
333 static int config_list(uint32_t key, GVariant **data,
334         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
335 {
336         struct dev_context *devc;
337         int num_pols_changrp, i;
338
339         switch (key) {
340         case SR_CONF_DEVICE_OPTIONS:
341                 return STD_CONFIG_LIST(key, data, sdi, cg, NULL, drvopts, devopts);
342         case SR_CONF_SAMPLERATE:
343                 *data = std_gvar_samplerates_steps(ARRAY_AND_SIZE(samplerates));
344                 break;
345         case SR_CONF_TRIGGER_MATCH:
346                 *data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches));
347                 break;
348         case SR_CONF_PATTERN_MODE:
349                 *data = g_variant_new_strv(ARRAY_AND_SIZE(patterns));
350                 break;
351         case SR_CONF_LIMIT_SAMPLES:
352                 if (!sdi)
353                         return SR_ERR_ARG;
354                 devc = sdi->priv;
355                 if (devc->flag_reg & FLAG_RLE)
356                         return SR_ERR_NA;
357                 if (devc->max_samplebytes == 0)
358                         /* Device didn't specify sample memory size in metadata. */
359                         return SR_ERR_NA;
360                 /*
361                  * Channel groups are turned off if no channels in that group are
362                  * enabled, making more room for samples for the enabled group.
363                 */
364                 pols_channel_mask(sdi);
365                 num_pols_changrp = 0;
366                 for (i = 0; i < 4; i++) {
367                         if (devc->channel_mask & (0xff << (i * 8)))
368                                 num_pols_changrp++;
369                 }
370                 /* 3 channel groups takes as many bytes as 4 channel groups */
371                 if (num_pols_changrp == 3)
372                         num_pols_changrp = 4;
373
374                 *data = std_gvar_tuple_u64(MIN_NUM_SAMPLES,
375                         (num_pols_changrp) ? devc->max_samplebytes / num_pols_changrp : MIN_NUM_SAMPLES);
376                 break;
377         default:
378                 return SR_ERR_NA;
379         }
380
381         return SR_OK;
382 }
383
384 static int dev_open(struct sr_dev_inst *sdi)
385 {
386         struct dev_context *devc;
387
388         devc = sdi->priv;
389
390         return p_ols_open(devc);
391 }
392
393 static int dev_close(struct sr_dev_inst *sdi)
394 {
395         struct dev_context *devc;
396
397         devc = sdi->priv;
398
399         return p_ols_close(devc);
400 }
401
402 static int set_trigger(const struct sr_dev_inst *sdi, int stage)
403 {
404         struct dev_context *devc;
405         uint8_t cmd, arg[4];
406
407         devc = sdi->priv;
408
409         cmd = CMD_SET_TRIGGER_MASK + stage * 4;
410         arg[0] = devc->trigger_mask[stage] & 0xff;
411         arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
412         arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
413         arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
414         if (write_longcommand(devc, cmd, arg) != SR_OK)
415                 return SR_ERR;
416
417         cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
418         arg[0] = devc->trigger_value[stage] & 0xff;
419         arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
420         arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
421         arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
422         if (write_longcommand(devc, cmd, arg) != SR_OK)
423                 return SR_ERR;
424
425         cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
426         arg[0] = arg[1] = arg[3] = 0x00;
427         arg[2] = stage;
428         if (stage == devc->num_stages)
429                 /* Last stage, fire when this one matches. */
430                 arg[3] |= TRIGGER_START;
431         if (write_longcommand(devc, cmd, arg) != SR_OK)
432                 return SR_ERR;
433
434         cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
435         arg[0] = devc->trigger_edge[stage] & 0xff;
436         arg[1] = (devc->trigger_edge[stage] >> 8) & 0xff;
437         arg[2] = (devc->trigger_edge[stage] >> 16) & 0xff;
438         arg[3] = (devc->trigger_edge[stage] >> 24) & 0xff;
439         if (write_longcommand(devc, cmd, arg) != SR_OK)
440                 return SR_ERR;
441
442         return SR_OK;
443 }
444
445 static int disable_trigger(const struct sr_dev_inst *sdi, int stage)
446 {
447         struct dev_context *devc;
448         uint8_t cmd, arg[4];
449
450         devc = sdi->priv;
451
452         cmd = CMD_SET_TRIGGER_MASK + stage * 4;
453         arg[0] = arg[1] = arg[2] = arg[3] = 0x00;
454         if (write_longcommand(devc, cmd, arg) != SR_OK)
455                 return SR_ERR;
456
457         cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
458         if (write_longcommand(devc, cmd, arg) != SR_OK)
459                 return SR_ERR;
460
461         cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
462         arg[2] = 0x03;
463         if (write_longcommand(devc, cmd, arg) != SR_OK)
464                 return SR_ERR;
465
466         cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
467         arg[2] = 0x00;
468         if (write_longcommand(devc, cmd, arg) != SR_OK)
469                 return SR_ERR;
470
471         return SR_OK;
472 }
473
474 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
475 {
476         struct dev_context *devc;
477         uint32_t samplecount, readcount, delaycount;
478         uint8_t pols_changrp_mask, arg[4];
479         uint16_t flag_tmp;
480         int num_pols_changrp, samplespercount;
481         int ret, i;
482
483         devc = sdi->priv;
484
485         pols_channel_mask(sdi);
486
487         /*
488          * Enable/disable channel groups in the flag register according to the
489          * channel mask. Calculate this here, because num_pols_changrp is
490          * needed to limit readcount.
491          */
492         pols_changrp_mask = 0;
493         num_pols_changrp = 0;
494         for (i = 0; i < 4; i++) {
495                 if (devc->channel_mask & (0xff << (i * 8))) {
496                         pols_changrp_mask |= (1 << i);
497                         num_pols_changrp++;
498                 }
499         }
500         /* 3 channel groups takes as many bytes as 4 channel groups */
501         if (num_pols_changrp == 3)
502                 num_pols_changrp = 4;
503         /* maximum number of samples (or RLE counts) the buffer memory can hold */
504         devc->max_samples = devc->max_samplebytes / num_pols_changrp;
505
506         /*
507          * Limit readcount to prevent reading past the end of the hardware
508          * buffer.
509          */
510         sr_dbg("max_samples = %d", devc->max_samples);
511         sr_dbg("limit_samples = %" PRIu64, devc->limit_samples);
512         samplecount = MIN(devc->max_samples, devc->limit_samples);
513         sr_dbg("Samplecount = %d", samplecount);
514
515         /* In demux mode the OLS is processing two samples per clock */
516         if (devc->flag_reg & FLAG_DEMUX) {
517                 samplespercount = 8;
518         }
519         else {
520                 samplespercount = 4;
521         }
522
523         readcount = samplecount / samplespercount;
524
525         /* Rather read too many samples than too few. */
526         if (samplecount % samplespercount != 0)
527                 readcount++;
528
529         /* Basic triggers. */
530         if (pols_convert_trigger(sdi) != SR_OK) {
531                 sr_err("Failed to configure channels.");
532                 return SR_ERR;
533         }
534
535         if (devc->num_stages > 0) {
536                 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
537                 devc->trigger_at = (readcount - delaycount) * samplespercount - devc->num_stages;
538                 for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
539                         if (i <= devc->num_stages) {
540                                 sr_dbg("Setting p-ols stage %d trigger.", i);
541                                 if ((ret = set_trigger(sdi, i)) != SR_OK)
542                                         return ret;
543                         }
544                         else {
545                                 sr_dbg("Disabling p-ols stage %d trigger.", i);
546                                 if ((ret = disable_trigger(sdi, i)) != SR_OK)
547                                         return ret;
548                         }
549                 }
550         } else {
551                 /* No triggers configured, force trigger on first stage. */
552                 sr_dbg("Forcing trigger at stage 0.");
553                 if ((ret = set_trigger(sdi, 0)) != SR_OK)
554                         return ret;
555                 delaycount = readcount;
556         }
557
558         /* Samplerate. */
559         sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
560                         devc->cur_samplerate, devc->cur_samplerate_divider);
561         arg[0] = devc->cur_samplerate_divider & 0xff;
562         arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
563         arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
564         arg[3] = 0x00;
565         if (write_longcommand(devc, CMD_SET_DIVIDER, arg) != SR_OK)
566                 return SR_ERR;
567
568         /* Send extended sample limit and pre/post-trigger capture ratio. */
569         arg[0] = ((readcount - 1) & 0xff);
570         arg[1] = ((readcount - 1) & 0xff00) >> 8;
571         arg[2] = ((readcount - 1) & 0xff0000) >> 16;
572         arg[3] = ((readcount - 1) & 0xff000000) >> 24;
573         if (write_longcommand(devc, CMD_CAPTURE_DELAY, arg) != SR_OK)
574                 return SR_ERR;
575         arg[0] = ((delaycount - 1) & 0xff);
576         arg[1] = ((delaycount - 1) & 0xff00) >> 8;
577         arg[2] = ((delaycount - 1) & 0xff0000) >> 16;
578         arg[3] = ((delaycount - 1) & 0xff000000) >> 24;
579         if (write_longcommand(devc, CMD_CAPTURE_COUNT, arg) != SR_OK)
580                 return SR_ERR;
581
582         /* Flag register. */
583         sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
584                         devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
585                         devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
586                         devc->flag_reg & FLAG_RLE ? "on" : "off",
587                         devc->flag_reg & FLAG_FILTER ? "on": "off",
588                         devc->flag_reg & FLAG_DEMUX ? "on" : "off");
589
590         /*
591         * Enable/disable OLS channel groups in the flag register according
592         * to the channel mask. 1 means "disable channel".
593         */
594         devc->flag_reg &= ~0x3c;
595         devc->flag_reg |= ~(pols_changrp_mask << 2) & 0x3c;
596         sr_dbg("flag_reg = %x", devc->flag_reg);
597
598         /*
599         * In demux mode the OLS is processing two 8-bit or 16-bit samples
600         * in parallel and for this to work the lower two bits of the four
601         * "channel_disable" bits must be replicated to the upper two bits.
602         */
603         flag_tmp = devc->flag_reg;
604         if (devc->flag_reg & FLAG_DEMUX) {
605                 flag_tmp &= ~0x30;
606                 flag_tmp |= ~(pols_changrp_mask << 4) & 0x30;
607         }
608         arg[0] = flag_tmp & 0xff;
609         arg[1] = flag_tmp >> 8;
610         arg[2] = arg[3] = 0x00;
611         if (write_longcommand(devc, CMD_SET_FLAGS, arg) != SR_OK)
612                 return SR_ERR;
613
614         /* Start acquisition on the device. */
615         if (write_shortcommand(devc, CMD_RUN) != SR_OK)
616                 return SR_ERR;
617
618         /* Reset all operational states. */
619         devc->rle_count = devc->num_transfers = 0;
620         devc->num_samples = devc->num_bytes = 0;
621         devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
622         memset(devc->sample, 0, 4);
623
624         std_session_send_df_header(sdi);
625
626         /* Hook up a dummy handler to receive data from the device. */
627         sr_session_source_add(sdi->session, -1, 0, 10, p_ols_receive_data,
628                                 (struct sr_dev_inst *)sdi);
629
630         return SR_OK;
631 }
632
633 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
634 {
635         struct dev_context *devc;
636
637         devc = sdi->priv;
638
639         write_shortcommand(devc, CMD_RESET);
640         write_shortcommand(devc, CMD_RESET);
641         write_shortcommand(devc, CMD_RESET);
642         write_shortcommand(devc, CMD_RESET);
643         write_shortcommand(devc, CMD_RESET);
644
645         sr_session_source_remove(sdi->session, -1);
646
647         std_session_send_df_end(sdi);
648
649         return SR_OK;
650 }
651
652 SR_PRIV struct sr_dev_driver p_ols_driver_info = {
653         .name = "p-ols",
654         .longname = "Pipistrello OLS",
655         .api_version = 1,
656         .init = std_init,
657         .cleanup = std_cleanup,
658         .scan = scan,
659         .dev_list = std_dev_list,
660         .dev_clear = dev_clear,
661         .config_get = config_get,
662         .config_set = config_set,
663         .config_list = config_list,
664         .dev_open = dev_open,
665         .dev_close = dev_close,
666         .dev_acquisition_start = dev_acquisition_start,
667         .dev_acquisition_stop = dev_acquisition_stop,
668         .context = NULL,
669 };
670 SR_REGISTER_DEV_DRIVER(p_ols_driver_info);