src/hardware/pipistrello-ols/api.c

   1 /*
   2  * This file is part of the libsigrok project.
   3  *
   4  * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
   5  *
   6  * This program is free software: you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation, either version 3 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <config.h>
  21 #include "protocol.h"
  22
  23 static const uint32_t devopts[] = {
  24         SR_CONF_LOGIC_ANALYZER,
  25         SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  26         SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  27         SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
  28         SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
  29         SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  30         SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET,
  31         SR_CONF_SWAP | SR_CONF_SET,
  32         SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET,
  33 };
  34
  35 static const int32_t trigger_matches[] = {
  36         SR_TRIGGER_ZERO,
  37         SR_TRIGGER_ONE,
  38         SR_TRIGGER_RISING,
  39         SR_TRIGGER_FALLING,
  40 };
  41
  42 #define STR_PATTERN_NONE     "None"
  43 #define STR_PATTERN_EXTERNAL "External"
  44 #define STR_PATTERN_INTERNAL "Internal"
  45
  46 /* Supported methods of test pattern outputs */
  47 enum {
  48         /**
  49          * Capture pins 31:16 (unbuffered wing) output a test pattern
  50          * that can captured on pins 0:15.
  51          */
  52         PATTERN_EXTERNAL,
  53
  54         /** Route test pattern internally to capture buffer. */
  55         PATTERN_INTERNAL,
  56 };
  57
  58 static const char *patterns[] = {
  59         STR_PATTERN_NONE,
  60         STR_PATTERN_EXTERNAL,
  61         STR_PATTERN_INTERNAL,
  62 };
  63
  64 /* Channels are numbered 0-31 (on the PCB silkscreen). */
  65 SR_PRIV const char *p_ols_channel_names[] = {
  66         "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
  67         "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
  68         "24", "25", "26", "27", "28", "29", "30", "31",
  69 };
  70
  71 /* Default supported samplerates, can be overridden by device metadata. */
  72 static const uint64_t samplerates[] = {
  73         SR_HZ(10),
  74         SR_MHZ(200),
  75         SR_HZ(1),
  76 };
  77
  78 static GSList *scan(struct sr_dev_driver *di, GSList *options)
  79 {
  80         struct sr_dev_inst *sdi;
  81         struct dev_context *devc;
  82         GSList *devices;
  83         int ret, i;
  84         char buf[70];
  85         int bytes_read;
  86
  87         (void)options;
  88
  89         devices = NULL;
  90
  91         /* Allocate memory for our private device context. */
  92         devc = g_malloc0(sizeof(struct dev_context));
  93
  94         /* Device-specific settings */
  95         devc->max_samplebytes = devc->max_samplerate = devc->protocol_version = 0;
  96
  97         /* Acquisition settings */
  98         devc->limit_samples = devc->capture_ratio = 0;
  99         devc->trigger_at = -1;
 100         devc->channel_mask = 0xffffffff;
 101         devc->flag_reg = 0;
 102
 103         /* Allocate memory for the incoming ftdi data. */
 104         devc->ftdi_buf = g_malloc0(FTDI_BUF_SIZE);
 105
 106         /* Allocate memory for the FTDI context (ftdic) and initialize it. */
 107         if (!(devc->ftdic = ftdi_new())) {
 108                 sr_err("Failed to initialize libftdi.");
 109                 goto err_free_ftdi_buf;;
 110         }
 111
 112         /* Try to open the FTDI device */
 113         if (p_ols_open(devc) != SR_OK) {
 114                 goto err_free_ftdic;
 115         }
 116
 117         /* The discovery procedure is like this: first send the Reset
 118          * command (0x00) 5 times, since the device could be anywhere
 119          * in a 5-byte command. Then send the ID command (0x02).
 120          * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
 121          * have a match.
 122          */
 123
 124         ret = SR_OK;
 125         for (i = 0; i < 5; i++) {
 126                 if ((ret = write_shortcommand(devc, CMD_RESET)) != SR_OK) {
 127                         break;
 128                 }
 129         }
 130         if (ret != SR_OK) {
 131                 sr_err("Could not reset device. Quitting.");
 132                 goto err_close_ftdic;
 133         }
 134         write_shortcommand(devc, CMD_ID);
 135
 136         /* Read the response data. */
 137         bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 4);
 138         if (bytes_read < 0) {
 139                 sr_err("Failed to read FTDI data (%d): %s.",
 140                        bytes_read, ftdi_get_error_string(devc->ftdic));
 141                 goto err_close_ftdic;
 142         }
 143         if (bytes_read == 0) {
 144                 goto err_close_ftdic;
 145         }
 146
 147         if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
 148                 goto err_close_ftdic;
 149
 150         /* Definitely using the OLS protocol, check if it supports
 151          * the metadata command.
 152          */
 153         write_shortcommand(devc, CMD_METADATA);
 154
 155         /* Read the metadata. */
 156         bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 64);
 157         if (bytes_read < 0) {
 158                 sr_err("Failed to read FTDI data (%d): %s.",
 159                        bytes_read, ftdi_get_error_string(devc->ftdic));
 160                 goto err_close_ftdic;
 161         }
 162         if (bytes_read == 0) {
 163                 goto err_close_ftdic;
 164         }
 165
 166         /* Close device. We'll reopen it again when we need it. */
 167         p_ols_close(devc);
 168
 169         /* Parse the metadata. */
 170         sdi = p_ols_get_metadata((uint8_t *)buf, bytes_read, devc);
 171
 172         /* Configure samplerate and divider. */
 173         if (p_ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
 174                 sr_dbg("Failed to set default samplerate (%"PRIu64").",
 175                                 DEFAULT_SAMPLERATE);
 176
 177         devices = g_slist_append(devices, sdi);
 178
 179         return std_scan_complete(di, devices);
 180
 181 err_close_ftdic:
 182         p_ols_close(devc);
 183 err_free_ftdic:
 184         ftdi_free(devc->ftdic); /* NOT free() or g_free()! */
 185 err_free_ftdi_buf:
 186         g_free(devc->ftdi_buf);
 187         g_free(devc);
 188
 189         return NULL;
 190 }
 191
 192 static void clear_helper(struct dev_context *devc)
 193 {
 194         ftdi_free(devc->ftdic);
 195         g_free(devc->ftdi_buf);
 196 }
 197
 198 static int dev_clear(const struct sr_dev_driver *di)
 199 {
 200         return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
 201 }
 202
 203 static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
 204                 const struct sr_channel_group *cg)
 205 {
 206         struct dev_context *devc;
 207
 208         (void)cg;
 209
 210         if (!sdi)
 211                 return SR_ERR_ARG;
 212
 213         devc = sdi->priv;
 214         switch (key) {
 215         case SR_CONF_SAMPLERATE:
 216                 *data = g_variant_new_uint64(devc->cur_samplerate);
 217                 break;
 218         case SR_CONF_CAPTURE_RATIO:
 219                 *data = g_variant_new_uint64(devc->capture_ratio);
 220                 break;
 221         case SR_CONF_LIMIT_SAMPLES:
 222                 *data = g_variant_new_uint64(devc->limit_samples);
 223                 break;
 224         case SR_CONF_PATTERN_MODE:
 225                 if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
 226                         *data = g_variant_new_string(STR_PATTERN_EXTERNAL);
 227                 else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
 228                         *data = g_variant_new_string(STR_PATTERN_INTERNAL);
 229                 else
 230                         *data = g_variant_new_string(STR_PATTERN_NONE);
 231                 break;
 232         case SR_CONF_RLE:
 233                 *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
 234                 break;
 235         case SR_CONF_EXTERNAL_CLOCK:
 236                 *data = g_variant_new_boolean(devc->flag_reg & FLAG_CLOCK_EXTERNAL ? TRUE : FALSE);
 237                 break;
 238         default:
 239                 return SR_ERR_NA;
 240         }
 241
 242         return SR_OK;
 243 }
 244
 245 static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
 246                 const struct sr_channel_group *cg)
 247 {
 248         struct dev_context *devc;
 249         uint16_t flag;
 250         uint64_t tmp_u64;
 251         int ret;
 252         const char *stropt;
 253
 254         (void)cg;
 255
 256         devc = sdi->priv;
 257
 258         switch (key) {
 259         case SR_CONF_SAMPLERATE:
 260                 tmp_u64 = g_variant_get_uint64(data);
 261                 if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
 262                         return SR_ERR_SAMPLERATE;
 263                 ret = p_ols_set_samplerate(sdi, g_variant_get_uint64(data));
 264                 break;
 265         case SR_CONF_LIMIT_SAMPLES:
 266                 tmp_u64 = g_variant_get_uint64(data);
 267                 if (tmp_u64 < MIN_NUM_SAMPLES)
 268                         return SR_ERR;
 269                 devc->limit_samples = tmp_u64;
 270                 ret = SR_OK;
 271                 break;
 272         case SR_CONF_CAPTURE_RATIO:
 273                 devc->capture_ratio = g_variant_get_uint64(data);
 274                 if (devc->capture_ratio < 0 || devc->capture_ratio > 100)
 275                         ret = SR_ERR;
 276                 else
 277                         ret = SR_OK;
 278                 break;
 279         case SR_CONF_EXTERNAL_CLOCK:
 280                 if (g_variant_get_boolean(data)) {
 281                         sr_info("Enabling external clock.");
 282                         devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
 283                 } else {
 284                         sr_info("Disabled external clock.");
 285                         devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
 286                 }
 287                 ret = SR_OK;
 288                 break;
 289         case SR_CONF_PATTERN_MODE:
 290                 stropt = g_variant_get_string(data, NULL);
 291                 ret = SR_OK;
 292                 flag = 0xffff;
 293                 if (!strcmp(stropt, STR_PATTERN_NONE)) {
 294                         sr_info("Disabling test modes.");
 295                         flag = 0x0000;
 296                 }else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
 297                         sr_info("Enabling internal test mode.");
 298                         flag = FLAG_INTERNAL_TEST_MODE;
 299                 } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
 300                         sr_info("Enabling external test mode.");
 301                         flag = FLAG_EXTERNAL_TEST_MODE;
 302                 } else {
 303                         ret = SR_ERR;
 304                 }
 305                 if (flag != 0xffff) {
 306                         devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE);
 307                         devc->flag_reg |= flag;
 308                 }
 309                 break;
 310         case SR_CONF_SWAP:
 311                 if (g_variant_get_boolean(data)) {
 312                         sr_info("Enabling channel swapping.");
 313                         devc->flag_reg |= FLAG_SWAP_CHANNELS;
 314                 } else {
 315                         sr_info("Disabling channel swapping.");
 316                         devc->flag_reg &= ~FLAG_SWAP_CHANNELS;
 317                 }
 318                 ret = SR_OK;
 319                 break;
 320
 321         case SR_CONF_RLE:
 322                 if (g_variant_get_boolean(data)) {
 323                         sr_info("Enabling RLE.");
 324                         devc->flag_reg |= FLAG_RLE;
 325                 } else {
 326                         sr_info("Disabling RLE.");
 327                         devc->flag_reg &= ~FLAG_RLE;
 328                 }
 329                 ret = SR_OK;
 330                 break;
 331         default:
 332                 ret = SR_ERR_NA;
 333         }
 334
 335         return ret;
 336 }
 337
 338 static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
 339                 const struct sr_channel_group *cg)
 340 {
 341         struct dev_context *devc;
 342         GVariant *gvar, *grange[2];
 343         GVariantBuilder gvb;
 344         int num_pols_changrp, i;
 345
 346         (void)cg;
 347
 348         switch (key) {
 349         case SR_CONF_DEVICE_OPTIONS:
 350                 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
 351                                 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
 352                 break;
 353         case SR_CONF_SAMPLERATE:
 354                 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
 355                 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
 356                                 ARRAY_SIZE(samplerates), sizeof(uint64_t));
 357                 g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
 358                 *data = g_variant_builder_end(&gvb);
 359                 break;
 360         case SR_CONF_TRIGGER_MATCH:
 361                 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
 362                                 trigger_matches, ARRAY_SIZE(trigger_matches),
 363                                 sizeof(int32_t));
 364                 break;
 365         case SR_CONF_PATTERN_MODE:
 366                 *data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
 367                 break;
 368         case SR_CONF_LIMIT_SAMPLES:
 369                 if (!sdi)
 370                         return SR_ERR_ARG;
 371                 devc = sdi->priv;
 372                 if (devc->flag_reg & FLAG_RLE)
 373                         return SR_ERR_NA;
 374                 if (devc->max_samplebytes == 0)
 375                         /* Device didn't specify sample memory size in metadata. */
 376                         return SR_ERR_NA;
 377                 /*
 378                  * Channel groups are turned off if no channels in that group are
 379                  * enabled, making more room for samples for the enabled group.
 380                 */
 381                 pols_channel_mask(sdi);
 382                 num_pols_changrp = 0;
 383                 for (i = 0; i < 4; i++) {
 384                         if (devc->channel_mask & (0xff << (i * 8)))
 385                                 num_pols_changrp++;
 386                 }
 387                 /* 3 channel groups takes as many bytes as 4 channel groups */
 388                 if (num_pols_changrp == 3)
 389                         num_pols_changrp = 4;
 390                 grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
 391                 if (num_pols_changrp)
 392                         grange[1] = g_variant_new_uint64(devc->max_samplebytes / num_pols_changrp);
 393                 else
 394                         grange[1] = g_variant_new_uint64(MIN_NUM_SAMPLES);
 395                 *data = g_variant_new_tuple(grange, 2);
 396                 break;
 397         default:
 398                 return SR_ERR_NA;
 399         }
 400
 401         return SR_OK;
 402 }
 403
 404 static int dev_open(struct sr_dev_inst *sdi)
 405 {
 406         struct dev_context *devc;
 407
 408         devc = sdi->priv;
 409
 410         return p_ols_open(devc);
 411 }
 412
 413 static int dev_close(struct sr_dev_inst *sdi)
 414 {
 415         struct dev_context *devc;
 416
 417         devc = sdi->priv;
 418
 419         return p_ols_close(devc);
 420 }
 421
 422 static int set_trigger(const struct sr_dev_inst *sdi, int stage)
 423 {
 424         struct dev_context *devc;
 425         uint8_t cmd, arg[4];
 426
 427         devc = sdi->priv;
 428
 429         cmd = CMD_SET_TRIGGER_MASK + stage * 4;
 430         arg[0] = devc->trigger_mask[stage] & 0xff;
 431         arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
 432         arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
 433         arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
 434         if (write_longcommand(devc, cmd, arg) != SR_OK)
 435                 return SR_ERR;
 436
 437         cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
 438         arg[0] = devc->trigger_value[stage] & 0xff;
 439         arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
 440         arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
 441         arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
 442         if (write_longcommand(devc, cmd, arg) != SR_OK)
 443                 return SR_ERR;
 444
 445         cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
 446         arg[0] = arg[1] = arg[3] = 0x00;
 447         arg[2] = stage;
 448         if (stage == devc->num_stages)
 449                 /* Last stage, fire when this one matches. */
 450                 arg[3] |= TRIGGER_START;
 451         if (write_longcommand(devc, cmd, arg) != SR_OK)
 452                 return SR_ERR;
 453
 454         cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
 455         arg[0] = devc->trigger_edge[stage] & 0xff;
 456         arg[1] = (devc->trigger_edge[stage] >> 8) & 0xff;
 457         arg[2] = (devc->trigger_edge[stage] >> 16) & 0xff;
 458         arg[3] = (devc->trigger_edge[stage] >> 24) & 0xff;
 459         if (write_longcommand(devc, cmd, arg) != SR_OK)
 460                 return SR_ERR;
 461
 462         return SR_OK;
 463 }
 464
 465 static int disable_trigger(const struct sr_dev_inst *sdi, int stage)
 466 {
 467         struct dev_context *devc;
 468         uint8_t cmd, arg[4];
 469
 470         devc = sdi->priv;
 471
 472         cmd = CMD_SET_TRIGGER_MASK + stage * 4;
 473         arg[0] = arg[1] = arg[2] = arg[3] = 0x00;
 474         if (write_longcommand(devc, cmd, arg) != SR_OK)
 475                 return SR_ERR;
 476
 477         cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
 478         if (write_longcommand(devc, cmd, arg) != SR_OK)
 479                 return SR_ERR;
 480
 481         cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
 482         arg[2] = 0x03;
 483         if (write_longcommand(devc, cmd, arg) != SR_OK)
 484                 return SR_ERR;
 485
 486         cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
 487         arg[2] = 0x00;
 488         if (write_longcommand(devc, cmd, arg) != SR_OK)
 489                 return SR_ERR;
 490
 491         return SR_OK;
 492 }
 493
 494 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 495 {
 496         struct dev_context *devc;
 497         uint32_t samplecount, readcount, delaycount;
 498         uint8_t pols_changrp_mask, arg[4];
 499         uint16_t flag_tmp;
 500         int num_pols_changrp, samplespercount;
 501         int ret, i;
 502
 503         devc = sdi->priv;
 504
 505         pols_channel_mask(sdi);
 506
 507         /*
 508          * Enable/disable channel groups in the flag register according to the
 509          * channel mask. Calculate this here, because num_pols_changrp is
 510          * needed to limit readcount.
 511          */
 512         pols_changrp_mask = 0;
 513         num_pols_changrp = 0;
 514         for (i = 0; i < 4; i++) {
 515                 if (devc->channel_mask & (0xff << (i * 8))) {
 516                         pols_changrp_mask |= (1 << i);
 517                         num_pols_changrp++;
 518                 }
 519         }
 520         /* 3 channel groups takes as many bytes as 4 channel groups */
 521         if (num_pols_changrp == 3)
 522                 num_pols_changrp = 4;
 523         /* maximum number of samples (or RLE counts) the buffer memory can hold */
 524         devc->max_samples = devc->max_samplebytes / num_pols_changrp;
 525
 526         /*
 527          * Limit readcount to prevent reading past the end of the hardware
 528          * buffer.
 529          */
 530         sr_dbg("max_samples = %d", devc->max_samples);
 531         sr_dbg("limit_samples = %" PRIu64, devc->limit_samples);
 532         samplecount = MIN(devc->max_samples, devc->limit_samples);
 533         sr_dbg("Samplecount = %d", samplecount);
 534
 535         /* In demux mode the OLS is processing two samples per clock */
 536         if (devc->flag_reg & FLAG_DEMUX) {
 537                 samplespercount = 8;
 538         }
 539         else {
 540                 samplespercount = 4;
 541         }
 542
 543         readcount = samplecount / samplespercount;
 544
 545         /* Rather read too many samples than too few. */
 546         if (samplecount % samplespercount != 0)
 547                 readcount++;
 548
 549         /* Basic triggers. */
 550         if (pols_convert_trigger(sdi) != SR_OK) {
 551                 sr_err("Failed to configure channels.");
 552                 return SR_ERR;
 553         }
 554
 555         if (devc->num_stages > 0) {
 556                 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
 557                 devc->trigger_at = (readcount - delaycount) * samplespercount - devc->num_stages;
 558                 for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
 559                         if (i <= devc->num_stages) {
 560                                 sr_dbg("Setting p-ols stage %d trigger.", i);
 561                                 if ((ret = set_trigger(sdi, i)) != SR_OK)
 562                                         return ret;
 563                         }
 564                         else {
 565                                 sr_dbg("Disabling p-ols stage %d trigger.", i);
 566                                 if ((ret = disable_trigger(sdi, i)) != SR_OK)
 567                                         return ret;
 568                         }
 569                 }
 570         } else {
 571                 /* No triggers configured, force trigger on first stage. */
 572                 sr_dbg("Forcing trigger at stage 0.");
 573                 if ((ret = set_trigger(sdi, 0)) != SR_OK)
 574                         return ret;
 575                 delaycount = readcount;
 576         }
 577
 578         /* Samplerate. */
 579         sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
 580                         devc->cur_samplerate, devc->cur_samplerate_divider);
 581         arg[0] = devc->cur_samplerate_divider & 0xff;
 582         arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
 583         arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
 584         arg[3] = 0x00;
 585         if (write_longcommand(devc, CMD_SET_DIVIDER, arg) != SR_OK)
 586                 return SR_ERR;
 587
 588         /* Send extended sample limit and pre/post-trigger capture ratio. */
 589         arg[0] = ((readcount - 1) & 0xff);
 590         arg[1] = ((readcount - 1) & 0xff00) >> 8;
 591         arg[2] = ((readcount - 1) & 0xff0000) >> 16;
 592         arg[3] = ((readcount - 1) & 0xff000000) >> 24;
 593         if (write_longcommand(devc, CMD_CAPTURE_DELAY, arg) != SR_OK)
 594                 return SR_ERR;
 595         arg[0] = ((delaycount - 1) & 0xff);
 596         arg[1] = ((delaycount - 1) & 0xff00) >> 8;
 597         arg[2] = ((delaycount - 1) & 0xff0000) >> 16;
 598         arg[3] = ((delaycount - 1) & 0xff000000) >> 24;
 599         if (write_longcommand(devc, CMD_CAPTURE_COUNT, arg) != SR_OK)
 600                 return SR_ERR;
 601
 602         /* Flag register. */
 603         sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
 604                         devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
 605                         devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
 606                         devc->flag_reg & FLAG_RLE ? "on" : "off",
 607                         devc->flag_reg & FLAG_FILTER ? "on": "off",
 608                         devc->flag_reg & FLAG_DEMUX ? "on" : "off");
 609
 610         /*
 611         * Enable/disable OLS channel groups in the flag register according
 612         * to the channel mask. 1 means "disable channel".
 613         */
 614         devc->flag_reg &= ~0x3c;
 615         devc->flag_reg |= ~(pols_changrp_mask << 2) & 0x3c;
 616         sr_dbg("flag_reg = %x", devc->flag_reg);
 617
 618         /*
 619         * In demux mode the OLS is processing two 8-bit or 16-bit samples
 620         * in parallel and for this to work the lower two bits of the four
 621         * "channel_disable" bits must be replicated to the upper two bits.
 622         */
 623         flag_tmp = devc->flag_reg;
 624         if (devc->flag_reg & FLAG_DEMUX) {
 625                 flag_tmp &= ~0x30;
 626                 flag_tmp |= ~(pols_changrp_mask << 4) & 0x30;
 627         }
 628         arg[0] = flag_tmp & 0xff;
 629         arg[1] = flag_tmp >> 8;
 630         arg[2] = arg[3] = 0x00;
 631         if (write_longcommand(devc, CMD_SET_FLAGS, arg) != SR_OK)
 632                 return SR_ERR;
 633
 634         /* Start acquisition on the device. */
 635         if (write_shortcommand(devc, CMD_RUN) != SR_OK)
 636                 return SR_ERR;
 637
 638         /* Reset all operational states. */
 639         devc->rle_count = devc->num_transfers = 0;
 640         devc->num_samples = devc->num_bytes = 0;
 641         devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
 642         memset(devc->sample, 0, 4);
 643
 644         std_session_send_df_header(sdi);
 645
 646         /* Hook up a dummy handler to receive data from the device. */
 647         sr_session_source_add(sdi->session, -1, 0, 10, p_ols_receive_data,
 648                                 (struct sr_dev_inst *)sdi);
 649
 650         return SR_OK;
 651 }
 652
 653 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
 654 {
 655         struct dev_context *devc;
 656
 657         devc = sdi->priv;
 658
 659         write_shortcommand(devc, CMD_RESET);
 660         write_shortcommand(devc, CMD_RESET);
 661         write_shortcommand(devc, CMD_RESET);
 662         write_shortcommand(devc, CMD_RESET);
 663         write_shortcommand(devc, CMD_RESET);
 664
 665         sr_session_source_remove(sdi->session, -1);
 666
 667         std_session_send_df_end(sdi);
 668
 669         return SR_OK;
 670 }
 671
 672 SR_PRIV struct sr_dev_driver p_ols_driver_info = {
 673         .name = "p-ols",
 674         .longname = "Pipistrello OLS",
 675         .api_version = 1,
 676         .init = std_init,
 677         .cleanup = std_cleanup,
 678         .scan = scan,
 679         .dev_list = std_dev_list,
 680         .dev_clear = dev_clear,
 681         .config_get = config_get,
 682         .config_set = config_set,
 683         .config_list = config_list,
 684         .dev_open = dev_open,
 685         .dev_close = dev_close,
 686         .dev_acquisition_start = dev_acquisition_start,
 687         .dev_acquisition_stop = dev_acquisition_stop,
 688         .context = NULL,
 689 };
 690 SR_REGISTER_DEV_DRIVER(p_ols_driver_info);