2 * This file is part of the libsigrok project.
4 * Copyright (C) 2022 Gerhard Sittig <gerhard.sittig@gmx.net>
5 * Copyright (C) 2020 Florian Schmidt <schmidt_florian@gmx.de>
6 * Copyright (C) 2013 Marcus Comstedt <marcus@mc.pp.se>
7 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
8 * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
10 * This program is free software: you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation, either version 3 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program. If not, see <http://www.gnu.org/licenses/>.
24 #ifndef LIBSIGROK_HARDWARE_KINGST_LA2016_PROTOCOL_H
25 #define LIBSIGROK_HARDWARE_KINGST_LA2016_PROTOCOL_H
27 #include <libsigrok/libsigrok.h>
30 #define LOG_PREFIX "kingst-la2016"
32 #define LA2016_VID 0x77a1
33 #define LA2016_PID 0x01a2
34 #define LA2016_IPRODUCT_INDEX 2
35 #define USB_INTERFACE 0
36 #define USB_CONFIGURATION 1
37 #define USB_EP_FPGA_BITSTREAM 2
38 #define USB_EP_CAPTURE_DATA 6
41 * On Windows sigrok uses WinUSB RAW_IO policy which requires the
42 * USB transfer buffer size to be a multiple of the endpoint max packet
43 * size, which is 512 bytes in this case. Also, the maximum allowed size
44 * of the transfer buffer is normally read from WinUSB_GetPipePolicy API
45 * but libusb does not expose this function. Typically, max size is 2MB.
47 #define LA2016_EP6_PKTSZ 512 /* Max packet size of USB endpoint 6. */
48 #define LA2016_USB_BUFSZ (256 * 2 * LA2016_EP6_PKTSZ) /* 256KiB buffer. */
49 #define LA2016_USB_XFER_COUNT 32 /* Size of USB bulk transfers pool. */
51 /* USB communication timeout during regular operation. */
52 #define DEFAULT_TIMEOUT_MS 200
53 #define CAPTURE_TIMEOUT_MS 500
56 * Check for MCU firmware to take effect after upload. Check the device
57 * presence for a maximum period of time, delay between checks in that
58 * phase. Allow for the device to vanish after upload and before checks,
59 * to not mistake its earlier incarnation for the successful operation
60 * of the most recently loaded firmware.
62 #define RENUM_CHECK_PERIOD_MS 3000
63 #define RENUM_GONE_DELAY_MS 1800
64 #define RENUM_POLL_INTERVAL_MS 200
67 * The device expects some zero padding to follow the content of the
68 * file which contains the FPGA bitstream. Specify the chunk size here.
70 #define LA2016_EP2_PADDING 2048
73 * Whether the logic input threshold voltage is a config item of the
74 * "Logic" channel group or a global config item of the device. Ideally
75 * it would be the former (being strictly related to the Logic channels)
76 * but mainline applications work better with the latter, and many other
77 * device drivers implement it that way, too.
79 #define WITH_THRESHOLD_DEVCFG 1
81 #define LA2016_THR_VOLTAGE_MIN 0.40
82 #define LA2016_THR_VOLTAGE_MAX 4.00
84 /* Properties related to the layout of capture data downloads. */
85 #define TRANSFER_PACKET_LENGTH 16
86 #define LA2016_NUM_SAMPLES_MAX (UINT64_C(10 * 1000 * 1000 * 1000))
88 /* Maximum device capabilities. May differ between models. */
89 #define MAX_PWM_FREQ SR_MHZ(20)
90 #define PWM_CLOCK SR_MHZ(200) /* 200MHz for both LA2016 and LA1016 */
92 #define LA2016_NUM_PWMCH_MAX 2
95 * Whether to de-initialize the device hardware in the driver's close
96 * callback. It is desirable to e.g. configure PWM channels and leave
97 * the generator running after the application shuts down. Users can
98 * always disable channels on their way out if they want to.
100 #define WITH_DEINIT_IN_CLOSE 0
102 #define LA2016_CONVBUFFER_SIZE (4 * 1024 * 1024)
104 struct kingst_model {
105 uint8_t magic; /* EEPROM magic byte value. */
106 const char *name; /* User perceived model name. */
107 const char *fpga_stem; /* Bitstream filename stem. */
108 uint64_t samplerate; /* Max samplerate in Hz. */
109 size_t channel_count; /* Max channel count (16, 32). */
110 uint64_t memory_bits; /* RAM capacity in Gbit (1, 2, 4). */
116 char *fpga_bitstream;
117 uint64_t fw_uploaded; /* Timestamp of most recent FW upload. */
118 uint8_t identify_magic;
119 const struct kingst_model *model;
120 struct sr_channel_group *cg_logic, *cg_pwm;
122 /* User specified parameters. */
127 } pwm_setting[LA2016_NUM_PWMCH_MAX];
128 size_t threshold_voltage_idx;
130 struct sr_sw_limits sw_limits;
131 uint64_t capture_ratio;
133 /* Internal acquisition and download state. */
134 gboolean trigger_involved;
135 gboolean frame_begin_sent;
136 gboolean completion_seen;
137 gboolean download_finished;
138 uint32_t packets_per_chunk;
139 struct capture_info {
140 uint32_t n_rep_packets;
141 uint32_t n_rep_packets_before_trigger;
144 uint32_t n_transfer_packets_to_read; /* each with 5 acq packets */
145 uint32_t n_bytes_to_read;
146 uint32_t n_reps_until_trigger;
147 gboolean trigger_marked;
148 uint64_t total_samples;
151 struct feed_queue_logic *feed_queue;
153 size_t transfer_bufsize;
156 SR_PRIV int la2016_upload_firmware(const struct sr_dev_inst *sdi,
157 struct sr_context *sr_ctx, libusb_device *dev, gboolean skip_upload);
158 SR_PRIV int la2016_identify_device(const struct sr_dev_inst *sdi,
159 gboolean show_message);
160 SR_PRIV int la2016_init_hardware(const struct sr_dev_inst *sdi);
161 SR_PRIV int la2016_deinit_hardware(const struct sr_dev_inst *sdi);
162 SR_PRIV int la2016_write_pwm_config(const struct sr_dev_inst *sdi, size_t idx);
163 SR_PRIV int la2016_setup_acquisition(const struct sr_dev_inst *sdi,
165 SR_PRIV int la2016_start_acquisition(const struct sr_dev_inst *sdi);
166 SR_PRIV int la2016_abort_acquisition(const struct sr_dev_inst *sdi);
167 SR_PRIV int la2016_receive_data(int fd, int revents, void *cb_data);
168 SR_PRIV void la2016_release_resources(const struct sr_dev_inst *sdi);