2 * This file is part of the libsigrok project.
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5 * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
24 #include <glib/gstdio.h>
27 #define DS_CMD_GET_FW_VERSION 0xb0
28 #define DS_CMD_GET_REVID_VERSION 0xb1
29 #define DS_CMD_START 0xb2
30 #define DS_CMD_CONFIG 0xb3
31 #define DS_CMD_SETTING 0xb4
32 #define DS_CMD_CONTROL 0xb5
33 #define DS_CMD_STATUS 0xb6
34 #define DS_CMD_STATUS_INFO 0xb7
35 #define DS_CMD_WR_REG 0xb8
36 #define DS_CMD_WR_NVM 0xb9
37 #define DS_CMD_RD_NVM 0xba
38 #define DS_CMD_RD_NVM_PRE 0xbb
39 #define DS_CMD_GET_HW_INFO 0xbc
41 #define DS_START_FLAGS_STOP (1 << 7)
42 #define DS_START_FLAGS_CLK_48MHZ (1 << 6)
43 #define DS_START_FLAGS_SAMPLE_WIDE (1 << 5)
44 #define DS_START_FLAGS_MODE_LA (1 << 4)
46 #define DS_ADDR_COMB 0x68
47 #define DS_ADDR_EEWP 0x70
48 #define DS_ADDR_VTH 0x78
50 #define DS_MAX_LOGIC_DEPTH SR_MHZ(16)
51 #define DS_MAX_LOGIC_SAMPLERATE SR_MHZ(100)
52 #define DS_MAX_TRIG_PERCENT 90
54 #define DS_MODE_TRIG_EN (1 << 0)
55 #define DS_MODE_CLK_TYPE (1 << 1)
56 #define DS_MODE_CLK_EDGE (1 << 2)
57 #define DS_MODE_RLE_MODE (1 << 3)
58 #define DS_MODE_DSO_MODE (1 << 4)
59 #define DS_MODE_HALF_MODE (1 << 5)
60 #define DS_MODE_QUAR_MODE (1 << 6)
61 #define DS_MODE_ANALOG_MODE (1 << 7)
62 #define DS_MODE_FILTER (1 << 8)
63 #define DS_MODE_INSTANT (1 << 9)
64 #define DS_MODE_STRIG_MODE (1 << 11)
65 #define DS_MODE_STREAM_MODE (1 << 12)
66 #define DS_MODE_LPB_TEST (1 << 13)
67 #define DS_MODE_EXT_TEST (1 << 14)
68 #define DS_MODE_INT_TEST (1 << 15)
70 #define DSLOGIC_ATOMIC_SAMPLES (1 << 6)
73 * The FPGA is configured with TLV tuples. Length is specified as the
74 * number of 16-bit words.
76 #define _DS_CFG(variable, wordcnt) ((variable << 8) | wordcnt)
77 #define DS_CFG_START 0xf5a5f5a5
78 #define DS_CFG_MODE _DS_CFG(0, 1)
79 #define DS_CFG_DIVIDER _DS_CFG(1, 2)
80 #define DS_CFG_COUNT _DS_CFG(3, 2)
81 #define DS_CFG_TRIG_POS _DS_CFG(5, 2)
82 #define DS_CFG_TRIG_GLB _DS_CFG(7, 1)
83 #define DS_CFG_CH_EN _DS_CFG(8, 1)
84 #define DS_CFG_TRIG _DS_CFG(64, 160)
85 #define DS_CFG_END 0xfa5afa5a
94 struct cmd_start_acquisition {
96 uint8_t sample_delay_h;
97 uint8_t sample_delay_l;
100 struct dslogic_fpga_config {
103 uint16_t mode_header;
105 uint16_t divider_header;
107 uint16_t count_header;
109 uint16_t trig_pos_header;
111 uint16_t trig_glb_header;
113 uint16_t ch_en_header;
116 uint16_t trig_header;
117 uint16_t trig_mask0[NUM_TRIGGER_STAGES];
118 uint16_t trig_mask1[NUM_TRIGGER_STAGES];
119 uint16_t trig_value0[NUM_TRIGGER_STAGES];
120 uint16_t trig_value1[NUM_TRIGGER_STAGES];
121 uint16_t trig_edge0[NUM_TRIGGER_STAGES];
122 uint16_t trig_edge1[NUM_TRIGGER_STAGES];
123 uint16_t trig_logic0[NUM_TRIGGER_STAGES];
124 uint16_t trig_logic1[NUM_TRIGGER_STAGES];
125 uint32_t trig_count[NUM_TRIGGER_STAGES];
133 * This should be larger than the FPGA bitstream image so that it'll get
134 * uploaded in one big operation. There seem to be issues when uploading
137 #define FW_BUFSIZE (1024 * 1024)
139 #define FPGA_UPLOAD_DELAY (10 * 1000)
141 #define USB_TIMEOUT (3 * 1000)
143 static int command_get_fw_version(libusb_device_handle *devhdl,
144 struct version_info *vi)
148 ret = libusb_control_transfer(devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
149 LIBUSB_ENDPOINT_IN, DS_CMD_GET_FW_VERSION, 0x0000, 0x0000,
150 (unsigned char *)vi, sizeof(struct version_info), USB_TIMEOUT);
153 sr_err("Unable to get version info: %s.",
154 libusb_error_name(ret));
161 static int command_get_revid_version(struct sr_dev_inst *sdi, uint8_t *revid)
163 struct sr_usb_dev_inst *usb = sdi->conn;
164 libusb_device_handle *devhdl = usb->devhdl;
167 ret = libusb_control_transfer(devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
168 LIBUSB_ENDPOINT_IN, DS_CMD_GET_REVID_VERSION, 0x0000, 0x0000,
169 revid, 1, USB_TIMEOUT);
172 sr_err("Unable to get REVID: %s.", libusb_error_name(ret));
179 static int command_start_acquisition(const struct sr_dev_inst *sdi)
181 struct sr_usb_dev_inst *usb;
182 struct dslogic_mode mode;
185 mode.flags = DS_START_FLAGS_MODE_LA | DS_START_FLAGS_SAMPLE_WIDE;
186 mode.sample_delay_h = mode.sample_delay_l = 0;
189 ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
190 LIBUSB_ENDPOINT_OUT, DS_CMD_START, 0x0000, 0x0000,
191 (unsigned char *)&mode, sizeof(mode), USB_TIMEOUT);
193 sr_err("Failed to send start command: %s.", libusb_error_name(ret));
200 static int command_stop_acquisition(const struct sr_dev_inst *sdi)
202 struct sr_usb_dev_inst *usb;
203 struct dslogic_mode mode;
206 mode.flags = DS_START_FLAGS_STOP;
207 mode.sample_delay_h = mode.sample_delay_l = 0;
210 ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
211 LIBUSB_ENDPOINT_OUT, DS_CMD_START, 0x0000, 0x0000,
212 (unsigned char *)&mode, sizeof(struct dslogic_mode), USB_TIMEOUT);
214 sr_err("Failed to send stop command: %s.", libusb_error_name(ret));
221 SR_PRIV int dslogic_fpga_firmware_upload(const struct sr_dev_inst *sdi)
223 const char *name = NULL;
225 struct sr_resource bitstream;
226 struct drv_context *drvc;
227 struct dev_context *devc;
228 struct sr_usb_dev_inst *usb;
233 const uint8_t cmd[3] = {0, 0, 0};
235 drvc = sdi->driver->context;
239 if (!strcmp(devc->profile->model, "DSLogic")) {
240 if (devc->cur_threshold < 1.40)
241 name = DSLOGIC_FPGA_FIRMWARE_3V3;
243 name = DSLOGIC_FPGA_FIRMWARE_5V;
244 } else if (!strcmp(devc->profile->model, "DSLogic Pro")){
245 name = DSLOGIC_PRO_FPGA_FIRMWARE;
246 } else if (!strcmp(devc->profile->model, "DSLogic Plus")){
247 name = DSLOGIC_PLUS_FPGA_FIRMWARE;
248 } else if (!strcmp(devc->profile->model, "DSLogic Basic")){
249 name = DSLOGIC_BASIC_FPGA_FIRMWARE;
250 } else if (!strcmp(devc->profile->model, "DSCope")) {
251 name = DSCOPE_FPGA_FIRMWARE;
253 sr_err("Failed to select FPGA firmware.");
257 sr_dbg("Uploading FPGA firmware '%s'.", name);
259 result = sr_resource_open(drvc->sr_ctx, &bitstream,
260 SR_RESOURCE_FIRMWARE, name);
264 /* Tell the device firmware is coming. */
265 if ((ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
266 LIBUSB_ENDPOINT_OUT, DS_CMD_CONFIG, 0x0000, 0x0000,
267 (unsigned char *)&cmd, sizeof(cmd), USB_TIMEOUT)) < 0) {
268 sr_err("Failed to upload FPGA firmware: %s.", libusb_error_name(ret));
269 sr_resource_close(drvc->sr_ctx, &bitstream);
273 /* Give the FX2 time to get ready for FPGA firmware upload. */
274 g_usleep(FPGA_UPLOAD_DELAY);
276 buf = g_malloc(FW_BUFSIZE);
280 chunksize = sr_resource_read(drvc->sr_ctx, &bitstream,
287 if ((ret = libusb_bulk_transfer(usb->devhdl, 2 | LIBUSB_ENDPOINT_OUT,
288 buf, chunksize, &transferred, USB_TIMEOUT)) < 0) {
289 sr_err("Unable to configure FPGA firmware: %s.",
290 libusb_error_name(ret));
295 sr_spew("Uploaded %" PRIu64 "/%" PRIu64 " bytes.",
296 sum, bitstream.size);
298 if (transferred != chunksize) {
299 sr_err("Short transfer while uploading FPGA firmware.");
305 sr_resource_close(drvc->sr_ctx, &bitstream);
308 sr_dbg("FPGA firmware upload done.");
314 * Get the session trigger and configure the FPGA structure
317 static void set_trigger(const struct sr_dev_inst *sdi,
318 struct dslogic_fpga_config *cfg)
320 struct sr_trigger *trigger;
321 struct sr_trigger_stage *stage;
322 struct sr_trigger_match *match;
323 struct dev_context *devc;
325 int num_enabled_channels = 0, num_trigger_stages = 0;
326 int channelbit, i = 0;
327 uint32_t trigger_point;
332 for (l = sdi->channels; l; l = l->next) {
333 const struct sr_channel *const probe = (struct sr_channel *)l->data;
334 if (probe->enabled) {
335 num_enabled_channels++;
336 cfg->ch_en |= 1 << probe->index;
340 cfg->trig_mask0[0] = 0xffff;
341 cfg->trig_mask1[0] = 0xffff;
343 cfg->trig_value0[0] = 0;
344 cfg->trig_value1[0] = 0;
346 cfg->trig_edge0[0] = 0;
347 cfg->trig_edge1[0] = 0;
349 cfg->trig_logic0[0] = 2;
350 cfg->trig_logic1[0] = 2;
352 cfg->trig_count[0] = 0;
354 cfg->trig_glb = num_enabled_channels << 4;
356 for (i = 1; i < NUM_TRIGGER_STAGES; i++) {
357 cfg->trig_mask0[i] = 0xffff;
358 cfg->trig_mask1[i] = 0xffff;
359 cfg->trig_value0[i] = 0;
360 cfg->trig_value1[i] = 0;
361 cfg->trig_edge0[i] = 0;
362 cfg->trig_edge1[i] = 0;
363 cfg->trig_logic0[i] = 2;
364 cfg->trig_logic1[i] = 2;
365 cfg->trig_count[i] = 0;
368 trigger_point = (devc->capture_ratio * devc->limit_samples) / 100;
369 if (trigger_point < DSLOGIC_ATOMIC_SAMPLES)
370 trigger_point = DSLOGIC_ATOMIC_SAMPLES;
371 const uint32_t mem_depth = devc->profile->mem_depth;
372 const uint32_t max_trigger_point = devc->continuous_mode ? ((mem_depth * 10) / 100) :
373 ((mem_depth * DS_MAX_TRIG_PERCENT) / 100);
374 if (trigger_point > max_trigger_point)
375 trigger_point = max_trigger_point;
376 cfg->trig_pos = trigger_point & ~(DSLOGIC_ATOMIC_SAMPLES - 1);
378 if (!(trigger = sr_session_trigger_get(sdi->session))) {
379 sr_dbg("No session trigger found");
383 for (l = trigger->stages; l; l = l->next) {
385 num_trigger_stages++;
386 for (m = stage->matches; m; m = m->next) {
388 if (!match->channel->enabled)
389 /* Ignore disabled channels with a trigger. */
391 channelbit = 1 << (match->channel->index);
392 /* Simple trigger support (event). */
393 if (match->match == SR_TRIGGER_ONE) {
394 cfg->trig_mask0[0] &= ~channelbit;
395 cfg->trig_mask1[0] &= ~channelbit;
396 cfg->trig_value0[0] |= channelbit;
397 cfg->trig_value1[0] |= channelbit;
398 } else if (match->match == SR_TRIGGER_ZERO) {
399 cfg->trig_mask0[0] &= ~channelbit;
400 cfg->trig_mask1[0] &= ~channelbit;
401 } else if (match->match == SR_TRIGGER_FALLING) {
402 cfg->trig_mask0[0] &= ~channelbit;
403 cfg->trig_mask1[0] &= ~channelbit;
404 cfg->trig_edge0[0] |= channelbit;
405 cfg->trig_edge1[0] |= channelbit;
406 } else if (match->match == SR_TRIGGER_RISING) {
407 cfg->trig_mask0[0] &= ~channelbit;
408 cfg->trig_mask1[0] &= ~channelbit;
409 cfg->trig_value0[0] |= channelbit;
410 cfg->trig_value1[0] |= channelbit;
411 cfg->trig_edge0[0] |= channelbit;
412 cfg->trig_edge1[0] |= channelbit;
413 } else if (match->match == SR_TRIGGER_EDGE) {
414 cfg->trig_edge0[0] |= channelbit;
415 cfg->trig_edge1[0] |= channelbit;
420 cfg->trig_glb |= num_trigger_stages;
425 static int fpga_configure(const struct sr_dev_inst *sdi)
427 struct dev_context *devc;
428 struct sr_usb_dev_inst *usb;
430 struct dslogic_fpga_config cfg;
433 int transferred, len, ret;
435 sr_dbg("Configuring FPGA.");
440 WL32(&cfg.sync, DS_CFG_START);
441 WL16(&cfg.mode_header, DS_CFG_MODE);
442 WL16(&cfg.divider_header, DS_CFG_DIVIDER);
443 WL16(&cfg.count_header, DS_CFG_COUNT);
444 WL16(&cfg.trig_pos_header, DS_CFG_TRIG_POS);
445 WL16(&cfg.trig_glb_header, DS_CFG_TRIG_GLB);
446 WL16(&cfg.ch_en_header, DS_CFG_CH_EN);
447 WL16(&cfg.trig_header, DS_CFG_TRIG);
448 WL32(&cfg.end_sync, DS_CFG_END);
450 /* Pass in the length of a fixed-size struct. Really. */
451 len = sizeof(struct dslogic_fpga_config) / 2;
453 c[1] = (len >> 8) & 0xff;
454 c[2] = (len >> 16) & 0xff;
456 ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
457 LIBUSB_ENDPOINT_OUT, DS_CMD_SETTING, 0x0000, 0x0000,
458 c, sizeof(c), USB_TIMEOUT);
460 sr_err("Failed to send FPGA configure command: %s.",
461 libusb_error_name(ret));
467 if (devc->mode == DS_OP_INTERNAL_TEST)
468 v16 = DS_MODE_INT_TEST;
469 else if (devc->mode == DS_OP_EXTERNAL_TEST)
470 v16 = DS_MODE_EXT_TEST;
471 else if (devc->mode == DS_OP_LOOPBACK_TEST)
472 v16 = DS_MODE_LPB_TEST;
474 if (devc->cur_samplerate == DS_MAX_LOGIC_SAMPLERATE * 2)
475 v16 |= DS_MODE_HALF_MODE;
476 else if (devc->cur_samplerate == DS_MAX_LOGIC_SAMPLERATE * 4)
477 v16 |= DS_MODE_QUAR_MODE;
479 if (devc->continuous_mode)
480 v16 |= DS_MODE_STREAM_MODE;
481 if (devc->external_clock) {
482 v16 |= DS_MODE_CLK_TYPE;
483 if (devc->clock_edge == DS_EDGE_FALLING)
484 v16 |= DS_MODE_CLK_EDGE;
486 if (devc->limit_samples > DS_MAX_LOGIC_DEPTH *
487 ceil(devc->cur_samplerate * 1.0 / DS_MAX_LOGIC_SAMPLERATE)
488 && !devc->continuous_mode) {
489 /* Enable RLE for long captures.
490 * Without this, captured data present errors.
492 v16 |= DS_MODE_RLE_MODE;
495 WL16(&cfg.mode, v16);
496 v32 = ceil(DS_MAX_LOGIC_SAMPLERATE * 1.0 / devc->cur_samplerate);
497 WL32(&cfg.divider, v32);
499 /* Number of 16-sample units. */
500 WL32(&cfg.count, devc->limit_samples / 16);
502 set_trigger(sdi, &cfg);
504 len = sizeof(struct dslogic_fpga_config);
505 ret = libusb_bulk_transfer(usb->devhdl, 2 | LIBUSB_ENDPOINT_OUT,
506 (unsigned char *)&cfg, len, &transferred, USB_TIMEOUT);
507 if (ret < 0 || transferred != len) {
508 sr_err("Failed to send FPGA configuration: %s.", libusb_error_name(ret));
515 SR_PRIV int dslogic_set_voltage_threshold(const struct sr_dev_inst *sdi, double threshold)
518 struct dev_context *const devc = sdi->priv;
519 const struct sr_usb_dev_inst *const usb = sdi->conn;
520 const uint8_t value = (threshold / 5.0) * 255;
521 const uint16_t cmd = value | (DS_ADDR_VTH << 8);
523 /* Send the control command. */
524 ret = libusb_control_transfer(usb->devhdl,
525 LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_ENDPOINT_OUT,
526 DS_CMD_WR_REG, 0x0000, 0x0000,
527 (unsigned char *)&cmd, sizeof(cmd), 3000);
529 sr_err("Unable to set voltage-threshold register: %s.",
530 libusb_error_name(ret));
534 devc->cur_threshold = threshold;
539 SR_PRIV int dslogic_dev_open(struct sr_dev_inst *sdi, struct sr_dev_driver *di)
541 libusb_device **devlist;
542 struct sr_usb_dev_inst *usb;
543 struct libusb_device_descriptor des;
544 struct dev_context *devc;
545 struct drv_context *drvc;
546 struct version_info vi;
547 int ret, i, device_count;
549 char connection_id[64];
555 if (sdi->status == SR_ST_ACTIVE)
556 /* Device is already in use. */
559 device_count = libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
560 if (device_count < 0) {
561 sr_err("Failed to get device list: %s.",
562 libusb_error_name(device_count));
566 for (i = 0; i < device_count; i++) {
567 libusb_get_device_descriptor(devlist[i], &des);
569 if (des.idVendor != devc->profile->vid
570 || des.idProduct != devc->profile->pid)
573 if ((sdi->status == SR_ST_INITIALIZING) ||
574 (sdi->status == SR_ST_INACTIVE)) {
576 * Check device by its physical USB bus/port address.
578 usb_get_port_path(devlist[i], connection_id, sizeof(connection_id));
579 if (strcmp(sdi->connection_id, connection_id))
580 /* This is not the one. */
584 if (!(ret = libusb_open(devlist[i], &usb->devhdl))) {
585 if (usb->address == 0xff)
587 * First time we touch this device after FW
588 * upload, so we don't know the address yet.
590 usb->address = libusb_get_device_address(devlist[i]);
592 sr_err("Failed to open device: %s.",
593 libusb_error_name(ret));
597 if (libusb_has_capability(LIBUSB_CAP_SUPPORTS_DETACH_KERNEL_DRIVER)) {
598 if (libusb_kernel_driver_active(usb->devhdl, USB_INTERFACE) == 1) {
599 if ((ret = libusb_detach_kernel_driver(usb->devhdl, USB_INTERFACE)) < 0) {
600 sr_err("Failed to detach kernel driver: %s.",
601 libusb_error_name(ret));
607 ret = command_get_fw_version(usb->devhdl, &vi);
609 sr_err("Failed to get firmware version.");
613 ret = command_get_revid_version(sdi, &revid);
615 sr_err("Failed to get REVID.");
620 * Changes in major version mean incompatible/API changes, so
621 * bail out if we encounter an incompatible version.
622 * Different minor versions are OK, they should be compatible.
624 if (vi.major != DSLOGIC_REQUIRED_VERSION_MAJOR) {
625 sr_err("Expected firmware version %d.x, "
626 "got %d.%d.", DSLOGIC_REQUIRED_VERSION_MAJOR,
631 sdi->status = SR_ST_ACTIVE;
632 sr_info("Opened device on %d.%d (logical) / %s (physical), "
633 "interface %d, firmware %d.%d.",
634 usb->bus, usb->address, connection_id,
635 USB_INTERFACE, vi.major, vi.minor);
637 sr_info("Detected REVID=%d, it's a Cypress CY7C68013%s.",
638 revid, (revid != 1) ? " (FX2)" : "A (FX2LP)");
642 libusb_free_device_list(devlist, 1);
644 if (sdi->status != SR_ST_ACTIVE)
650 SR_PRIV struct dev_context *dslogic_dev_new(void)
652 struct dev_context *devc;
654 devc = g_malloc0(sizeof(struct dev_context));
655 devc->profile = NULL;
656 devc->fw_updated = 0;
657 devc->cur_samplerate = 0;
658 devc->limit_samples = 0;
659 devc->capture_ratio = 0;
660 devc->continuous_mode = FALSE;
661 devc->clock_edge = DS_EDGE_RISING;
666 static void abort_acquisition(struct dev_context *devc)
670 devc->acq_aborted = TRUE;
672 for (i = devc->num_transfers - 1; i >= 0; i--) {
673 if (devc->transfers[i])
674 libusb_cancel_transfer(devc->transfers[i]);
678 static void finish_acquisition(struct sr_dev_inst *sdi)
680 struct dev_context *devc;
684 std_session_send_df_end(sdi);
686 usb_source_remove(sdi->session, devc->ctx);
688 devc->num_transfers = 0;
689 g_free(devc->transfers);
692 static void free_transfer(struct libusb_transfer *transfer)
694 struct sr_dev_inst *sdi;
695 struct dev_context *devc;
698 sdi = transfer->user_data;
701 g_free(transfer->buffer);
702 transfer->buffer = NULL;
703 libusb_free_transfer(transfer);
705 for (i = 0; i < devc->num_transfers; i++) {
706 if (devc->transfers[i] == transfer) {
707 devc->transfers[i] = NULL;
712 devc->submitted_transfers--;
713 if (devc->submitted_transfers == 0)
714 finish_acquisition(sdi);
717 static void resubmit_transfer(struct libusb_transfer *transfer)
721 if ((ret = libusb_submit_transfer(transfer)) == LIBUSB_SUCCESS)
724 sr_err("%s: %s", __func__, libusb_error_name(ret));
725 free_transfer(transfer);
729 static void send_data(struct sr_dev_inst *sdi,
730 uint8_t *data, size_t length, size_t sample_width)
732 const struct sr_datafeed_logic logic = {
734 .unitsize = sample_width,
738 const struct sr_datafeed_packet packet = {
743 sr_session_send(sdi, &packet);
746 static void LIBUSB_CALL receive_transfer(struct libusb_transfer *transfer)
748 struct sr_dev_inst *sdi;
749 struct dev_context *devc;
750 gboolean packet_has_error = FALSE;
751 struct sr_datafeed_packet packet;
752 unsigned int num_samples;
753 int trigger_offset, cur_sample_count;
754 const int unitsize = 2;
756 sdi = transfer->user_data;
760 * If acquisition has already ended, just free any queued up
761 * transfer that come in.
763 if (devc->acq_aborted) {
764 free_transfer(transfer);
768 sr_dbg("receive_transfer(): status %s received %d bytes.",
769 libusb_error_name(transfer->status), transfer->actual_length);
771 /* Save incoming transfer before reusing the transfer struct. */
772 cur_sample_count = transfer->actual_length / unitsize;
774 switch (transfer->status) {
775 case LIBUSB_TRANSFER_NO_DEVICE:
776 abort_acquisition(devc);
777 free_transfer(transfer);
779 case LIBUSB_TRANSFER_COMPLETED:
780 case LIBUSB_TRANSFER_TIMED_OUT: /* We may have received some data though. */
783 packet_has_error = TRUE;
787 if (transfer->actual_length == 0 || packet_has_error) {
788 devc->empty_transfer_count++;
789 if (devc->empty_transfer_count > MAX_EMPTY_TRANSFERS) {
791 * The FX2 gave up. End the acquisition, the frontend
792 * will work out that the samplecount is short.
794 abort_acquisition(devc);
795 free_transfer(transfer);
797 resubmit_transfer(transfer);
801 devc->empty_transfer_count = 0;
803 if (devc->trigger_fired) {
804 if (!devc->limit_samples || devc->sent_samples < devc->limit_samples) {
805 /* Send the incoming transfer to the session bus. */
806 if (devc->limit_samples && devc->sent_samples + cur_sample_count > devc->limit_samples)
807 num_samples = devc->limit_samples - devc->sent_samples;
809 num_samples = cur_sample_count;
811 if (devc->trigger_pos > devc->sent_samples
812 && devc->trigger_pos <= devc->sent_samples + num_samples) {
813 /* DSLogic trigger in this block. Send trigger position. */
814 trigger_offset = devc->trigger_pos - devc->sent_samples;
815 /* Pre-trigger samples. */
816 send_data(sdi, (uint8_t *)transfer->buffer,
817 trigger_offset * unitsize, unitsize);
818 devc->sent_samples += trigger_offset;
819 /* Trigger position. */
820 devc->trigger_pos = 0;
821 packet.type = SR_DF_TRIGGER;
822 packet.payload = NULL;
823 sr_session_send(sdi, &packet);
824 /* Post trigger samples. */
825 num_samples -= trigger_offset;
826 send_data(sdi, (uint8_t *)transfer->buffer
827 + trigger_offset * unitsize, num_samples * unitsize, unitsize);
828 devc->sent_samples += num_samples;
830 send_data(sdi, (uint8_t *)transfer->buffer,
831 num_samples * unitsize, unitsize);
832 devc->sent_samples += num_samples;
837 if (devc->limit_samples && devc->sent_samples >= devc->limit_samples) {
838 abort_acquisition(devc);
839 free_transfer(transfer);
841 resubmit_transfer(transfer);
844 static int receive_data(int fd, int revents, void *cb_data)
847 struct drv_context *drvc;
852 drvc = (struct drv_context *)cb_data;
854 tv.tv_sec = tv.tv_usec = 0;
855 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
860 static unsigned int to_bytes_per_ms(unsigned int samplerate)
862 if (samplerate > SR_MHZ(100))
863 return SR_MHZ(100) / 1000 * 2;
864 return samplerate / 1000 * 2;
867 static size_t get_buffer_size(struct dev_context *devc)
870 * The buffer should be large enough to hold 10ms of data and
873 const size_t s = 10 * to_bytes_per_ms(devc->cur_samplerate);
874 return (s + 511) & ~511;
877 static int get_number_of_transfers(struct dev_context *devc)
879 /* Total buffer size should be able to hold about 100ms of data. */
880 const unsigned int n = (100 * to_bytes_per_ms(devc->cur_samplerate)) /
881 get_buffer_size(devc);
882 sr_info("New calculation: %d", n);
884 if (n > NUM_SIMUL_TRANSFERS)
885 return NUM_SIMUL_TRANSFERS;
890 static unsigned int get_timeout(struct dev_context *devc)
892 const size_t total_size = get_buffer_size(devc) *
893 get_number_of_transfers(devc);
894 const unsigned int timeout =
895 total_size / to_bytes_per_ms(devc->cur_samplerate);
896 return timeout + timeout / 4; /* Leave a headroom of 25% percent. */
899 static int start_transfers(const struct sr_dev_inst *sdi)
901 struct dev_context *devc;
902 struct sr_usb_dev_inst *usb;
903 struct libusb_transfer *transfer;
904 unsigned int i, num_transfers;
912 devc->sent_samples = 0;
913 devc->acq_aborted = FALSE;
914 devc->empty_transfer_count = 0;
915 devc->trigger_fired = TRUE;
917 num_transfers = get_number_of_transfers(devc);
919 if (devc->cur_samplerate == SR_MHZ(100))
921 else if (devc->cur_samplerate == SR_MHZ(200))
923 else if (devc->cur_samplerate == SR_MHZ(400))
926 size = get_buffer_size(devc);
927 devc->submitted_transfers = 0;
929 devc->transfers = g_try_malloc0(sizeof(*devc->transfers) * num_transfers);
930 if (!devc->transfers) {
931 sr_err("USB transfers malloc failed.");
932 return SR_ERR_MALLOC;
935 timeout = get_timeout(devc);
936 devc->num_transfers = num_transfers;
937 for (i = 0; i < num_transfers; i++) {
938 if (!(buf = g_try_malloc(size))) {
939 sr_err("USB transfer buffer malloc failed.");
940 return SR_ERR_MALLOC;
942 transfer = libusb_alloc_transfer(0);
943 libusb_fill_bulk_transfer(transfer, usb->devhdl,
944 6 | LIBUSB_ENDPOINT_IN, buf, size,
945 receive_transfer, (void *)sdi, timeout);
946 sr_info("submitting transfer: %d", i);
947 if ((ret = libusb_submit_transfer(transfer)) != 0) {
948 sr_err("Failed to submit transfer: %s.",
949 libusb_error_name(ret));
950 libusb_free_transfer(transfer);
952 abort_acquisition(devc);
955 devc->transfers[i] = transfer;
956 devc->submitted_transfers++;
959 std_session_send_df_header(sdi);
964 static void LIBUSB_CALL trigger_receive(struct libusb_transfer *transfer)
966 const struct sr_dev_inst *sdi;
967 struct dslogic_trigger_pos *tpos;
968 struct dev_context *devc;
970 sdi = transfer->user_data;
972 if (transfer->status == LIBUSB_TRANSFER_CANCELLED) {
973 sr_dbg("Trigger transfer canceled.");
974 /* Terminate session. */
975 std_session_send_df_end(sdi);
976 usb_source_remove(sdi->session, devc->ctx);
977 devc->num_transfers = 0;
978 g_free(devc->transfers);
979 } else if (transfer->status == LIBUSB_TRANSFER_COMPLETED
980 && transfer->actual_length == sizeof(struct dslogic_trigger_pos)) {
981 tpos = (struct dslogic_trigger_pos *)transfer->buffer;
982 sr_info("tpos real_pos %d ram_saddr %d cnt %d", tpos->real_pos,
983 tpos->ram_saddr, tpos->remain_cnt);
984 devc->trigger_pos = tpos->real_pos;
986 start_transfers(sdi);
988 libusb_free_transfer(transfer);
991 static int trigger_request(const struct sr_dev_inst *sdi)
993 struct sr_usb_dev_inst *usb;
994 struct libusb_transfer *transfer;
995 struct dslogic_trigger_pos *tpos;
996 struct dev_context *devc;
1002 if ((ret = command_stop_acquisition(sdi)) != SR_OK)
1005 if ((ret = fpga_configure(sdi)) != SR_OK)
1008 if ((ret = command_start_acquisition(sdi)) != SR_OK)
1011 sr_dbg("Getting trigger.");
1012 tpos = g_malloc(sizeof(struct dslogic_trigger_pos));
1013 transfer = libusb_alloc_transfer(0);
1014 libusb_fill_bulk_transfer(transfer, usb->devhdl, 6 | LIBUSB_ENDPOINT_IN,
1015 (unsigned char *)tpos, sizeof(struct dslogic_trigger_pos),
1016 trigger_receive, (void *)sdi, 0);
1017 if ((ret = libusb_submit_transfer(transfer)) < 0) {
1018 sr_err("Failed to request trigger: %s.", libusb_error_name(ret));
1019 libusb_free_transfer(transfer);
1024 devc->transfers = g_try_malloc0(sizeof(*devc->transfers));
1025 if (!devc->transfers) {
1026 sr_err("USB trigger_pos transfer malloc failed.");
1027 return SR_ERR_MALLOC;
1029 devc->num_transfers = 1;
1030 devc->submitted_transfers++;
1031 devc->transfers[0] = transfer;
1036 SR_PRIV int dslogic_acquisition_start(const struct sr_dev_inst *sdi)
1038 struct sr_dev_driver *di;
1039 struct drv_context *drvc;
1040 struct dev_context *devc;
1043 if (sdi->status != SR_ST_ACTIVE)
1044 return SR_ERR_DEV_CLOSED;
1050 devc->ctx = drvc->sr_ctx;
1051 devc->sent_samples = 0;
1052 devc->empty_transfer_count = 0;
1053 devc->acq_aborted = FALSE;
1055 timeout = get_timeout(devc);
1056 usb_source_add(sdi->session, devc->ctx, timeout, receive_data, drvc);
1058 trigger_request(sdi);
1063 SR_PRIV int dslogic_acquisition_stop(struct sr_dev_inst *sdi)
1065 command_stop_acquisition(sdi);
1066 abort_acquisition(sdi->priv);