2 * This file is part of the libsigrok project.
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5 * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
21 #ifndef LIBSIGROK_HARDWARE_DSLOGIC_DSLOGIC_H
22 #define LIBSIGROK_HARDWARE_DSLOGIC_DSLOGIC_H
24 /* Modified protocol commands & flags used by DSLogic */
25 #define DS_CMD_GET_FW_VERSION 0xb0
26 #define DS_CMD_GET_REVID_VERSION 0xb1
27 #define DS_CMD_START 0xb2
28 #define DS_CMD_CONFIG 0xb3
29 #define DS_CMD_SETTING 0xb4
30 #define DS_CMD_CONTROL 0xb5
31 #define DS_CMD_STATUS 0xb6
32 #define DS_CMD_STATUS_INFO 0xb7
33 #define DS_CMD_WR_REG 0xb8
34 #define DS_CMD_WR_NVM 0xb9
35 #define DS_CMD_RD_NVM 0xba
36 #define DS_CMD_RD_NVM_PRE 0xbb
37 #define DS_CMD_GET_HW_INFO 0xbc
39 #define DS_START_FLAGS_STOP (1 << 7)
40 #define DS_START_FLAGS_CLK_48MHZ (1 << 6)
41 #define DS_START_FLAGS_SAMPLE_WIDE (1 << 5)
42 #define DS_START_FLAGS_MODE_LA (1 << 4)
44 #define DS_ADDR_COMB 0x68
45 #define DS_ADDR_EEWP 0x70
46 #define DS_ADDR_VTH 0x78
48 #define DS_MAX_LOGIC_DEPTH SR_MHZ(16)
49 #define DS_MAX_LOGIC_SAMPLERATE SR_MHZ(100)
51 #define DS_MODE_TRIG_EN (1 << 0)
52 #define DS_MODE_CLK_TYPE (1 << 1)
53 #define DS_MODE_CLK_EDGE (1 << 2)
54 #define DS_MODE_RLE_MODE (1 << 3)
55 #define DS_MODE_DSO_MODE (1 << 4)
56 #define DS_MODE_HALF_MODE (1 << 5)
57 #define DS_MODE_QUAR_MODE (1 << 6)
58 #define DS_MODE_ANALOG_MODE (1 << 7)
59 #define DS_MODE_FILTER (1 << 8)
60 #define DS_MODE_INSTANT (1 << 9)
61 #define DS_MODE_STRIG_MODE (1 << 11)
62 #define DS_MODE_STREAM_MODE (1 << 12)
63 #define DS_MODE_LPB_TEST (1 << 13)
64 #define DS_MODE_EXT_TEST (1 << 14)
65 #define DS_MODE_INT_TEST (1 << 15)
67 enum dslogic_operation_modes {
75 DS_VOLTAGE_RANGE_18_33_V, /* 1.8V and 3.3V logic */
76 DS_VOLTAGE_RANGE_5_V, /* 5V logic */
84 struct dslogic_version {
91 uint8_t sample_delay_h;
92 uint8_t sample_delay_l;
95 struct dslogic_trigger_pos {
99 uint8_t first_block[500];
103 * The FPGA is configured with TLV tuples. Length is specified as the
104 * number of 16-bit words.
106 #define _DS_CFG(variable, wordcnt) ((variable << 8) | wordcnt)
107 #define DS_CFG_START 0xf5a5f5a5
108 #define DS_CFG_MODE _DS_CFG(0, 1)
109 #define DS_CFG_DIVIDER _DS_CFG(1, 2)
110 #define DS_CFG_COUNT _DS_CFG(3, 2)
111 #define DS_CFG_TRIG_POS _DS_CFG(5, 2)
112 #define DS_CFG_TRIG_GLB _DS_CFG(7, 1)
113 #define DS_CFG_CH_EN _DS_CFG(8, 1)
114 #define DS_CFG_TRIG _DS_CFG(64, 160)
115 #define DS_CFG_END 0xfa5afa5a
117 #pragma pack(push, 1)
119 struct dslogic_fpga_config {
122 uint16_t mode_header;
124 uint16_t divider_header;
126 uint16_t count_header;
128 uint16_t trig_pos_header;
130 uint16_t trig_glb_header;
132 uint16_t ch_en_header;
135 uint16_t trig_header;
136 uint16_t trig_mask0[NUM_TRIGGER_STAGES];
137 uint16_t trig_mask1[NUM_TRIGGER_STAGES];
138 uint16_t trig_value0[NUM_TRIGGER_STAGES];
139 uint16_t trig_value1[NUM_TRIGGER_STAGES];
140 uint16_t trig_edge0[NUM_TRIGGER_STAGES];
141 uint16_t trig_edge1[NUM_TRIGGER_STAGES];
142 uint16_t trig_logic0[NUM_TRIGGER_STAGES];
143 uint16_t trig_logic1[NUM_TRIGGER_STAGES];
144 uint32_t trig_count[NUM_TRIGGER_STAGES];
151 SR_PRIV int dslogic_fpga_firmware_upload(const struct sr_dev_inst *sdi);
152 SR_PRIV int dslogic_start_acquisition(const struct sr_dev_inst *sdi);
153 SR_PRIV int dslogic_stop_acquisition(const struct sr_dev_inst *sdi);
154 SR_PRIV int dslogic_fpga_configure(const struct sr_dev_inst *sdi);
155 SR_PRIV int dslogic_set_vth(const struct sr_dev_inst *sdi, double vth);
156 SR_PRIV int dslogic_get_number_of_transfers(struct dev_context *devc);