src/hardware/dreamsourcelab-dslogic/protocol.c

   1 /*
   2  * This file is part of the libsigrok project.
   3  *
   4  * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
   5  * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
   6  *
   7  * This program is free software: you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation, either version 3 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include <config.h>
  22 #include <math.h>
  23 #include <glib.h>
  24 #include <glib/gstdio.h>
  25 #include "protocol.h"
  26
  27 #define DS_CMD_GET_FW_VERSION           0xb0
  28 #define DS_CMD_GET_REVID_VERSION        0xb1
  29 #define DS_CMD_START                    0xb2
  30 #define DS_CMD_CONFIG                   0xb3
  31 #define DS_CMD_SETTING                  0xb4
  32 #define DS_CMD_CONTROL                  0xb5
  33 #define DS_CMD_STATUS                   0xb6
  34 #define DS_CMD_STATUS_INFO              0xb7
  35 #define DS_CMD_WR_REG                   0xb8
  36 #define DS_CMD_WR_NVM                   0xb9
  37 #define DS_CMD_RD_NVM                   0xba
  38 #define DS_CMD_RD_NVM_PRE               0xbb
  39 #define DS_CMD_GET_HW_INFO              0xbc
  40
  41 #define DS_START_FLAGS_STOP             (1 << 7)
  42 #define DS_START_FLAGS_CLK_48MHZ        (1 << 6)
  43 #define DS_START_FLAGS_SAMPLE_WIDE      (1 << 5)
  44 #define DS_START_FLAGS_MODE_LA          (1 << 4)
  45
  46 #define DS_ADDR_COMB                    0x68
  47 #define DS_ADDR_EEWP                    0x70
  48 #define DS_ADDR_VTH                     0x78
  49
  50 #define DS_MAX_LOGIC_DEPTH              SR_MHZ(16)
  51 #define DS_MAX_LOGIC_SAMPLERATE         SR_MHZ(100)
  52 #define DS_MAX_TRIG_PERCENT             90
  53
  54 #define DS_MODE_TRIG_EN                 (1 << 0)
  55 #define DS_MODE_CLK_TYPE                (1 << 1)
  56 #define DS_MODE_CLK_EDGE                (1 << 2)
  57 #define DS_MODE_RLE_MODE                (1 << 3)
  58 #define DS_MODE_DSO_MODE                (1 << 4)
  59 #define DS_MODE_HALF_MODE               (1 << 5)
  60 #define DS_MODE_QUAR_MODE               (1 << 6)
  61 #define DS_MODE_ANALOG_MODE             (1 << 7)
  62 #define DS_MODE_FILTER                  (1 << 8)
  63 #define DS_MODE_INSTANT                 (1 << 9)
  64 #define DS_MODE_STRIG_MODE              (1 << 11)
  65 #define DS_MODE_STREAM_MODE             (1 << 12)
  66 #define DS_MODE_LPB_TEST                (1 << 13)
  67 #define DS_MODE_EXT_TEST                (1 << 14)
  68 #define DS_MODE_INT_TEST                (1 << 15)
  69
  70 #define DSLOGIC_ATOMIC_SAMPLES          (sizeof(uint64_t) * 8)
  71 #define DSLOGIC_ATOMIC_BYTES            sizeof(uint64_t)
  72
  73 /*
  74  * The FPGA is configured with TLV tuples. Length is specified as the
  75  * number of 16-bit words.
  76  */
  77 #define _DS_CFG(variable, wordcnt) ((variable << 8) | wordcnt)
  78 #define DS_CFG_START                    0xf5a5f5a5
  79 #define DS_CFG_MODE                     _DS_CFG(0, 1)
  80 #define DS_CFG_DIVIDER                  _DS_CFG(1, 2)
  81 #define DS_CFG_COUNT                    _DS_CFG(3, 2)
  82 #define DS_CFG_TRIG_POS                 _DS_CFG(5, 2)
  83 #define DS_CFG_TRIG_GLB                 _DS_CFG(7, 1)
  84 #define DS_CFG_CH_EN                    _DS_CFG(8, 1)
  85 #define DS_CFG_TRIG                     _DS_CFG(64, 160)
  86 #define DS_CFG_END                      0xfa5afa5a
  87
  88 #pragma pack(push, 1)
  89
  90 struct version_info {
  91         uint8_t major;
  92         uint8_t minor;
  93 };
  94
  95 struct cmd_start_acquisition {
  96         uint8_t flags;
  97         uint8_t sample_delay_h;
  98         uint8_t sample_delay_l;
  99 };
 100
 101 struct fpga_config {
 102         uint32_t sync;
 103
 104         uint16_t mode_header;
 105         uint16_t mode;
 106         uint16_t divider_header;
 107         uint32_t divider;
 108         uint16_t count_header;
 109         uint32_t count;
 110         uint16_t trig_pos_header;
 111         uint32_t trig_pos;
 112         uint16_t trig_glb_header;
 113         uint16_t trig_glb;
 114         uint16_t ch_en_header;
 115         uint16_t ch_en;
 116
 117         uint16_t trig_header;
 118         uint16_t trig_mask0[NUM_TRIGGER_STAGES];
 119         uint16_t trig_mask1[NUM_TRIGGER_STAGES];
 120         uint16_t trig_value0[NUM_TRIGGER_STAGES];
 121         uint16_t trig_value1[NUM_TRIGGER_STAGES];
 122         uint16_t trig_edge0[NUM_TRIGGER_STAGES];
 123         uint16_t trig_edge1[NUM_TRIGGER_STAGES];
 124         uint16_t trig_logic0[NUM_TRIGGER_STAGES];
 125         uint16_t trig_logic1[NUM_TRIGGER_STAGES];
 126         uint32_t trig_count[NUM_TRIGGER_STAGES];
 127
 128         uint32_t end_sync;
 129 };
 130
 131 #pragma pack(pop)
 132
 133 /*
 134  * This should be larger than the FPGA bitstream image so that it'll get
 135  * uploaded in one big operation. There seem to be issues when uploading
 136  * it in chunks.
 137  */
 138 #define FW_BUFSIZE (1024 * 1024)
 139
 140 #define FPGA_UPLOAD_DELAY (10 * 1000)
 141
 142 #define USB_TIMEOUT (3 * 1000)
 143
 144 static int command_get_fw_version(libusb_device_handle *devhdl,
 145                                   struct version_info *vi)
 146 {
 147         int ret;
 148
 149         ret = libusb_control_transfer(devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
 150                 LIBUSB_ENDPOINT_IN, DS_CMD_GET_FW_VERSION, 0x0000, 0x0000,
 151                 (unsigned char *)vi, sizeof(struct version_info), USB_TIMEOUT);
 152
 153         if (ret < 0) {
 154                 sr_err("Unable to get version info: %s.",
 155                        libusb_error_name(ret));
 156                 return SR_ERR;
 157         }
 158
 159         return SR_OK;
 160 }
 161
 162 static int command_get_revid_version(struct sr_dev_inst *sdi, uint8_t *revid)
 163 {
 164         struct sr_usb_dev_inst *usb = sdi->conn;
 165         libusb_device_handle *devhdl = usb->devhdl;
 166         int ret;
 167
 168         ret = libusb_control_transfer(devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
 169                 LIBUSB_ENDPOINT_IN, DS_CMD_GET_REVID_VERSION, 0x0000, 0x0000,
 170                 revid, 1, USB_TIMEOUT);
 171
 172         if (ret < 0) {
 173                 sr_err("Unable to get REVID: %s.", libusb_error_name(ret));
 174                 return SR_ERR;
 175         }
 176
 177         return SR_OK;
 178 }
 179
 180 static int command_start_acquisition(const struct sr_dev_inst *sdi)
 181 {
 182         struct sr_usb_dev_inst *usb;
 183         struct dslogic_mode mode;
 184         int ret;
 185
 186         mode.flags = DS_START_FLAGS_MODE_LA | DS_START_FLAGS_SAMPLE_WIDE;
 187         mode.sample_delay_h = mode.sample_delay_l = 0;
 188
 189         usb = sdi->conn;
 190         ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
 191                         LIBUSB_ENDPOINT_OUT, DS_CMD_START, 0x0000, 0x0000,
 192                         (unsigned char *)&mode, sizeof(mode), USB_TIMEOUT);
 193         if (ret < 0) {
 194                 sr_err("Failed to send start command: %s.", libusb_error_name(ret));
 195                 return SR_ERR;
 196         }
 197
 198         return SR_OK;
 199 }
 200
 201 static int command_stop_acquisition(const struct sr_dev_inst *sdi)
 202 {
 203         struct sr_usb_dev_inst *usb;
 204         struct dslogic_mode mode;
 205         int ret;
 206
 207         mode.flags = DS_START_FLAGS_STOP;
 208         mode.sample_delay_h = mode.sample_delay_l = 0;
 209
 210         usb = sdi->conn;
 211         ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
 212                         LIBUSB_ENDPOINT_OUT, DS_CMD_START, 0x0000, 0x0000,
 213                         (unsigned char *)&mode, sizeof(struct dslogic_mode), USB_TIMEOUT);
 214         if (ret < 0) {
 215                 sr_err("Failed to send stop command: %s.", libusb_error_name(ret));
 216                 return SR_ERR;
 217         }
 218
 219         return SR_OK;
 220 }
 221
 222 SR_PRIV int dslogic_fpga_firmware_upload(const struct sr_dev_inst *sdi)
 223 {
 224         const char *name = NULL;
 225         uint64_t sum;
 226         struct sr_resource bitstream;
 227         struct drv_context *drvc;
 228         struct dev_context *devc;
 229         struct sr_usb_dev_inst *usb;
 230         unsigned char *buf;
 231         ssize_t chunksize;
 232         int transferred;
 233         int result, ret;
 234         const uint8_t cmd[3] = {0, 0, 0};
 235
 236         drvc = sdi->driver->context;
 237         devc = sdi->priv;
 238         usb = sdi->conn;
 239
 240         if (!strcmp(devc->profile->model, "DSLogic")) {
 241                 if (devc->cur_threshold < 1.40)
 242                         name = DSLOGIC_FPGA_FIRMWARE_3V3;
 243                 else
 244                         name = DSLOGIC_FPGA_FIRMWARE_5V;
 245         } else if (!strcmp(devc->profile->model, "DSLogic Pro")){
 246                 name = DSLOGIC_PRO_FPGA_FIRMWARE;
 247         } else if (!strcmp(devc->profile->model, "DSLogic Plus")){
 248                 name = DSLOGIC_PLUS_FPGA_FIRMWARE;
 249         } else if (!strcmp(devc->profile->model, "DSLogic Basic")){
 250                 name = DSLOGIC_BASIC_FPGA_FIRMWARE;
 251         } else if (!strcmp(devc->profile->model, "DSCope")) {
 252                 name = DSCOPE_FPGA_FIRMWARE;
 253         } else {
 254                 sr_err("Failed to select FPGA firmware.");
 255                 return SR_ERR;
 256         }
 257
 258         sr_dbg("Uploading FPGA firmware '%s'.", name);
 259
 260         result = sr_resource_open(drvc->sr_ctx, &bitstream,
 261                         SR_RESOURCE_FIRMWARE, name);
 262         if (result != SR_OK)
 263                 return result;
 264
 265         /* Tell the device firmware is coming. */
 266         if ((ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
 267                         LIBUSB_ENDPOINT_OUT, DS_CMD_CONFIG, 0x0000, 0x0000,
 268                         (unsigned char *)&cmd, sizeof(cmd), USB_TIMEOUT)) < 0) {
 269                 sr_err("Failed to upload FPGA firmware: %s.", libusb_error_name(ret));
 270                 sr_resource_close(drvc->sr_ctx, &bitstream);
 271                 return SR_ERR;
 272         }
 273
 274         /* Give the FX2 time to get ready for FPGA firmware upload. */
 275         g_usleep(FPGA_UPLOAD_DELAY);
 276
 277         buf = g_malloc(FW_BUFSIZE);
 278         sum = 0;
 279         result = SR_OK;
 280         while (1) {
 281                 chunksize = sr_resource_read(drvc->sr_ctx, &bitstream,
 282                                 buf, FW_BUFSIZE);
 283                 if (chunksize < 0)
 284                         result = SR_ERR;
 285                 if (chunksize <= 0)
 286                         break;
 287
 288                 if ((ret = libusb_bulk_transfer(usb->devhdl, 2 | LIBUSB_ENDPOINT_OUT,
 289                                 buf, chunksize, &transferred, USB_TIMEOUT)) < 0) {
 290                         sr_err("Unable to configure FPGA firmware: %s.",
 291                                         libusb_error_name(ret));
 292                         result = SR_ERR;
 293                         break;
 294                 }
 295                 sum += transferred;
 296                 sr_spew("Uploaded %" PRIu64 "/%" PRIu64 " bytes.",
 297                         sum, bitstream.size);
 298
 299                 if (transferred != chunksize) {
 300                         sr_err("Short transfer while uploading FPGA firmware.");
 301                         result = SR_ERR;
 302                         break;
 303                 }
 304         }
 305         g_free(buf);
 306         sr_resource_close(drvc->sr_ctx, &bitstream);
 307
 308         if (result == SR_OK)
 309                 sr_dbg("FPGA firmware upload done.");
 310
 311         return result;
 312 }
 313
 314 static unsigned int enabled_channel_count(const struct sr_dev_inst *sdi)
 315 {
 316         unsigned int count = 0;
 317         for (const GSList *l = sdi->channels; l; l = l->next) {
 318                 const struct sr_channel *const probe = (struct sr_channel *)l->data;
 319                 if (probe->enabled)
 320                         count++;
 321         }
 322         return count;
 323 }
 324
 325 static uint16_t enabled_channel_mask(const struct sr_dev_inst *sdi)
 326 {
 327         unsigned int mask = 0;
 328         for (const GSList *l = sdi->channels; l; l = l->next) {
 329                 const struct sr_channel *const probe = (struct sr_channel *)l->data;
 330                 if (probe->enabled)
 331                         mask |= 1 << probe->index;
 332         }
 333         return mask;
 334 }
 335
 336 /*
 337  * Get the session trigger and configure the FPGA structure
 338  * accordingly.
 339  */
 340 static void set_trigger(const struct sr_dev_inst *sdi, struct fpga_config *cfg)
 341 {
 342         struct sr_trigger *trigger;
 343         struct sr_trigger_stage *stage;
 344         struct sr_trigger_match *match;
 345         struct dev_context *devc;
 346         const GSList *l, *m;
 347         const unsigned int num_enabled_channels = enabled_channel_count(sdi);
 348         int num_trigger_stages = 0;
 349
 350         int channelbit, i = 0;
 351         uint32_t trigger_point;
 352
 353         devc = sdi->priv;
 354
 355         cfg->ch_en = enabled_channel_mask(sdi);
 356
 357         for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
 358                 cfg->trig_mask0[i] = 0xffff;
 359                 cfg->trig_mask1[i] = 0xffff;
 360                 cfg->trig_value0[i] = 0;
 361                 cfg->trig_value1[i] = 0;
 362                 cfg->trig_edge0[i] = 0;
 363                 cfg->trig_edge1[i] = 0;
 364                 cfg->trig_logic0[i] = 2;
 365                 cfg->trig_logic1[i] = 2;
 366                 cfg->trig_count[i] = 0;
 367         }
 368
 369         trigger_point = (devc->capture_ratio * devc->limit_samples) / 100;
 370         if (trigger_point < DSLOGIC_ATOMIC_SAMPLES)
 371                 trigger_point = DSLOGIC_ATOMIC_SAMPLES;
 372         const uint32_t mem_depth = devc->profile->mem_depth;
 373         const uint32_t max_trigger_point = devc->continuous_mode ? ((mem_depth * 10) / 100) :
 374                 ((mem_depth * DS_MAX_TRIG_PERCENT) / 100);
 375         if (trigger_point > max_trigger_point)
 376                 trigger_point = max_trigger_point;
 377         cfg->trig_pos = trigger_point & ~(DSLOGIC_ATOMIC_SAMPLES - 1);
 378
 379         if (!(trigger = sr_session_trigger_get(sdi->session))) {
 380                 sr_dbg("No session trigger found");
 381                 return;
 382         }
 383
 384         for (l = trigger->stages; l; l = l->next) {
 385                 stage = l->data;
 386                 num_trigger_stages++;
 387                 for (m = stage->matches; m; m = m->next) {
 388                         match = m->data;
 389                         if (!match->channel->enabled)
 390                                 /* Ignore disabled channels with a trigger. */
 391                                 continue;
 392                         channelbit = 1 << (match->channel->index);
 393                         /* Simple trigger support (event). */
 394                         if (match->match == SR_TRIGGER_ONE) {
 395                                 cfg->trig_mask0[0] &= ~channelbit;
 396                                 cfg->trig_mask1[0] &= ~channelbit;
 397                                 cfg->trig_value0[0] |= channelbit;
 398                                 cfg->trig_value1[0] |= channelbit;
 399                         } else if (match->match == SR_TRIGGER_ZERO) {
 400                                 cfg->trig_mask0[0] &= ~channelbit;
 401                                 cfg->trig_mask1[0] &= ~channelbit;
 402                         } else if (match->match == SR_TRIGGER_FALLING) {
 403                                 cfg->trig_mask0[0] &= ~channelbit;
 404                                 cfg->trig_mask1[0] &= ~channelbit;
 405                                 cfg->trig_edge0[0] |= channelbit;
 406                                 cfg->trig_edge1[0] |= channelbit;
 407                         } else if (match->match == SR_TRIGGER_RISING) {
 408                                 cfg->trig_mask0[0] &= ~channelbit;
 409                                 cfg->trig_mask1[0] &= ~channelbit;
 410                                 cfg->trig_value0[0] |= channelbit;
 411                                 cfg->trig_value1[0] |= channelbit;
 412                                 cfg->trig_edge0[0] |= channelbit;
 413                                 cfg->trig_edge1[0] |= channelbit;
 414                         } else if (match->match == SR_TRIGGER_EDGE) {
 415                                 cfg->trig_edge0[0] |= channelbit;
 416                                 cfg->trig_edge1[0] |= channelbit;
 417                         }
 418                 }
 419         }
 420
 421         cfg->trig_glb = (num_enabled_channels << 4) | (num_trigger_stages - 1);
 422 }
 423
 424 static int fpga_configure(const struct sr_dev_inst *sdi)
 425 {
 426         struct dev_context *devc;
 427         struct sr_usb_dev_inst *usb;
 428         uint8_t c[3];
 429         struct fpga_config cfg;
 430         uint16_t mode = 0;
 431         uint32_t divider;
 432         int transferred, len, ret;
 433
 434         sr_dbg("Configuring FPGA.");
 435
 436         usb = sdi->conn;
 437         devc = sdi->priv;
 438
 439         WL32(&cfg.sync, DS_CFG_START);
 440         WL16(&cfg.mode_header, DS_CFG_MODE);
 441         WL16(&cfg.divider_header, DS_CFG_DIVIDER);
 442         WL16(&cfg.count_header, DS_CFG_COUNT);
 443         WL16(&cfg.trig_pos_header, DS_CFG_TRIG_POS);
 444         WL16(&cfg.trig_glb_header, DS_CFG_TRIG_GLB);
 445         WL16(&cfg.ch_en_header, DS_CFG_CH_EN);
 446         WL16(&cfg.trig_header, DS_CFG_TRIG);
 447         WL32(&cfg.end_sync, DS_CFG_END);
 448
 449         /* Pass in the length of a fixed-size struct. Really. */
 450         len = sizeof(struct fpga_config) / 2;
 451         c[0] = len & 0xff;
 452         c[1] = (len >> 8) & 0xff;
 453         c[2] = (len >> 16) & 0xff;
 454
 455         ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
 456                         LIBUSB_ENDPOINT_OUT, DS_CMD_SETTING, 0x0000, 0x0000,
 457                         c, sizeof(c), USB_TIMEOUT);
 458         if (ret < 0) {
 459                 sr_err("Failed to send FPGA configure command: %s.",
 460                         libusb_error_name(ret));
 461                 return SR_ERR;
 462         }
 463
 464         if (devc->mode == DS_OP_INTERNAL_TEST)
 465                 mode = DS_MODE_INT_TEST;
 466         else if (devc->mode == DS_OP_EXTERNAL_TEST)
 467                 mode = DS_MODE_EXT_TEST;
 468         else if (devc->mode == DS_OP_LOOPBACK_TEST)
 469                 mode = DS_MODE_LPB_TEST;
 470
 471         if (devc->cur_samplerate == DS_MAX_LOGIC_SAMPLERATE * 2)
 472                 mode |= DS_MODE_HALF_MODE;
 473         else if (devc->cur_samplerate == DS_MAX_LOGIC_SAMPLERATE * 4)
 474                 mode |= DS_MODE_QUAR_MODE;
 475
 476         if (devc->continuous_mode)
 477                 mode |= DS_MODE_STREAM_MODE;
 478         if (devc->external_clock) {
 479                 mode |= DS_MODE_CLK_TYPE;
 480                 if (devc->clock_edge == DS_EDGE_FALLING)
 481                         mode |= DS_MODE_CLK_EDGE;
 482         }
 483         if (devc->limit_samples > DS_MAX_LOGIC_DEPTH *
 484                 ceil(devc->cur_samplerate * 1.0 / DS_MAX_LOGIC_SAMPLERATE)
 485                 && !devc->continuous_mode) {
 486                 /* Enable RLE for long captures.
 487                  * Without this, captured data present errors.
 488                  */
 489                 mode |= DS_MODE_RLE_MODE;
 490         }
 491
 492         WL16(&cfg.mode, mode);
 493         divider = ceil(DS_MAX_LOGIC_SAMPLERATE * 1.0 / devc->cur_samplerate);
 494         WL32(&cfg.divider, divider);
 495
 496         /* Number of 16-sample units. */
 497         WL32(&cfg.count, devc->limit_samples / 16);
 498
 499         set_trigger(sdi, &cfg);
 500
 501         len = sizeof(struct fpga_config);
 502         ret = libusb_bulk_transfer(usb->devhdl, 2 | LIBUSB_ENDPOINT_OUT,
 503                         (unsigned char *)&cfg, len, &transferred, USB_TIMEOUT);
 504         if (ret < 0 || transferred != len) {
 505                 sr_err("Failed to send FPGA configuration: %s.", libusb_error_name(ret));
 506                 return SR_ERR;
 507         }
 508
 509         return SR_OK;
 510 }
 511
 512 SR_PRIV int dslogic_set_voltage_threshold(const struct sr_dev_inst *sdi, double threshold)
 513 {
 514         int ret;
 515         struct dev_context *const devc = sdi->priv;
 516         const struct sr_usb_dev_inst *const usb = sdi->conn;
 517         const uint8_t value = (threshold / 5.0) * 255;
 518         const uint16_t cmd = value | (DS_ADDR_VTH << 8);
 519
 520         /* Send the control command. */
 521         ret = libusb_control_transfer(usb->devhdl,
 522                         LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_ENDPOINT_OUT,
 523                         DS_CMD_WR_REG, 0x0000, 0x0000,
 524                         (unsigned char *)&cmd, sizeof(cmd), 3000);
 525         if (ret < 0) {
 526                 sr_err("Unable to set voltage-threshold register: %s.",
 527                 libusb_error_name(ret));
 528                 return SR_ERR;
 529         }
 530
 531         devc->cur_threshold = threshold;
 532
 533         return SR_OK;
 534 }
 535
 536 SR_PRIV int dslogic_dev_open(struct sr_dev_inst *sdi, struct sr_dev_driver *di)
 537 {
 538         libusb_device **devlist;
 539         struct sr_usb_dev_inst *usb;
 540         struct libusb_device_descriptor des;
 541         struct dev_context *devc;
 542         struct drv_context *drvc;
 543         struct version_info vi;
 544         int ret = SR_ERR, i, device_count;
 545         uint8_t revid;
 546         char connection_id[64];
 547
 548         drvc = di->context;
 549         devc = sdi->priv;
 550         usb = sdi->conn;
 551
 552         device_count = libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
 553         if (device_count < 0) {
 554                 sr_err("Failed to get device list: %s.",
 555                        libusb_error_name(device_count));
 556                 return SR_ERR;
 557         }
 558
 559         for (i = 0; i < device_count; i++) {
 560                 libusb_get_device_descriptor(devlist[i], &des);
 561
 562                 if (des.idVendor != devc->profile->vid
 563                     || des.idProduct != devc->profile->pid)
 564                         continue;
 565
 566                 if ((sdi->status == SR_ST_INITIALIZING) ||
 567                                 (sdi->status == SR_ST_INACTIVE)) {
 568                         /* Check device by its physical USB bus/port address. */
 569                         usb_get_port_path(devlist[i], connection_id, sizeof(connection_id));
 570                         if (strcmp(sdi->connection_id, connection_id))
 571                                 /* This is not the one. */
 572                                 continue;
 573                 }
 574
 575                 if (!(ret = libusb_open(devlist[i], &usb->devhdl))) {
 576                         if (usb->address == 0xff)
 577                                 /*
 578                                  * First time we touch this device after FW
 579                                  * upload, so we don't know the address yet.
 580                                  */
 581                                 usb->address = libusb_get_device_address(devlist[i]);
 582                 } else {
 583                         sr_err("Failed to open device: %s.",
 584                                libusb_error_name(ret));
 585                         ret = SR_ERR;
 586                         break;
 587                 }
 588
 589                 if (libusb_has_capability(LIBUSB_CAP_SUPPORTS_DETACH_KERNEL_DRIVER)) {
 590                         if (libusb_kernel_driver_active(usb->devhdl, USB_INTERFACE) == 1) {
 591                                 if ((ret = libusb_detach_kernel_driver(usb->devhdl, USB_INTERFACE)) < 0) {
 592                                         sr_err("Failed to detach kernel driver: %s.",
 593                                                 libusb_error_name(ret));
 594                                         ret = SR_ERR;
 595                                         break;
 596                                 }
 597                         }
 598                 }
 599
 600                 ret = command_get_fw_version(usb->devhdl, &vi);
 601                 if (ret != SR_OK) {
 602                         sr_err("Failed to get firmware version.");
 603                         break;
 604                 }
 605
 606                 ret = command_get_revid_version(sdi, &revid);
 607                 if (ret != SR_OK) {
 608                         sr_err("Failed to get REVID.");
 609                         break;
 610                 }
 611
 612                 /*
 613                  * Changes in major version mean incompatible/API changes, so
 614                  * bail out if we encounter an incompatible version.
 615                  * Different minor versions are OK, they should be compatible.
 616                  */
 617                 if (vi.major != DSLOGIC_REQUIRED_VERSION_MAJOR) {
 618                         sr_err("Expected firmware version %d.x, "
 619                                "got %d.%d.", DSLOGIC_REQUIRED_VERSION_MAJOR,
 620                                vi.major, vi.minor);
 621                         ret = SR_ERR;
 622                         break;
 623                 }
 624
 625                 sr_info("Opened device on %d.%d (logical) / %s (physical), "
 626                         "interface %d, firmware %d.%d.",
 627                         usb->bus, usb->address, connection_id,
 628                         USB_INTERFACE, vi.major, vi.minor);
 629
 630                 sr_info("Detected REVID=%d, it's a Cypress CY7C68013%s.",
 631                         revid, (revid != 1) ? " (FX2)" : "A (FX2LP)");
 632
 633                 ret = SR_OK;
 634
 635                 break;
 636         }
 637
 638         libusb_free_device_list(devlist, 1);
 639
 640         return ret;
 641 }
 642
 643 SR_PRIV struct dev_context *dslogic_dev_new(void)
 644 {
 645         struct dev_context *devc;
 646
 647         devc = g_malloc0(sizeof(struct dev_context));
 648         devc->profile = NULL;
 649         devc->fw_updated = 0;
 650         devc->cur_samplerate = 0;
 651         devc->limit_samples = 0;
 652         devc->capture_ratio = 0;
 653         devc->continuous_mode = FALSE;
 654         devc->clock_edge = DS_EDGE_RISING;
 655
 656         return devc;
 657 }
 658
 659 static void abort_acquisition(struct dev_context *devc)
 660 {
 661         int i;
 662
 663         devc->acq_aborted = TRUE;
 664
 665         for (i = devc->num_transfers - 1; i >= 0; i--) {
 666                 if (devc->transfers[i])
 667                         libusb_cancel_transfer(devc->transfers[i]);
 668         }
 669 }
 670
 671 static void finish_acquisition(struct sr_dev_inst *sdi)
 672 {
 673         struct dev_context *devc;
 674
 675         devc = sdi->priv;
 676
 677         std_session_send_df_end(sdi);
 678
 679         usb_source_remove(sdi->session, devc->ctx);
 680
 681         devc->num_transfers = 0;
 682         g_free(devc->transfers);
 683         g_free(devc->deinterleave_buffer);
 684 }
 685
 686 static void free_transfer(struct libusb_transfer *transfer)
 687 {
 688         struct sr_dev_inst *sdi;
 689         struct dev_context *devc;
 690         unsigned int i;
 691
 692         sdi = transfer->user_data;
 693         devc = sdi->priv;
 694
 695         g_free(transfer->buffer);
 696         transfer->buffer = NULL;
 697         libusb_free_transfer(transfer);
 698
 699         for (i = 0; i < devc->num_transfers; i++) {
 700                 if (devc->transfers[i] == transfer) {
 701                         devc->transfers[i] = NULL;
 702                         break;
 703                 }
 704         }
 705
 706         devc->submitted_transfers--;
 707         if (devc->submitted_transfers == 0)
 708                 finish_acquisition(sdi);
 709 }
 710
 711 static void resubmit_transfer(struct libusb_transfer *transfer)
 712 {
 713         int ret;
 714
 715         if ((ret = libusb_submit_transfer(transfer)) == LIBUSB_SUCCESS)
 716                 return;
 717
 718         sr_err("%s: %s", __func__, libusb_error_name(ret));
 719         free_transfer(transfer);
 720
 721 }
 722
 723 static void deinterleave_buffer(const uint8_t *src, size_t length,
 724         uint16_t *dst_ptr, size_t channel_count, uint16_t channel_mask)
 725 {
 726         uint16_t sample;
 727
 728         for (const uint64_t *src_ptr = (uint64_t*)src;
 729                 src_ptr < (uint64_t*)(src + length);
 730                 src_ptr += channel_count) {
 731                 for (int bit = 0; bit != 64; bit++) {
 732                         const uint64_t *word_ptr = src_ptr;
 733                         sample = 0;
 734                         for (size_t channel = 0; channel != channel_count;
 735                                 channel++) {
 736                                 if ((channel_mask & (1 << channel)) &&
 737                                         (*word_ptr++ & (1ULL << bit)))
 738                                         sample |= 1 << channel;
 739                         }
 740                         *dst_ptr++ = sample;
 741                 }
 742         }
 743 }
 744
 745 static void send_data(struct sr_dev_inst *sdi,
 746         uint16_t *data, size_t sample_count)
 747 {
 748         const struct sr_datafeed_logic logic = {
 749                 .length = sample_count * sizeof(uint16_t),
 750                 .unitsize = sizeof(uint16_t),
 751                 .data = data
 752         };
 753
 754         const struct sr_datafeed_packet packet = {
 755                 .type = SR_DF_LOGIC,
 756                 .payload = &logic
 757         };
 758
 759         sr_session_send(sdi, &packet);
 760 }
 761
 762 static void LIBUSB_CALL receive_transfer(struct libusb_transfer *transfer)
 763 {
 764         struct sr_dev_inst *const sdi = transfer->user_data;
 765         struct dev_context *const devc = sdi->priv;
 766         const size_t channel_count = enabled_channel_count(sdi);
 767         const uint16_t channel_mask = enabled_channel_mask(sdi);
 768         const unsigned int cur_sample_count = DSLOGIC_ATOMIC_SAMPLES *
 769                 transfer->actual_length /
 770                 (DSLOGIC_ATOMIC_BYTES * channel_count);
 771
 772         gboolean packet_has_error = FALSE;
 773         struct sr_datafeed_packet packet;
 774         unsigned int num_samples;
 775         int trigger_offset;
 776
 777         /*
 778          * If acquisition has already ended, just free any queued up
 779          * transfer that come in.
 780          */
 781         if (devc->acq_aborted) {
 782                 free_transfer(transfer);
 783                 return;
 784         }
 785
 786         sr_dbg("receive_transfer(): status %s received %d bytes.",
 787                 libusb_error_name(transfer->status), transfer->actual_length);
 788
 789         /* Save incoming transfer before reusing the transfer struct. */
 790
 791         switch (transfer->status) {
 792         case LIBUSB_TRANSFER_NO_DEVICE:
 793                 abort_acquisition(devc);
 794                 free_transfer(transfer);
 795                 return;
 796         case LIBUSB_TRANSFER_COMPLETED:
 797         case LIBUSB_TRANSFER_TIMED_OUT: /* We may have received some data though. */
 798                 break;
 799         default:
 800                 packet_has_error = TRUE;
 801                 break;
 802         }
 803
 804         if (transfer->actual_length == 0 || packet_has_error) {
 805                 devc->empty_transfer_count++;
 806                 if (devc->empty_transfer_count > MAX_EMPTY_TRANSFERS) {
 807                         /*
 808                          * The FX2 gave up. End the acquisition, the frontend
 809                          * will work out that the samplecount is short.
 810                          */
 811                         abort_acquisition(devc);
 812                         free_transfer(transfer);
 813                 } else {
 814                         resubmit_transfer(transfer);
 815                 }
 816                 return;
 817         } else {
 818                 devc->empty_transfer_count = 0;
 819         }
 820
 821         if (!devc->limit_samples || devc->sent_samples < devc->limit_samples) {
 822                 if (devc->limit_samples && devc->sent_samples + cur_sample_count > devc->limit_samples)
 823                         num_samples = devc->limit_samples - devc->sent_samples;
 824                 else
 825                         num_samples = cur_sample_count;
 826
 827                 /**
 828                  * The DSLogic emits sample data as sequences of 64-bit sample words
 829                  * in a round-robin i.e. 64-bits from channel 0, 64-bits from channel 1
 830                  * etc. for each of the enabled channels, then looping back to the
 831                  * channel.
 832                  *
 833                  * Because sigrok's internal representation is bit-interleaved channels
 834                  * we must recast the data.
 835                  *
 836                  * Hopefully in future it will be possible to pass the data on as-is.
 837                  */
 838                 if (transfer->actual_length % (DSLOGIC_ATOMIC_BYTES * channel_count) != 0)
 839                         sr_err("Invalid transfer length!");
 840                 deinterleave_buffer(transfer->buffer, transfer->actual_length,
 841                         devc->deinterleave_buffer, channel_count, channel_mask);
 842
 843                 /* Send the incoming transfer to the session bus. */
 844                 if (devc->trigger_pos > devc->sent_samples
 845                         && devc->trigger_pos <= devc->sent_samples + num_samples) {
 846                         /* DSLogic trigger in this block. Send trigger position. */
 847                         trigger_offset = devc->trigger_pos - devc->sent_samples;
 848                         /* Pre-trigger samples. */
 849                         send_data(sdi, devc->deinterleave_buffer, trigger_offset);
 850                         devc->sent_samples += trigger_offset;
 851                         /* Trigger position. */
 852                         devc->trigger_pos = 0;
 853                         packet.type = SR_DF_TRIGGER;
 854                         packet.payload = NULL;
 855                         sr_session_send(sdi, &packet);
 856                         /* Post trigger samples. */
 857                         num_samples -= trigger_offset;
 858                         send_data(sdi, devc->deinterleave_buffer
 859                                 + trigger_offset, num_samples);
 860                         devc->sent_samples += num_samples;
 861                 } else {
 862                         send_data(sdi, devc->deinterleave_buffer, num_samples);
 863                         devc->sent_samples += num_samples;
 864                 }
 865         }
 866
 867         if (devc->limit_samples && devc->sent_samples >= devc->limit_samples) {
 868                 abort_acquisition(devc);
 869                 free_transfer(transfer);
 870         } else
 871                 resubmit_transfer(transfer);
 872 }
 873
 874 static int receive_data(int fd, int revents, void *cb_data)
 875 {
 876         struct timeval tv;
 877         struct drv_context *drvc;
 878
 879         (void)fd;
 880         (void)revents;
 881
 882         drvc = (struct drv_context *)cb_data;
 883
 884         tv.tv_sec = tv.tv_usec = 0;
 885         libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
 886
 887         return TRUE;
 888 }
 889
 890 static size_t to_bytes_per_ms(const struct sr_dev_inst *sdi)
 891 {
 892         const struct dev_context *const devc = sdi->priv;
 893         const size_t ch_count = enabled_channel_count(sdi);
 894
 895         if (devc->continuous_mode)
 896                 return (devc->cur_samplerate * ch_count) / (1000 * 8);
 897
 898
 899         /* If we're in buffered mode, the transfer rate is not so important,
 900          * but we expect to get at least 10% of the high-speed USB bandwidth.
 901          */
 902         return 35000000 / (1000 * 10);
 903 }
 904
 905 static size_t get_buffer_size(const struct sr_dev_inst *sdi)
 906 {
 907         /*
 908          * The buffer should be large enough to hold 10ms of data and
 909          * a multiple of the size of a data atom.
 910          */
 911         const size_t block_size = enabled_channel_count(sdi) * 512;
 912         const size_t s = 10 * to_bytes_per_ms(sdi);
 913         return ((s + block_size - 1) / block_size) * block_size;
 914 }
 915
 916 static unsigned int get_number_of_transfers(const struct sr_dev_inst *sdi)
 917 {
 918         /* Total buffer size should be able to hold about 100ms of data. */
 919         const unsigned int s = get_buffer_size(sdi);
 920         const unsigned int n = (100 * to_bytes_per_ms(sdi) + s - 1) / s;
 921         return (n > NUM_SIMUL_TRANSFERS) ? NUM_SIMUL_TRANSFERS : n;
 922 }
 923
 924 static unsigned int get_timeout(const struct sr_dev_inst *sdi)
 925 {
 926         const size_t total_size = get_buffer_size(sdi) *
 927                 get_number_of_transfers(sdi);
 928         const unsigned int timeout = total_size / to_bytes_per_ms(sdi);
 929         return timeout + timeout / 4; /* Leave a headroom of 25% percent. */
 930 }
 931
 932 static int start_transfers(const struct sr_dev_inst *sdi)
 933 {
 934         const size_t channel_count = enabled_channel_count(sdi);
 935         const size_t size = get_buffer_size(sdi);
 936         const unsigned int num_transfers = get_number_of_transfers(sdi);
 937         const unsigned int timeout = get_timeout(sdi);
 938
 939         struct dev_context *devc;
 940         struct sr_usb_dev_inst *usb;
 941         struct libusb_transfer *transfer;
 942         unsigned int i;
 943         int ret;
 944         unsigned char *buf;
 945
 946         devc = sdi->priv;
 947         usb = sdi->conn;
 948
 949         devc->sent_samples = 0;
 950         devc->acq_aborted = FALSE;
 951         devc->empty_transfer_count = 0;
 952         devc->submitted_transfers = 0;
 953
 954         g_free(devc->transfers);
 955         devc->transfers = g_try_malloc0(sizeof(*devc->transfers) * num_transfers);
 956         if (!devc->transfers) {
 957                 sr_err("USB transfers malloc failed.");
 958                 return SR_ERR_MALLOC;
 959         }
 960
 961         devc->deinterleave_buffer = g_try_malloc(DSLOGIC_ATOMIC_SAMPLES *
 962                 (size / (channel_count * DSLOGIC_ATOMIC_BYTES)) * sizeof(uint16_t));
 963         if (!devc->deinterleave_buffer) {
 964                 sr_err("Deinterleave buffer malloc failed.");
 965                 g_free(devc->deinterleave_buffer);
 966                 return SR_ERR_MALLOC;
 967         }
 968
 969         devc->num_transfers = num_transfers;
 970         for (i = 0; i < num_transfers; i++) {
 971                 if (!(buf = g_try_malloc(size))) {
 972                         sr_err("USB transfer buffer malloc failed.");
 973                         return SR_ERR_MALLOC;
 974                 }
 975                 transfer = libusb_alloc_transfer(0);
 976                 libusb_fill_bulk_transfer(transfer, usb->devhdl,
 977                                 6 | LIBUSB_ENDPOINT_IN, buf, size,
 978                                 receive_transfer, (void *)sdi, timeout);
 979                 sr_info("submitting transfer: %d", i);
 980                 if ((ret = libusb_submit_transfer(transfer)) != 0) {
 981                         sr_err("Failed to submit transfer: %s.",
 982                                libusb_error_name(ret));
 983                         libusb_free_transfer(transfer);
 984                         g_free(buf);
 985                         abort_acquisition(devc);
 986                         return SR_ERR;
 987                 }
 988                 devc->transfers[i] = transfer;
 989                 devc->submitted_transfers++;
 990         }
 991
 992         std_session_send_df_header(sdi);
 993
 994         return SR_OK;
 995 }
 996
 997 static void LIBUSB_CALL trigger_receive(struct libusb_transfer *transfer)
 998 {
 999         const struct sr_dev_inst *sdi;
1000         struct dslogic_trigger_pos *tpos;
1001         struct dev_context *devc;
1002
1003         sdi = transfer->user_data;
1004         devc = sdi->priv;
1005         if (transfer->status == LIBUSB_TRANSFER_CANCELLED) {
1006                 sr_dbg("Trigger transfer canceled.");
1007                 /* Terminate session. */
1008                 std_session_send_df_end(sdi);
1009                 usb_source_remove(sdi->session, devc->ctx);
1010                 devc->num_transfers = 0;
1011                 g_free(devc->transfers);
1012         } else if (transfer->status == LIBUSB_TRANSFER_COMPLETED
1013                         && transfer->actual_length == sizeof(struct dslogic_trigger_pos)) {
1014                 tpos = (struct dslogic_trigger_pos *)transfer->buffer;
1015                 sr_info("tpos real_pos %d ram_saddr %d cnt %d", tpos->real_pos,
1016                         tpos->ram_saddr, tpos->remain_cnt);
1017                 devc->trigger_pos = tpos->real_pos;
1018                 g_free(tpos);
1019                 start_transfers(sdi);
1020         }
1021         libusb_free_transfer(transfer);
1022 }
1023
1024 SR_PRIV int dslogic_acquisition_start(const struct sr_dev_inst *sdi)
1025 {
1026         const unsigned int timeout = get_timeout(sdi);
1027
1028         struct sr_dev_driver *di;
1029         struct drv_context *drvc;
1030         struct dev_context *devc;
1031         struct sr_usb_dev_inst *usb;
1032         struct dslogic_trigger_pos *tpos;
1033         struct libusb_transfer *transfer;
1034         int ret;
1035
1036         di = sdi->driver;
1037         drvc = di->context;
1038         devc = sdi->priv;
1039         usb = sdi->conn;
1040
1041         devc->ctx = drvc->sr_ctx;
1042         devc->sent_samples = 0;
1043         devc->empty_transfer_count = 0;
1044         devc->acq_aborted = FALSE;
1045
1046         usb_source_add(sdi->session, devc->ctx, timeout, receive_data, drvc);
1047
1048         if ((ret = command_stop_acquisition(sdi)) != SR_OK)
1049                 return ret;
1050
1051         if ((ret = fpga_configure(sdi)) != SR_OK)
1052                 return ret;
1053
1054         if ((ret = command_start_acquisition(sdi)) != SR_OK)
1055                 return ret;
1056
1057         sr_dbg("Getting trigger.");
1058         tpos = g_malloc(sizeof(struct dslogic_trigger_pos));
1059         transfer = libusb_alloc_transfer(0);
1060         libusb_fill_bulk_transfer(transfer, usb->devhdl, 6 | LIBUSB_ENDPOINT_IN,
1061                         (unsigned char *)tpos, sizeof(struct dslogic_trigger_pos),
1062                         trigger_receive, (void *)sdi, 0);
1063         if ((ret = libusb_submit_transfer(transfer)) < 0) {
1064                 sr_err("Failed to request trigger: %s.", libusb_error_name(ret));
1065                 libusb_free_transfer(transfer);
1066                 g_free(tpos);
1067                 return SR_ERR;
1068         }
1069
1070         devc->transfers = g_try_malloc0(sizeof(*devc->transfers));
1071         if (!devc->transfers) {
1072                 sr_err("USB trigger_pos transfer malloc failed.");
1073                 return SR_ERR_MALLOC;
1074         }
1075         devc->num_transfers = 1;
1076         devc->submitted_transfers++;
1077         devc->transfers[0] = transfer;
1078
1079         return ret;
1080 }
1081
1082 SR_PRIV int dslogic_acquisition_stop(struct sr_dev_inst *sdi)
1083 {
1084         command_stop_acquisition(sdi);
1085         abort_acquisition(sdi->priv);
1086         return SR_OK;
1087 }