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dreamsourcelab-dslogic: Naming and other consistency fixes.
[libsigrok.git] / src / hardware / dreamsourcelab-dslogic / protocol.c
1 /*
2  * This file is part of the libsigrok project.
3  *
4  * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5  * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
6  *
7  * This program is free software: you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation, either version 3 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
19  */
20
21 #include <config.h>
22 #include <assert.h>
23 #include <math.h>
24 #include <glib.h>
25 #include <glib/gstdio.h>
26 #include "protocol.h"
27
28 #define DS_CMD_GET_FW_VERSION           0xb0
29 #define DS_CMD_GET_REVID_VERSION        0xb1
30 #define DS_CMD_START                    0xb2
31 #define DS_CMD_CONFIG                   0xb3
32 #define DS_CMD_SETTING                  0xb4
33 #define DS_CMD_CONTROL                  0xb5
34 #define DS_CMD_STATUS                   0xb6
35 #define DS_CMD_STATUS_INFO              0xb7
36 #define DS_CMD_WR_REG                   0xb8
37 #define DS_CMD_WR_NVM                   0xb9
38 #define DS_CMD_RD_NVM                   0xba
39 #define DS_CMD_RD_NVM_PRE               0xbb
40 #define DS_CMD_GET_HW_INFO              0xbc
41
42 #define DS_START_FLAGS_STOP             (1 << 7)
43 #define DS_START_FLAGS_CLK_48MHZ        (1 << 6)
44 #define DS_START_FLAGS_SAMPLE_WIDE      (1 << 5)
45 #define DS_START_FLAGS_MODE_LA          (1 << 4)
46
47 #define DS_ADDR_COMB                    0x68
48 #define DS_ADDR_EEWP                    0x70
49 #define DS_ADDR_VTH                     0x78
50
51 #define DS_MAX_LOGIC_DEPTH              SR_MHZ(16)
52 #define DS_MAX_LOGIC_SAMPLERATE         SR_MHZ(100)
53 #define DS_MAX_TRIG_PERCENT             90
54
55 #define DS_MODE_TRIG_EN                 (1 << 0)
56 #define DS_MODE_CLK_TYPE                (1 << 1)
57 #define DS_MODE_CLK_EDGE                (1 << 2)
58 #define DS_MODE_RLE_MODE                (1 << 3)
59 #define DS_MODE_DSO_MODE                (1 << 4)
60 #define DS_MODE_HALF_MODE               (1 << 5)
61 #define DS_MODE_QUAR_MODE               (1 << 6)
62 #define DS_MODE_ANALOG_MODE             (1 << 7)
63 #define DS_MODE_FILTER                  (1 << 8)
64 #define DS_MODE_INSTANT                 (1 << 9)
65 #define DS_MODE_STRIG_MODE              (1 << 11)
66 #define DS_MODE_STREAM_MODE             (1 << 12)
67 #define DS_MODE_LPB_TEST                (1 << 13)
68 #define DS_MODE_EXT_TEST                (1 << 14)
69 #define DS_MODE_INT_TEST                (1 << 15)
70
71 #define DSLOGIC_ATOMIC_SAMPLES          (sizeof(uint64_t) * 8)
72 #define DSLOGIC_ATOMIC_BYTES            sizeof(uint64_t)
73
74 /*
75  * The FPGA is configured with TLV tuples. Length is specified as the
76  * number of 16-bit words.
77  */
78 #define _DS_CFG(variable, wordcnt) ((variable << 8) | wordcnt)
79 #define DS_CFG_START                    0xf5a5f5a5
80 #define DS_CFG_MODE                     _DS_CFG(0, 1)
81 #define DS_CFG_DIVIDER                  _DS_CFG(1, 2)
82 #define DS_CFG_COUNT                    _DS_CFG(3, 2)
83 #define DS_CFG_TRIG_POS                 _DS_CFG(5, 2)
84 #define DS_CFG_TRIG_GLB                 _DS_CFG(7, 1)
85 #define DS_CFG_CH_EN                    _DS_CFG(8, 1)
86 #define DS_CFG_TRIG                     _DS_CFG(64, 160)
87 #define DS_CFG_END                      0xfa5afa5a
88
89 #pragma pack(push, 1)
90
91 struct version_info {
92         uint8_t major;
93         uint8_t minor;
94 };
95
96 struct cmd_start_acquisition {
97         uint8_t flags;
98         uint8_t sample_delay_h;
99         uint8_t sample_delay_l;
100 };
101
102 struct dslogic_fpga_config {
103         uint32_t sync;
104
105         uint16_t mode_header;
106         uint16_t mode;
107         uint16_t divider_header;
108         uint32_t divider;
109         uint16_t count_header;
110         uint32_t count;
111         uint16_t trig_pos_header;
112         uint32_t trig_pos;
113         uint16_t trig_glb_header;
114         uint16_t trig_glb;
115         uint16_t ch_en_header;
116         uint16_t ch_en;
117
118         uint16_t trig_header;
119         uint16_t trig_mask0[NUM_TRIGGER_STAGES];
120         uint16_t trig_mask1[NUM_TRIGGER_STAGES];
121         uint16_t trig_value0[NUM_TRIGGER_STAGES];
122         uint16_t trig_value1[NUM_TRIGGER_STAGES];
123         uint16_t trig_edge0[NUM_TRIGGER_STAGES];
124         uint16_t trig_edge1[NUM_TRIGGER_STAGES];
125         uint16_t trig_logic0[NUM_TRIGGER_STAGES];
126         uint16_t trig_logic1[NUM_TRIGGER_STAGES];
127         uint32_t trig_count[NUM_TRIGGER_STAGES];
128
129         uint32_t end_sync;
130 };
131
132 #pragma pack(pop)
133
134 /*
135  * This should be larger than the FPGA bitstream image so that it'll get
136  * uploaded in one big operation. There seem to be issues when uploading
137  * it in chunks.
138  */
139 #define FW_BUFSIZE (1024 * 1024)
140
141 #define FPGA_UPLOAD_DELAY (10 * 1000)
142
143 #define USB_TIMEOUT (3 * 1000)
144
145 static int command_get_fw_version(libusb_device_handle *devhdl,
146                                   struct version_info *vi)
147 {
148         int ret;
149
150         ret = libusb_control_transfer(devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
151                 LIBUSB_ENDPOINT_IN, DS_CMD_GET_FW_VERSION, 0x0000, 0x0000,
152                 (unsigned char *)vi, sizeof(struct version_info), USB_TIMEOUT);
153
154         if (ret < 0) {
155                 sr_err("Unable to get version info: %s.",
156                        libusb_error_name(ret));
157                 return SR_ERR;
158         }
159
160         return SR_OK;
161 }
162
163 static int command_get_revid_version(struct sr_dev_inst *sdi, uint8_t *revid)
164 {
165         struct sr_usb_dev_inst *usb = sdi->conn;
166         libusb_device_handle *devhdl = usb->devhdl;
167         int ret;
168
169         ret = libusb_control_transfer(devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
170                 LIBUSB_ENDPOINT_IN, DS_CMD_GET_REVID_VERSION, 0x0000, 0x0000,
171                 revid, 1, USB_TIMEOUT);
172
173         if (ret < 0) {
174                 sr_err("Unable to get REVID: %s.", libusb_error_name(ret));
175                 return SR_ERR;
176         }
177
178         return SR_OK;
179 }
180
181 static int command_start_acquisition(const struct sr_dev_inst *sdi)
182 {
183         struct sr_usb_dev_inst *usb;
184         struct dslogic_mode mode;
185         int ret;
186
187         mode.flags = DS_START_FLAGS_MODE_LA | DS_START_FLAGS_SAMPLE_WIDE;
188         mode.sample_delay_h = mode.sample_delay_l = 0;
189
190         usb = sdi->conn;
191         ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
192                         LIBUSB_ENDPOINT_OUT, DS_CMD_START, 0x0000, 0x0000,
193                         (unsigned char *)&mode, sizeof(mode), USB_TIMEOUT);
194         if (ret < 0) {
195                 sr_err("Failed to send start command: %s.", libusb_error_name(ret));
196                 return SR_ERR;
197         }
198
199         return SR_OK;
200 }
201
202 static int command_stop_acquisition(const struct sr_dev_inst *sdi)
203 {
204         struct sr_usb_dev_inst *usb;
205         struct dslogic_mode mode;
206         int ret;
207
208         mode.flags = DS_START_FLAGS_STOP;
209         mode.sample_delay_h = mode.sample_delay_l = 0;
210
211         usb = sdi->conn;
212         ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
213                         LIBUSB_ENDPOINT_OUT, DS_CMD_START, 0x0000, 0x0000,
214                         (unsigned char *)&mode, sizeof(struct dslogic_mode), USB_TIMEOUT);
215         if (ret < 0) {
216                 sr_err("Failed to send stop command: %s.", libusb_error_name(ret));
217                 return SR_ERR;
218         }
219
220         return SR_OK;
221 }
222
223 SR_PRIV int dslogic_fpga_firmware_upload(const struct sr_dev_inst *sdi)
224 {
225         const char *name = NULL;
226         uint64_t sum;
227         struct sr_resource bitstream;
228         struct drv_context *drvc;
229         struct dev_context *devc;
230         struct sr_usb_dev_inst *usb;
231         unsigned char *buf;
232         ssize_t chunksize;
233         int transferred;
234         int result, ret;
235         const uint8_t cmd[3] = {0, 0, 0};
236
237         drvc = sdi->driver->context;
238         devc = sdi->priv;
239         usb = sdi->conn;
240
241         if (!strcmp(devc->profile->model, "DSLogic")) {
242                 if (devc->cur_threshold < 1.40)
243                         name = DSLOGIC_FPGA_FIRMWARE_3V3;
244                 else
245                         name = DSLOGIC_FPGA_FIRMWARE_5V;
246         } else if (!strcmp(devc->profile->model, "DSLogic Pro")){
247                 name = DSLOGIC_PRO_FPGA_FIRMWARE;
248         } else if (!strcmp(devc->profile->model, "DSLogic Plus")){
249                 name = DSLOGIC_PLUS_FPGA_FIRMWARE;
250         } else if (!strcmp(devc->profile->model, "DSLogic Basic")){
251                 name = DSLOGIC_BASIC_FPGA_FIRMWARE;
252         } else if (!strcmp(devc->profile->model, "DSCope")) {
253                 name = DSCOPE_FPGA_FIRMWARE;
254         } else {
255                 sr_err("Failed to select FPGA firmware.");
256                 return SR_ERR;
257         }
258
259         sr_dbg("Uploading FPGA firmware '%s'.", name);
260
261         result = sr_resource_open(drvc->sr_ctx, &bitstream,
262                         SR_RESOURCE_FIRMWARE, name);
263         if (result != SR_OK)
264                 return result;
265
266         /* Tell the device firmware is coming. */
267         if ((ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
268                         LIBUSB_ENDPOINT_OUT, DS_CMD_CONFIG, 0x0000, 0x0000,
269                         (unsigned char *)&cmd, sizeof(cmd), USB_TIMEOUT)) < 0) {
270                 sr_err("Failed to upload FPGA firmware: %s.", libusb_error_name(ret));
271                 sr_resource_close(drvc->sr_ctx, &bitstream);
272                 return SR_ERR;
273         }
274
275         /* Give the FX2 time to get ready for FPGA firmware upload. */
276         g_usleep(FPGA_UPLOAD_DELAY);
277
278         buf = g_malloc(FW_BUFSIZE);
279         sum = 0;
280         result = SR_OK;
281         while (1) {
282                 chunksize = sr_resource_read(drvc->sr_ctx, &bitstream,
283                                 buf, FW_BUFSIZE);
284                 if (chunksize < 0)
285                         result = SR_ERR;
286                 if (chunksize <= 0)
287                         break;
288
289                 if ((ret = libusb_bulk_transfer(usb->devhdl, 2 | LIBUSB_ENDPOINT_OUT,
290                                 buf, chunksize, &transferred, USB_TIMEOUT)) < 0) {
291                         sr_err("Unable to configure FPGA firmware: %s.",
292                                         libusb_error_name(ret));
293                         result = SR_ERR;
294                         break;
295                 }
296                 sum += transferred;
297                 sr_spew("Uploaded %" PRIu64 "/%" PRIu64 " bytes.",
298                         sum, bitstream.size);
299
300                 if (transferred != chunksize) {
301                         sr_err("Short transfer while uploading FPGA firmware.");
302                         result = SR_ERR;
303                         break;
304                 }
305         }
306         g_free(buf);
307         sr_resource_close(drvc->sr_ctx, &bitstream);
308
309         if (result == SR_OK)
310                 sr_dbg("FPGA firmware upload done.");
311
312         return result;
313 }
314
315 static unsigned int enabled_channel_count(const struct sr_dev_inst *sdi)
316 {
317         unsigned int count = 0;
318         for (const GSList *l = sdi->channels; l; l = l->next) {
319                 const struct sr_channel *const probe = (struct sr_channel *)l->data;
320                 if (probe->enabled)
321                         count++;
322         }
323         return count;
324 }
325
326 static uint16_t enabled_channel_mask(const struct sr_dev_inst *sdi)
327 {
328         unsigned int mask = 0;
329         for (const GSList *l = sdi->channels; l; l = l->next) {
330                 const struct sr_channel *const probe = (struct sr_channel *)l->data;
331                 if (probe->enabled)
332                         mask |= 1 << probe->index;
333         }
334         return mask;
335 }
336
337 /*
338  * Get the session trigger and configure the FPGA structure
339  * accordingly.
340  */
341 static void set_trigger(const struct sr_dev_inst *sdi,
342         struct dslogic_fpga_config *cfg)
343 {
344         struct sr_trigger *trigger;
345         struct sr_trigger_stage *stage;
346         struct sr_trigger_match *match;
347         struct dev_context *devc;
348         const GSList *l, *m;
349         const unsigned int num_enabled_channels = enabled_channel_count(sdi);
350         int num_trigger_stages = 0;
351
352         int channelbit, i = 0;
353         uint32_t trigger_point;
354
355         devc = sdi->priv;
356
357         cfg->ch_en = enabled_channel_mask(sdi);
358
359         cfg->trig_mask0[0] = 0xffff;
360         cfg->trig_mask1[0] = 0xffff;
361
362         cfg->trig_value0[0] = 0;
363         cfg->trig_value1[0] = 0;
364
365         cfg->trig_edge0[0] = 0;
366         cfg->trig_edge1[0] = 0;
367
368         cfg->trig_logic0[0] = 2;
369         cfg->trig_logic1[0] = 2;
370
371         cfg->trig_count[0] = 0;
372
373         cfg->trig_glb = num_enabled_channels << 4;
374
375         for (i = 1; i < NUM_TRIGGER_STAGES; i++) {
376                 cfg->trig_mask0[i] = 0xffff;
377                 cfg->trig_mask1[i] = 0xffff;
378                 cfg->trig_value0[i] = 0;
379                 cfg->trig_value1[i] = 0;
380                 cfg->trig_edge0[i] = 0;
381                 cfg->trig_edge1[i] = 0;
382                 cfg->trig_logic0[i] = 2;
383                 cfg->trig_logic1[i] = 2;
384                 cfg->trig_count[i] = 0;
385         }
386
387         trigger_point = (devc->capture_ratio * devc->limit_samples) / 100;
388         if (trigger_point < DSLOGIC_ATOMIC_SAMPLES)
389                 trigger_point = DSLOGIC_ATOMIC_SAMPLES;
390         const uint32_t mem_depth = devc->profile->mem_depth;
391         const uint32_t max_trigger_point = devc->continuous_mode ? ((mem_depth * 10) / 100) :
392                 ((mem_depth * DS_MAX_TRIG_PERCENT) / 100);
393         if (trigger_point > max_trigger_point)
394                 trigger_point = max_trigger_point;
395         cfg->trig_pos = trigger_point & ~(DSLOGIC_ATOMIC_SAMPLES - 1);
396
397         if (!(trigger = sr_session_trigger_get(sdi->session))) {
398                 sr_dbg("No session trigger found");
399                 return;
400         }
401
402         for (l = trigger->stages; l; l = l->next) {
403                 stage = l->data;
404                 num_trigger_stages++;
405                 for (m = stage->matches; m; m = m->next) {
406                         match = m->data;
407                         if (!match->channel->enabled)
408                                 /* Ignore disabled channels with a trigger. */
409                                 continue;
410                         channelbit = 1 << (match->channel->index);
411                         /* Simple trigger support (event). */
412                         if (match->match == SR_TRIGGER_ONE) {
413                                 cfg->trig_mask0[0] &= ~channelbit;
414                                 cfg->trig_mask1[0] &= ~channelbit;
415                                 cfg->trig_value0[0] |= channelbit;
416                                 cfg->trig_value1[0] |= channelbit;
417                         } else if (match->match == SR_TRIGGER_ZERO) {
418                                 cfg->trig_mask0[0] &= ~channelbit;
419                                 cfg->trig_mask1[0] &= ~channelbit;
420                         } else if (match->match == SR_TRIGGER_FALLING) {
421                                 cfg->trig_mask0[0] &= ~channelbit;
422                                 cfg->trig_mask1[0] &= ~channelbit;
423                                 cfg->trig_edge0[0] |= channelbit;
424                                 cfg->trig_edge1[0] |= channelbit;
425                         } else if (match->match == SR_TRIGGER_RISING) {
426                                 cfg->trig_mask0[0] &= ~channelbit;
427                                 cfg->trig_mask1[0] &= ~channelbit;
428                                 cfg->trig_value0[0] |= channelbit;
429                                 cfg->trig_value1[0] |= channelbit;
430                                 cfg->trig_edge0[0] |= channelbit;
431                                 cfg->trig_edge1[0] |= channelbit;
432                         } else if (match->match == SR_TRIGGER_EDGE) {
433                                 cfg->trig_edge0[0] |= channelbit;
434                                 cfg->trig_edge1[0] |= channelbit;
435                         }
436                 }
437         }
438
439         cfg->trig_glb |= num_trigger_stages;
440 }
441
442 static int fpga_configure(const struct sr_dev_inst *sdi)
443 {
444         struct dev_context *devc;
445         struct sr_usb_dev_inst *usb;
446         uint8_t c[3];
447         struct dslogic_fpga_config cfg;
448         uint16_t v16;
449         uint32_t v32;
450         int transferred, len, ret;
451
452         sr_dbg("Configuring FPGA.");
453
454         usb = sdi->conn;
455         devc = sdi->priv;
456
457         WL32(&cfg.sync, DS_CFG_START);
458         WL16(&cfg.mode_header, DS_CFG_MODE);
459         WL16(&cfg.divider_header, DS_CFG_DIVIDER);
460         WL16(&cfg.count_header, DS_CFG_COUNT);
461         WL16(&cfg.trig_pos_header, DS_CFG_TRIG_POS);
462         WL16(&cfg.trig_glb_header, DS_CFG_TRIG_GLB);
463         WL16(&cfg.ch_en_header, DS_CFG_CH_EN);
464         WL16(&cfg.trig_header, DS_CFG_TRIG);
465         WL32(&cfg.end_sync, DS_CFG_END);
466
467         /* Pass in the length of a fixed-size struct. Really. */
468         len = sizeof(struct dslogic_fpga_config) / 2;
469         c[0] = len & 0xff;
470         c[1] = (len >> 8) & 0xff;
471         c[2] = (len >> 16) & 0xff;
472
473         ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
474                         LIBUSB_ENDPOINT_OUT, DS_CMD_SETTING, 0x0000, 0x0000,
475                         c, sizeof(c), USB_TIMEOUT);
476         if (ret < 0) {
477                 sr_err("Failed to send FPGA configure command: %s.",
478                         libusb_error_name(ret));
479                 return SR_ERR;
480         }
481
482         v16 = 0x0000;
483
484         if (devc->mode == DS_OP_INTERNAL_TEST)
485                 v16 = DS_MODE_INT_TEST;
486         else if (devc->mode == DS_OP_EXTERNAL_TEST)
487                 v16 = DS_MODE_EXT_TEST;
488         else if (devc->mode == DS_OP_LOOPBACK_TEST)
489                 v16 = DS_MODE_LPB_TEST;
490
491         if (devc->cur_samplerate == DS_MAX_LOGIC_SAMPLERATE * 2)
492                 v16 |= DS_MODE_HALF_MODE;
493         else if (devc->cur_samplerate == DS_MAX_LOGIC_SAMPLERATE * 4)
494                 v16 |= DS_MODE_QUAR_MODE;
495
496         if (devc->continuous_mode)
497                 v16 |= DS_MODE_STREAM_MODE;
498         if (devc->external_clock) {
499                 v16 |= DS_MODE_CLK_TYPE;
500                 if (devc->clock_edge == DS_EDGE_FALLING)
501                         v16 |= DS_MODE_CLK_EDGE;
502         }
503         if (devc->limit_samples > DS_MAX_LOGIC_DEPTH *
504                 ceil(devc->cur_samplerate * 1.0 / DS_MAX_LOGIC_SAMPLERATE)
505                 && !devc->continuous_mode) {
506                 /* Enable RLE for long captures.
507                  * Without this, captured data present errors.
508                  */
509                 v16 |= DS_MODE_RLE_MODE;
510         }
511
512         WL16(&cfg.mode, v16);
513         v32 = ceil(DS_MAX_LOGIC_SAMPLERATE * 1.0 / devc->cur_samplerate);
514         WL32(&cfg.divider, v32);
515
516         /* Number of 16-sample units. */
517         WL32(&cfg.count, devc->limit_samples / 16);
518
519         set_trigger(sdi, &cfg);
520
521         len = sizeof(struct dslogic_fpga_config);
522         ret = libusb_bulk_transfer(usb->devhdl, 2 | LIBUSB_ENDPOINT_OUT,
523                         (unsigned char *)&cfg, len, &transferred, USB_TIMEOUT);
524         if (ret < 0 || transferred != len) {
525                 sr_err("Failed to send FPGA configuration: %s.", libusb_error_name(ret));
526                 return SR_ERR;
527         }
528
529         return SR_OK;
530 }
531
532 SR_PRIV int dslogic_set_voltage_threshold(const struct sr_dev_inst *sdi, double threshold)
533 {
534         int ret;
535         struct dev_context *const devc = sdi->priv;
536         const struct sr_usb_dev_inst *const usb = sdi->conn;
537         const uint8_t value = (threshold / 5.0) * 255;
538         const uint16_t cmd = value | (DS_ADDR_VTH << 8);
539
540         /* Send the control command. */
541         ret = libusb_control_transfer(usb->devhdl,
542                         LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_ENDPOINT_OUT,
543                         DS_CMD_WR_REG, 0x0000, 0x0000,
544                         (unsigned char *)&cmd, sizeof(cmd), 3000);
545         if (ret < 0) {
546                 sr_err("Unable to set voltage-threshold register: %s.",
547                 libusb_error_name(ret));
548                 return SR_ERR;
549         }
550
551         devc->cur_threshold = threshold;
552
553         return SR_OK;
554 }
555
556 SR_PRIV int dslogic_dev_open(struct sr_dev_inst *sdi, struct sr_dev_driver *di)
557 {
558         libusb_device **devlist;
559         struct sr_usb_dev_inst *usb;
560         struct libusb_device_descriptor des;
561         struct dev_context *devc;
562         struct drv_context *drvc;
563         struct version_info vi;
564         int ret, i, device_count;
565         uint8_t revid;
566         char connection_id[64];
567
568         drvc = di->context;
569         devc = sdi->priv;
570         usb = sdi->conn;
571
572         if (sdi->status == SR_ST_ACTIVE)
573                 /* Device is already in use. */
574                 return SR_ERR;
575
576         device_count = libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
577         if (device_count < 0) {
578                 sr_err("Failed to get device list: %s.",
579                        libusb_error_name(device_count));
580                 return SR_ERR;
581         }
582
583         for (i = 0; i < device_count; i++) {
584                 libusb_get_device_descriptor(devlist[i], &des);
585
586                 if (des.idVendor != devc->profile->vid
587                     || des.idProduct != devc->profile->pid)
588                         continue;
589
590                 if ((sdi->status == SR_ST_INITIALIZING) ||
591                                 (sdi->status == SR_ST_INACTIVE)) {
592                         /*
593                          * Check device by its physical USB bus/port address.
594                          */
595                         usb_get_port_path(devlist[i], connection_id, sizeof(connection_id));
596                         if (strcmp(sdi->connection_id, connection_id))
597                                 /* This is not the one. */
598                                 continue;
599                 }
600
601                 if (!(ret = libusb_open(devlist[i], &usb->devhdl))) {
602                         if (usb->address == 0xff)
603                                 /*
604                                  * First time we touch this device after FW
605                                  * upload, so we don't know the address yet.
606                                  */
607                                 usb->address = libusb_get_device_address(devlist[i]);
608                 } else {
609                         sr_err("Failed to open device: %s.",
610                                libusb_error_name(ret));
611                         break;
612                 }
613
614                 if (libusb_has_capability(LIBUSB_CAP_SUPPORTS_DETACH_KERNEL_DRIVER)) {
615                         if (libusb_kernel_driver_active(usb->devhdl, USB_INTERFACE) == 1) {
616                                 if ((ret = libusb_detach_kernel_driver(usb->devhdl, USB_INTERFACE)) < 0) {
617                                         sr_err("Failed to detach kernel driver: %s.",
618                                                 libusb_error_name(ret));
619                                         return SR_ERR;
620                                 }
621                         }
622                 }
623
624                 ret = command_get_fw_version(usb->devhdl, &vi);
625                 if (ret != SR_OK) {
626                         sr_err("Failed to get firmware version.");
627                         break;
628                 }
629
630                 ret = command_get_revid_version(sdi, &revid);
631                 if (ret != SR_OK) {
632                         sr_err("Failed to get REVID.");
633                         break;
634                 }
635
636                 /*
637                  * Changes in major version mean incompatible/API changes, so
638                  * bail out if we encounter an incompatible version.
639                  * Different minor versions are OK, they should be compatible.
640                  */
641                 if (vi.major != DSLOGIC_REQUIRED_VERSION_MAJOR) {
642                         sr_err("Expected firmware version %d.x, "
643                                "got %d.%d.", DSLOGIC_REQUIRED_VERSION_MAJOR,
644                                vi.major, vi.minor);
645                         break;
646                 }
647
648                 sdi->status = SR_ST_ACTIVE;
649                 sr_info("Opened device on %d.%d (logical) / %s (physical), "
650                         "interface %d, firmware %d.%d.",
651                         usb->bus, usb->address, connection_id,
652                         USB_INTERFACE, vi.major, vi.minor);
653
654                 sr_info("Detected REVID=%d, it's a Cypress CY7C68013%s.",
655                         revid, (revid != 1) ? " (FX2)" : "A (FX2LP)");
656
657                 break;
658         }
659         libusb_free_device_list(devlist, 1);
660
661         if (sdi->status != SR_ST_ACTIVE)
662                 return SR_ERR;
663
664         return SR_OK;
665 }
666
667 SR_PRIV struct dev_context *dslogic_dev_new(void)
668 {
669         struct dev_context *devc;
670
671         devc = g_malloc0(sizeof(struct dev_context));
672         devc->profile = NULL;
673         devc->fw_updated = 0;
674         devc->cur_samplerate = 0;
675         devc->limit_samples = 0;
676         devc->capture_ratio = 0;
677         devc->continuous_mode = FALSE;
678         devc->clock_edge = DS_EDGE_RISING;
679
680         return devc;
681 }
682
683 static void abort_acquisition(struct dev_context *devc)
684 {
685         int i;
686
687         devc->acq_aborted = TRUE;
688
689         for (i = devc->num_transfers - 1; i >= 0; i--) {
690                 if (devc->transfers[i])
691                         libusb_cancel_transfer(devc->transfers[i]);
692         }
693 }
694
695 static void finish_acquisition(struct sr_dev_inst *sdi)
696 {
697         struct dev_context *devc;
698
699         devc = sdi->priv;
700
701         std_session_send_df_end(sdi);
702
703         usb_source_remove(sdi->session, devc->ctx);
704
705         devc->num_transfers = 0;
706         g_free(devc->transfers);
707         g_free(devc->deinterleave_buffer);
708 }
709
710 static void free_transfer(struct libusb_transfer *transfer)
711 {
712         struct sr_dev_inst *sdi;
713         struct dev_context *devc;
714         unsigned int i;
715
716         sdi = transfer->user_data;
717         devc = sdi->priv;
718
719         g_free(transfer->buffer);
720         transfer->buffer = NULL;
721         libusb_free_transfer(transfer);
722
723         for (i = 0; i < devc->num_transfers; i++) {
724                 if (devc->transfers[i] == transfer) {
725                         devc->transfers[i] = NULL;
726                         break;
727                 }
728         }
729
730         devc->submitted_transfers--;
731         if (devc->submitted_transfers == 0)
732                 finish_acquisition(sdi);
733 }
734
735 static void resubmit_transfer(struct libusb_transfer *transfer)
736 {
737         int ret;
738
739         if ((ret = libusb_submit_transfer(transfer)) == LIBUSB_SUCCESS)
740                 return;
741
742         sr_err("%s: %s", __func__, libusb_error_name(ret));
743         free_transfer(transfer);
744
745 }
746
747 static void deinterleave_buffer(const uint8_t *src, size_t length,
748         uint16_t *dst_ptr, size_t channel_count, uint16_t channel_mask)
749 {
750         uint16_t sample;
751
752         for (const uint64_t *src_ptr = (uint64_t*)src;
753                 src_ptr < (uint64_t*)(src + length);
754                 src_ptr += channel_count) {
755                 for (int bit = 0; bit != 64; bit++) {
756                         const uint64_t *word_ptr = src_ptr;
757                         sample = 0;
758                         for (size_t channel = 0; channel != channel_count;
759                                 channel++) {
760                                 if ((channel_mask & (1 << channel)) &&
761                                         (*word_ptr++ & (1ULL << bit)))
762                                         sample |= 1 << channel;
763                         }
764                         *dst_ptr++ = sample;
765                 }
766         }
767 }
768
769 static void send_data(struct sr_dev_inst *sdi,
770         uint16_t *data, size_t sample_count)
771 {
772         const struct sr_datafeed_logic logic = {
773                 .length = sample_count * sizeof(uint16_t),
774                 .unitsize = sizeof(uint16_t),
775                 .data = data
776         };
777
778         const struct sr_datafeed_packet packet = {
779                 .type = SR_DF_LOGIC,
780                 .payload = &logic
781         };
782
783         sr_session_send(sdi, &packet);
784 }
785
786 static void LIBUSB_CALL receive_transfer(struct libusb_transfer *transfer)
787 {
788         struct sr_dev_inst *const sdi = transfer->user_data;
789         struct dev_context *const devc = sdi->priv;
790         const size_t channel_count = enabled_channel_count(sdi);
791         const uint16_t channel_mask = enabled_channel_mask(sdi);
792         const unsigned int cur_sample_count = DSLOGIC_ATOMIC_SAMPLES *
793                 transfer->actual_length /
794                 (DSLOGIC_ATOMIC_BYTES * channel_count);
795
796         gboolean packet_has_error = FALSE;
797         struct sr_datafeed_packet packet;
798         unsigned int num_samples;
799         int trigger_offset;
800
801         /*
802          * If acquisition has already ended, just free any queued up
803          * transfer that come in.
804          */
805         if (devc->acq_aborted) {
806                 free_transfer(transfer);
807                 return;
808         }
809
810         sr_dbg("receive_transfer(): status %s received %d bytes.",
811                 libusb_error_name(transfer->status), transfer->actual_length);
812
813         /* Save incoming transfer before reusing the transfer struct. */
814
815         switch (transfer->status) {
816         case LIBUSB_TRANSFER_NO_DEVICE:
817                 abort_acquisition(devc);
818                 free_transfer(transfer);
819                 return;
820         case LIBUSB_TRANSFER_COMPLETED:
821         case LIBUSB_TRANSFER_TIMED_OUT: /* We may have received some data though. */
822                 break;
823         default:
824                 packet_has_error = TRUE;
825                 break;
826         }
827
828         if (transfer->actual_length == 0 || packet_has_error) {
829                 devc->empty_transfer_count++;
830                 if (devc->empty_transfer_count > MAX_EMPTY_TRANSFERS) {
831                         /*
832                          * The FX2 gave up. End the acquisition, the frontend
833                          * will work out that the samplecount is short.
834                          */
835                         abort_acquisition(devc);
836                         free_transfer(transfer);
837                 } else {
838                         resubmit_transfer(transfer);
839                 }
840                 return;
841         } else {
842                 devc->empty_transfer_count = 0;
843         }
844
845         if (!devc->limit_samples || devc->sent_samples < devc->limit_samples) {
846                 if (devc->limit_samples && devc->sent_samples + cur_sample_count > devc->limit_samples)
847                         num_samples = devc->limit_samples - devc->sent_samples;
848                 else
849                         num_samples = cur_sample_count;
850
851                 /**
852                  * The DSLogic emits sample data as sequences of 64-bit sample words
853                  * in a round-robin i.e. 64-bits from channel 0, 64-bits from channel 1
854                  * etc. for each of the enabled channels, then looping back to the
855                  * channel.
856                  *
857                  * Because sigrok's internal representation is bit-interleaved channels
858                  * we must recast the data.
859                  *
860                  * Hopefully in future it will be possible to pass the data on as-is.
861                  */
862                 assert(transfer->actual_length % (DSLOGIC_ATOMIC_BYTES * channel_count) == 0);
863                 deinterleave_buffer(transfer->buffer, transfer->actual_length,
864                         devc->deinterleave_buffer, channel_count, channel_mask);
865
866                 /* Send the incoming transfer to the session bus. */
867                 if (devc->trigger_pos > devc->sent_samples
868                         && devc->trigger_pos <= devc->sent_samples + num_samples) {
869                         /* DSLogic trigger in this block. Send trigger position. */
870                         trigger_offset = devc->trigger_pos - devc->sent_samples;
871                         /* Pre-trigger samples. */
872                         send_data(sdi, devc->deinterleave_buffer, trigger_offset);
873                         devc->sent_samples += trigger_offset;
874                         /* Trigger position. */
875                         devc->trigger_pos = 0;
876                         packet.type = SR_DF_TRIGGER;
877                         packet.payload = NULL;
878                         sr_session_send(sdi, &packet);
879                         /* Post trigger samples. */
880                         num_samples -= trigger_offset;
881                         send_data(sdi, devc->deinterleave_buffer
882                                 + trigger_offset, num_samples);
883                         devc->sent_samples += num_samples;
884                 } else {
885                         send_data(sdi, devc->deinterleave_buffer, num_samples);
886                         devc->sent_samples += num_samples;
887                 }
888         }
889
890         if (devc->limit_samples && devc->sent_samples >= devc->limit_samples) {
891                 abort_acquisition(devc);
892                 free_transfer(transfer);
893         } else
894                 resubmit_transfer(transfer);
895 }
896
897 static int receive_data(int fd, int revents, void *cb_data)
898 {
899         struct timeval tv;
900         struct drv_context *drvc;
901
902         (void)fd;
903         (void)revents;
904
905         drvc = (struct drv_context *)cb_data;
906
907         tv.tv_sec = tv.tv_usec = 0;
908         libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
909
910         return TRUE;
911 }
912
913 static size_t to_bytes_per_ms(const struct sr_dev_inst *sdi)
914 {
915         const struct dev_context *const devc = sdi->priv;
916         const size_t ch_count = enabled_channel_count(sdi);
917
918         if (devc->continuous_mode)
919                 return (devc->cur_samplerate * ch_count) / (1000 * 8);
920
921
922         /* If we're in buffered mode, the transfer rate is not so important,
923          * but we expect to get at least 10% of the high-speed USB bandwidth.
924          */
925         return 35000000 / (1000 * 10);
926 }
927
928 static size_t get_buffer_size(const struct sr_dev_inst *sdi)
929 {
930         /*
931          * The buffer should be large enough to hold 10ms of data and
932          * a multiple of the size of a data atom.
933          */
934         const size_t block_size = enabled_channel_count(sdi) * 512;
935         const size_t s = 10 * to_bytes_per_ms(sdi);
936         return ((s + block_size - 1) / block_size) * block_size;
937 }
938
939 static unsigned int get_number_of_transfers(const struct sr_dev_inst *sdi)
940 {
941         /* Total buffer size should be able to hold about 100ms of data. */
942         const unsigned int s = get_buffer_size(sdi);
943         const unsigned int n = (100 * to_bytes_per_ms(sdi) + s - 1) / s;
944         return (n > NUM_SIMUL_TRANSFERS) ? NUM_SIMUL_TRANSFERS : n;
945 }
946
947 static unsigned int get_timeout(const struct sr_dev_inst *sdi)
948 {
949         const size_t total_size = get_buffer_size(sdi) *
950                 get_number_of_transfers(sdi);
951         const unsigned int timeout = total_size / to_bytes_per_ms(sdi);
952         return timeout + timeout / 4; /* Leave a headroom of 25% percent. */
953 }
954
955 static int start_transfers(const struct sr_dev_inst *sdi)
956 {
957         const size_t channel_count = enabled_channel_count(sdi);
958         const size_t size = get_buffer_size(sdi);
959         const unsigned int num_transfers = get_number_of_transfers(sdi);
960         const unsigned int timeout = get_timeout(sdi);
961
962         struct dev_context *devc;
963         struct sr_usb_dev_inst *usb;
964         struct libusb_transfer *transfer;
965         unsigned int i;
966         int ret;
967         unsigned char *buf;
968
969         devc = sdi->priv;
970         usb = sdi->conn;
971
972         devc->sent_samples = 0;
973         devc->acq_aborted = FALSE;
974         devc->empty_transfer_count = 0;
975         devc->submitted_transfers = 0;
976
977         g_free(devc->transfers);
978         devc->transfers = g_try_malloc0(sizeof(*devc->transfers) * num_transfers);
979         if (!devc->transfers) {
980                 sr_err("USB transfers malloc failed.");
981                 return SR_ERR_MALLOC;
982         }
983
984         devc->deinterleave_buffer = g_try_malloc(DSLOGIC_ATOMIC_SAMPLES *
985                 (size / (channel_count * DSLOGIC_ATOMIC_BYTES)) * sizeof(uint16_t));
986         if (!devc->deinterleave_buffer) {
987                 sr_err("Deinterleave buffer malloc failed.");
988                 g_free(devc->deinterleave_buffer);
989                 return SR_ERR_MALLOC;
990         }
991
992         devc->num_transfers = num_transfers;
993         for (i = 0; i < num_transfers; i++) {
994                 if (!(buf = g_try_malloc(size))) {
995                         sr_err("USB transfer buffer malloc failed.");
996                         return SR_ERR_MALLOC;
997                 }
998                 transfer = libusb_alloc_transfer(0);
999                 libusb_fill_bulk_transfer(transfer, usb->devhdl,
1000                                 6 | LIBUSB_ENDPOINT_IN, buf, size,
1001                                 receive_transfer, (void *)sdi, timeout);
1002                 sr_info("submitting transfer: %d", i);
1003                 if ((ret = libusb_submit_transfer(transfer)) != 0) {
1004                         sr_err("Failed to submit transfer: %s.",
1005                                libusb_error_name(ret));
1006                         libusb_free_transfer(transfer);
1007                         g_free(buf);
1008                         abort_acquisition(devc);
1009                         return SR_ERR;
1010                 }
1011                 devc->transfers[i] = transfer;
1012                 devc->submitted_transfers++;
1013         }
1014
1015         std_session_send_df_header(sdi);
1016
1017         return SR_OK;
1018 }
1019
1020 static void LIBUSB_CALL trigger_receive(struct libusb_transfer *transfer)
1021 {
1022         const struct sr_dev_inst *sdi;
1023         struct dslogic_trigger_pos *tpos;
1024         struct dev_context *devc;
1025
1026         sdi = transfer->user_data;
1027         devc = sdi->priv;
1028         if (transfer->status == LIBUSB_TRANSFER_CANCELLED) {
1029                 sr_dbg("Trigger transfer canceled.");
1030                 /* Terminate session. */
1031                 std_session_send_df_end(sdi);
1032                 usb_source_remove(sdi->session, devc->ctx);
1033                 devc->num_transfers = 0;
1034                 g_free(devc->transfers);
1035         } else if (transfer->status == LIBUSB_TRANSFER_COMPLETED
1036                         && transfer->actual_length == sizeof(struct dslogic_trigger_pos)) {
1037                 tpos = (struct dslogic_trigger_pos *)transfer->buffer;
1038                 sr_info("tpos real_pos %d ram_saddr %d cnt %d", tpos->real_pos,
1039                         tpos->ram_saddr, tpos->remain_cnt);
1040                 devc->trigger_pos = tpos->real_pos;
1041                 g_free(tpos);
1042                 start_transfers(sdi);
1043         }
1044         libusb_free_transfer(transfer);
1045 }
1046
1047 SR_PRIV int dslogic_acquisition_start(const struct sr_dev_inst *sdi)
1048 {
1049         const unsigned int timeout = get_timeout(sdi);
1050
1051         struct sr_dev_driver *di;
1052         struct drv_context *drvc;
1053         struct dev_context *devc;
1054         struct sr_usb_dev_inst *usb;
1055         struct dslogic_trigger_pos *tpos;
1056         struct libusb_transfer *transfer;
1057         int ret;
1058
1059         if (sdi->status != SR_ST_ACTIVE)
1060                 return SR_ERR_DEV_CLOSED;
1061
1062         di = sdi->driver;
1063         drvc = di->context;
1064         devc = sdi->priv;
1065         usb = sdi->conn;
1066
1067         devc->ctx = drvc->sr_ctx;
1068         devc->sent_samples = 0;
1069         devc->empty_transfer_count = 0;
1070         devc->acq_aborted = FALSE;
1071
1072         usb_source_add(sdi->session, devc->ctx, timeout, receive_data, drvc);
1073
1074         if ((ret = command_stop_acquisition(sdi)) != SR_OK)
1075                 return ret;
1076
1077         if ((ret = fpga_configure(sdi)) != SR_OK)
1078                 return ret;
1079
1080         if ((ret = command_start_acquisition(sdi)) != SR_OK)
1081                 return ret;
1082
1083         sr_dbg("Getting trigger.");
1084         tpos = g_malloc(sizeof(struct dslogic_trigger_pos));
1085         transfer = libusb_alloc_transfer(0);
1086         libusb_fill_bulk_transfer(transfer, usb->devhdl, 6 | LIBUSB_ENDPOINT_IN,
1087                         (unsigned char *)tpos, sizeof(struct dslogic_trigger_pos),
1088                         trigger_receive, (void *)sdi, 0);
1089         if ((ret = libusb_submit_transfer(transfer)) < 0) {
1090                 sr_err("Failed to request trigger: %s.", libusb_error_name(ret));
1091                 libusb_free_transfer(transfer);
1092                 g_free(tpos);
1093                 return SR_ERR;
1094         }
1095
1096         devc->transfers = g_try_malloc0(sizeof(*devc->transfers));
1097         if (!devc->transfers) {
1098                 sr_err("USB trigger_pos transfer malloc failed.");
1099                 return SR_ERR_MALLOC;
1100         }
1101         devc->num_transfers = 1;
1102         devc->submitted_transfers++;
1103         devc->transfers[0] = transfer;
1104
1105         return ret;
1106 }
1107
1108 SR_PRIV int dslogic_acquisition_stop(struct sr_dev_inst *sdi)
1109 {
1110         command_stop_acquisition(sdi);
1111         abort_acquisition(sdi->priv);
1112         return SR_OK;
1113 }