src/hardware/dreamsourcelab-dslogic/protocol.c

   1 /*
   2  * This file is part of the libsigrok project.
   3  *
   4  * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
   5  * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
   6  *
   7  * This program is free software: you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation, either version 3 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include <config.h>
  22 #include <math.h>
  23 #include <glib.h>
  24 #include <glib/gstdio.h>
  25 #include "protocol.h"
  26
  27 #define DS_CMD_GET_FW_VERSION           0xb0
  28 #define DS_CMD_GET_REVID_VERSION        0xb1
  29 #define DS_CMD_START                    0xb2
  30 #define DS_CMD_CONFIG                   0xb3
  31 #define DS_CMD_SETTING                  0xb4
  32 #define DS_CMD_CONTROL                  0xb5
  33 #define DS_CMD_STATUS                   0xb6
  34 #define DS_CMD_STATUS_INFO              0xb7
  35 #define DS_CMD_WR_REG                   0xb8
  36 #define DS_CMD_WR_NVM                   0xb9
  37 #define DS_CMD_RD_NVM                   0xba
  38 #define DS_CMD_RD_NVM_PRE               0xbb
  39 #define DS_CMD_GET_HW_INFO              0xbc
  40
  41 #define DS_START_FLAGS_STOP             (1 << 7)
  42 #define DS_START_FLAGS_CLK_48MHZ        (1 << 6)
  43 #define DS_START_FLAGS_SAMPLE_WIDE      (1 << 5)
  44 #define DS_START_FLAGS_MODE_LA          (1 << 4)
  45
  46 #define DS_ADDR_COMB                    0x68
  47 #define DS_ADDR_EEWP                    0x70
  48 #define DS_ADDR_VTH                     0x78
  49
  50 #define DS_MAX_LOGIC_DEPTH              SR_MHZ(16)
  51 #define DS_MAX_LOGIC_SAMPLERATE         SR_MHZ(100)
  52 #define DS_MAX_TRIG_PERCENT             90
  53
  54 #define DS_MODE_TRIG_EN                 (1 << 0)
  55 #define DS_MODE_CLK_TYPE                (1 << 1)
  56 #define DS_MODE_CLK_EDGE                (1 << 2)
  57 #define DS_MODE_RLE_MODE                (1 << 3)
  58 #define DS_MODE_DSO_MODE                (1 << 4)
  59 #define DS_MODE_HALF_MODE               (1 << 5)
  60 #define DS_MODE_QUAR_MODE               (1 << 6)
  61 #define DS_MODE_ANALOG_MODE             (1 << 7)
  62 #define DS_MODE_FILTER                  (1 << 8)
  63 #define DS_MODE_INSTANT                 (1 << 9)
  64 #define DS_MODE_STRIG_MODE              (1 << 11)
  65 #define DS_MODE_STREAM_MODE             (1 << 12)
  66 #define DS_MODE_LPB_TEST                (1 << 13)
  67 #define DS_MODE_EXT_TEST                (1 << 14)
  68 #define DS_MODE_INT_TEST                (1 << 15)
  69
  70 #define DSLOGIC_ATOMIC_SAMPLES          (sizeof(uint64_t) * 8)
  71 #define DSLOGIC_ATOMIC_BYTES            sizeof(uint64_t)
  72
  73 /*
  74  * The FPGA is configured with TLV tuples. Length is specified as the
  75  * number of 16-bit words.
  76  */
  77 #define _DS_CFG(variable, wordcnt) ((variable << 8) | wordcnt)
  78 #define DS_CFG_START                    0xf5a5f5a5
  79 #define DS_CFG_MODE                     _DS_CFG(0, 1)
  80 #define DS_CFG_DIVIDER                  _DS_CFG(1, 2)
  81 #define DS_CFG_COUNT                    _DS_CFG(3, 2)
  82 #define DS_CFG_TRIG_POS                 _DS_CFG(5, 2)
  83 #define DS_CFG_TRIG_GLB                 _DS_CFG(7, 1)
  84 #define DS_CFG_CH_EN                    _DS_CFG(8, 1)
  85 #define DS_CFG_TRIG                     _DS_CFG(64, 160)
  86 #define DS_CFG_END                      0xfa5afa5a
  87
  88 #pragma pack(push, 1)
  89
  90 struct version_info {
  91         uint8_t major;
  92         uint8_t minor;
  93 };
  94
  95 struct cmd_start_acquisition {
  96         uint8_t flags;
  97         uint8_t sample_delay_h;
  98         uint8_t sample_delay_l;
  99 };
 100
 101 struct fpga_config {
 102         uint32_t sync;
 103
 104         uint16_t mode_header;
 105         uint16_t mode;
 106         uint16_t divider_header;
 107         uint32_t divider;
 108         uint16_t count_header;
 109         uint32_t count;
 110         uint16_t trig_pos_header;
 111         uint32_t trig_pos;
 112         uint16_t trig_glb_header;
 113         uint16_t trig_glb;
 114         uint16_t ch_en_header;
 115         uint16_t ch_en;
 116
 117         uint16_t trig_header;
 118         uint16_t trig_mask0[NUM_TRIGGER_STAGES];
 119         uint16_t trig_mask1[NUM_TRIGGER_STAGES];
 120         uint16_t trig_value0[NUM_TRIGGER_STAGES];
 121         uint16_t trig_value1[NUM_TRIGGER_STAGES];
 122         uint16_t trig_edge0[NUM_TRIGGER_STAGES];
 123         uint16_t trig_edge1[NUM_TRIGGER_STAGES];
 124         uint16_t trig_logic0[NUM_TRIGGER_STAGES];
 125         uint16_t trig_logic1[NUM_TRIGGER_STAGES];
 126         uint32_t trig_count[NUM_TRIGGER_STAGES];
 127
 128         uint32_t end_sync;
 129 };
 130
 131 #pragma pack(pop)
 132
 133 /*
 134  * This should be larger than the FPGA bitstream image so that it'll get
 135  * uploaded in one big operation. There seem to be issues when uploading
 136  * it in chunks.
 137  */
 138 #define FW_BUFSIZE (1024 * 1024)
 139
 140 #define FPGA_UPLOAD_DELAY (10 * 1000)
 141
 142 #define USB_TIMEOUT (3 * 1000)
 143
 144 static int command_get_fw_version(libusb_device_handle *devhdl,
 145                                   struct version_info *vi)
 146 {
 147         int ret;
 148
 149         ret = libusb_control_transfer(devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
 150                 LIBUSB_ENDPOINT_IN, DS_CMD_GET_FW_VERSION, 0x0000, 0x0000,
 151                 (unsigned char *)vi, sizeof(struct version_info), USB_TIMEOUT);
 152
 153         if (ret < 0) {
 154                 sr_err("Unable to get version info: %s.",
 155                        libusb_error_name(ret));
 156                 return SR_ERR;
 157         }
 158
 159         return SR_OK;
 160 }
 161
 162 static int command_get_revid_version(struct sr_dev_inst *sdi, uint8_t *revid)
 163 {
 164         struct sr_usb_dev_inst *usb = sdi->conn;
 165         libusb_device_handle *devhdl = usb->devhdl;
 166         int ret;
 167
 168         ret = libusb_control_transfer(devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
 169                 LIBUSB_ENDPOINT_IN, DS_CMD_GET_REVID_VERSION, 0x0000, 0x0000,
 170                 revid, 1, USB_TIMEOUT);
 171
 172         if (ret < 0) {
 173                 sr_err("Unable to get REVID: %s.", libusb_error_name(ret));
 174                 return SR_ERR;
 175         }
 176
 177         return SR_OK;
 178 }
 179
 180 static int command_start_acquisition(const struct sr_dev_inst *sdi)
 181 {
 182         struct sr_usb_dev_inst *usb;
 183         struct dslogic_mode mode;
 184         int ret;
 185
 186         mode.flags = DS_START_FLAGS_MODE_LA | DS_START_FLAGS_SAMPLE_WIDE;
 187         mode.sample_delay_h = mode.sample_delay_l = 0;
 188
 189         usb = sdi->conn;
 190         ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
 191                         LIBUSB_ENDPOINT_OUT, DS_CMD_START, 0x0000, 0x0000,
 192                         (unsigned char *)&mode, sizeof(mode), USB_TIMEOUT);
 193         if (ret < 0) {
 194                 sr_err("Failed to send start command: %s.", libusb_error_name(ret));
 195                 return SR_ERR;
 196         }
 197
 198         return SR_OK;
 199 }
 200
 201 static int command_stop_acquisition(const struct sr_dev_inst *sdi)
 202 {
 203         struct sr_usb_dev_inst *usb;
 204         struct dslogic_mode mode;
 205         int ret;
 206
 207         mode.flags = DS_START_FLAGS_STOP;
 208         mode.sample_delay_h = mode.sample_delay_l = 0;
 209
 210         usb = sdi->conn;
 211         ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
 212                         LIBUSB_ENDPOINT_OUT, DS_CMD_START, 0x0000, 0x0000,
 213                         (unsigned char *)&mode, sizeof(struct dslogic_mode), USB_TIMEOUT);
 214         if (ret < 0) {
 215                 sr_err("Failed to send stop command: %s.", libusb_error_name(ret));
 216                 return SR_ERR;
 217         }
 218
 219         return SR_OK;
 220 }
 221
 222 SR_PRIV int dslogic_fpga_firmware_upload(const struct sr_dev_inst *sdi)
 223 {
 224         const char *name = NULL;
 225         uint64_t sum;
 226         struct sr_resource bitstream;
 227         struct drv_context *drvc;
 228         struct dev_context *devc;
 229         struct sr_usb_dev_inst *usb;
 230         unsigned char *buf;
 231         ssize_t chunksize;
 232         int transferred;
 233         int result, ret;
 234         const uint8_t cmd[3] = {0, 0, 0};
 235
 236         drvc = sdi->driver->context;
 237         devc = sdi->priv;
 238         usb = sdi->conn;
 239
 240         if (!strcmp(devc->profile->model, "DSLogic")) {
 241                 if (devc->cur_threshold < 1.40)
 242                         name = DSLOGIC_FPGA_FIRMWARE_3V3;
 243                 else
 244                         name = DSLOGIC_FPGA_FIRMWARE_5V;
 245         } else if (!strcmp(devc->profile->model, "DSLogic Pro")){
 246                 name = DSLOGIC_PRO_FPGA_FIRMWARE;
 247         } else if (!strcmp(devc->profile->model, "DSLogic Plus")){
 248                 name = DSLOGIC_PLUS_FPGA_FIRMWARE;
 249         } else if (!strcmp(devc->profile->model, "DSLogic Basic")){
 250                 name = DSLOGIC_BASIC_FPGA_FIRMWARE;
 251         } else if (!strcmp(devc->profile->model, "DSCope")) {
 252                 name = DSCOPE_FPGA_FIRMWARE;
 253         } else {
 254                 sr_err("Failed to select FPGA firmware.");
 255                 return SR_ERR;
 256         }
 257
 258         sr_dbg("Uploading FPGA firmware '%s'.", name);
 259
 260         result = sr_resource_open(drvc->sr_ctx, &bitstream,
 261                         SR_RESOURCE_FIRMWARE, name);
 262         if (result != SR_OK)
 263                 return result;
 264
 265         /* Tell the device firmware is coming. */
 266         if ((ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
 267                         LIBUSB_ENDPOINT_OUT, DS_CMD_CONFIG, 0x0000, 0x0000,
 268                         (unsigned char *)&cmd, sizeof(cmd), USB_TIMEOUT)) < 0) {
 269                 sr_err("Failed to upload FPGA firmware: %s.", libusb_error_name(ret));
 270                 sr_resource_close(drvc->sr_ctx, &bitstream);
 271                 return SR_ERR;
 272         }
 273
 274         /* Give the FX2 time to get ready for FPGA firmware upload. */
 275         g_usleep(FPGA_UPLOAD_DELAY);
 276
 277         buf = g_malloc(FW_BUFSIZE);
 278         sum = 0;
 279         result = SR_OK;
 280         while (1) {
 281                 chunksize = sr_resource_read(drvc->sr_ctx, &bitstream,
 282                                 buf, FW_BUFSIZE);
 283                 if (chunksize < 0)
 284                         result = SR_ERR;
 285                 if (chunksize <= 0)
 286                         break;
 287
 288                 if ((ret = libusb_bulk_transfer(usb->devhdl, 2 | LIBUSB_ENDPOINT_OUT,
 289                                 buf, chunksize, &transferred, USB_TIMEOUT)) < 0) {
 290                         sr_err("Unable to configure FPGA firmware: %s.",
 291                                         libusb_error_name(ret));
 292                         result = SR_ERR;
 293                         break;
 294                 }
 295                 sum += transferred;
 296                 sr_spew("Uploaded %" PRIu64 "/%" PRIu64 " bytes.",
 297                         sum, bitstream.size);
 298
 299                 if (transferred != chunksize) {
 300                         sr_err("Short transfer while uploading FPGA firmware.");
 301                         result = SR_ERR;
 302                         break;
 303                 }
 304         }
 305         g_free(buf);
 306         sr_resource_close(drvc->sr_ctx, &bitstream);
 307
 308         if (result == SR_OK)
 309                 sr_dbg("FPGA firmware upload done.");
 310
 311         return result;
 312 }
 313
 314 static unsigned int enabled_channel_count(const struct sr_dev_inst *sdi)
 315 {
 316         unsigned int count = 0;
 317         for (const GSList *l = sdi->channels; l; l = l->next) {
 318                 const struct sr_channel *const probe = (struct sr_channel *)l->data;
 319                 if (probe->enabled)
 320                         count++;
 321         }
 322         return count;
 323 }
 324
 325 static uint16_t enabled_channel_mask(const struct sr_dev_inst *sdi)
 326 {
 327         unsigned int mask = 0;
 328         for (const GSList *l = sdi->channels; l; l = l->next) {
 329                 const struct sr_channel *const probe = (struct sr_channel *)l->data;
 330                 if (probe->enabled)
 331                         mask |= 1 << probe->index;
 332         }
 333         return mask;
 334 }
 335
 336 /*
 337  * Get the session trigger and configure the FPGA structure
 338  * accordingly.
 339  */
 340 static void set_trigger(const struct sr_dev_inst *sdi, struct fpga_config *cfg)
 341 {
 342         struct sr_trigger *trigger;
 343         struct sr_trigger_stage *stage;
 344         struct sr_trigger_match *match;
 345         struct dev_context *devc;
 346         const GSList *l, *m;
 347         const unsigned int num_enabled_channels = enabled_channel_count(sdi);
 348         int num_trigger_stages = 0;
 349
 350         int channelbit, i = 0;
 351         uint32_t trigger_point;
 352
 353         devc = sdi->priv;
 354
 355         cfg->ch_en = enabled_channel_mask(sdi);
 356
 357         cfg->trig_glb = num_enabled_channels << 4;
 358
 359         for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
 360                 cfg->trig_mask0[i] = 0xffff;
 361                 cfg->trig_mask1[i] = 0xffff;
 362                 cfg->trig_value0[i] = 0;
 363                 cfg->trig_value1[i] = 0;
 364                 cfg->trig_edge0[i] = 0;
 365                 cfg->trig_edge1[i] = 0;
 366                 cfg->trig_logic0[i] = 2;
 367                 cfg->trig_logic1[i] = 2;
 368                 cfg->trig_count[i] = 0;
 369         }
 370
 371         trigger_point = (devc->capture_ratio * devc->limit_samples) / 100;
 372         if (trigger_point < DSLOGIC_ATOMIC_SAMPLES)
 373                 trigger_point = DSLOGIC_ATOMIC_SAMPLES;
 374         const uint32_t mem_depth = devc->profile->mem_depth;
 375         const uint32_t max_trigger_point = devc->continuous_mode ? ((mem_depth * 10) / 100) :
 376                 ((mem_depth * DS_MAX_TRIG_PERCENT) / 100);
 377         if (trigger_point > max_trigger_point)
 378                 trigger_point = max_trigger_point;
 379         cfg->trig_pos = trigger_point & ~(DSLOGIC_ATOMIC_SAMPLES - 1);
 380
 381         if (!(trigger = sr_session_trigger_get(sdi->session))) {
 382                 sr_dbg("No session trigger found");
 383                 return;
 384         }
 385
 386         for (l = trigger->stages; l; l = l->next) {
 387                 stage = l->data;
 388                 num_trigger_stages++;
 389                 for (m = stage->matches; m; m = m->next) {
 390                         match = m->data;
 391                         if (!match->channel->enabled)
 392                                 /* Ignore disabled channels with a trigger. */
 393                                 continue;
 394                         channelbit = 1 << (match->channel->index);
 395                         /* Simple trigger support (event). */
 396                         if (match->match == SR_TRIGGER_ONE) {
 397                                 cfg->trig_mask0[0] &= ~channelbit;
 398                                 cfg->trig_mask1[0] &= ~channelbit;
 399                                 cfg->trig_value0[0] |= channelbit;
 400                                 cfg->trig_value1[0] |= channelbit;
 401                         } else if (match->match == SR_TRIGGER_ZERO) {
 402                                 cfg->trig_mask0[0] &= ~channelbit;
 403                                 cfg->trig_mask1[0] &= ~channelbit;
 404                         } else if (match->match == SR_TRIGGER_FALLING) {
 405                                 cfg->trig_mask0[0] &= ~channelbit;
 406                                 cfg->trig_mask1[0] &= ~channelbit;
 407                                 cfg->trig_edge0[0] |= channelbit;
 408                                 cfg->trig_edge1[0] |= channelbit;
 409                         } else if (match->match == SR_TRIGGER_RISING) {
 410                                 cfg->trig_mask0[0] &= ~channelbit;
 411                                 cfg->trig_mask1[0] &= ~channelbit;
 412                                 cfg->trig_value0[0] |= channelbit;
 413                                 cfg->trig_value1[0] |= channelbit;
 414                                 cfg->trig_edge0[0] |= channelbit;
 415                                 cfg->trig_edge1[0] |= channelbit;
 416                         } else if (match->match == SR_TRIGGER_EDGE) {
 417                                 cfg->trig_edge0[0] |= channelbit;
 418                                 cfg->trig_edge1[0] |= channelbit;
 419                         }
 420                 }
 421         }
 422
 423         cfg->trig_glb |= num_trigger_stages;
 424 }
 425
 426 static int fpga_configure(const struct sr_dev_inst *sdi)
 427 {
 428         struct dev_context *devc;
 429         struct sr_usb_dev_inst *usb;
 430         uint8_t c[3];
 431         struct fpga_config cfg;
 432         uint16_t v16;
 433         uint32_t v32;
 434         int transferred, len, ret;
 435
 436         sr_dbg("Configuring FPGA.");
 437
 438         usb = sdi->conn;
 439         devc = sdi->priv;
 440
 441         WL32(&cfg.sync, DS_CFG_START);
 442         WL16(&cfg.mode_header, DS_CFG_MODE);
 443         WL16(&cfg.divider_header, DS_CFG_DIVIDER);
 444         WL16(&cfg.count_header, DS_CFG_COUNT);
 445         WL16(&cfg.trig_pos_header, DS_CFG_TRIG_POS);
 446         WL16(&cfg.trig_glb_header, DS_CFG_TRIG_GLB);
 447         WL16(&cfg.ch_en_header, DS_CFG_CH_EN);
 448         WL16(&cfg.trig_header, DS_CFG_TRIG);
 449         WL32(&cfg.end_sync, DS_CFG_END);
 450
 451         /* Pass in the length of a fixed-size struct. Really. */
 452         len = sizeof(struct fpga_config) / 2;
 453         c[0] = len & 0xff;
 454         c[1] = (len >> 8) & 0xff;
 455         c[2] = (len >> 16) & 0xff;
 456
 457         ret = libusb_control_transfer(usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR |
 458                         LIBUSB_ENDPOINT_OUT, DS_CMD_SETTING, 0x0000, 0x0000,
 459                         c, sizeof(c), USB_TIMEOUT);
 460         if (ret < 0) {
 461                 sr_err("Failed to send FPGA configure command: %s.",
 462                         libusb_error_name(ret));
 463                 return SR_ERR;
 464         }
 465
 466         v16 = 0x0000;
 467
 468         if (devc->mode == DS_OP_INTERNAL_TEST)
 469                 v16 = DS_MODE_INT_TEST;
 470         else if (devc->mode == DS_OP_EXTERNAL_TEST)
 471                 v16 = DS_MODE_EXT_TEST;
 472         else if (devc->mode == DS_OP_LOOPBACK_TEST)
 473                 v16 = DS_MODE_LPB_TEST;
 474
 475         if (devc->cur_samplerate == DS_MAX_LOGIC_SAMPLERATE * 2)
 476                 v16 |= DS_MODE_HALF_MODE;
 477         else if (devc->cur_samplerate == DS_MAX_LOGIC_SAMPLERATE * 4)
 478                 v16 |= DS_MODE_QUAR_MODE;
 479
 480         if (devc->continuous_mode)
 481                 v16 |= DS_MODE_STREAM_MODE;
 482         if (devc->external_clock) {
 483                 v16 |= DS_MODE_CLK_TYPE;
 484                 if (devc->clock_edge == DS_EDGE_FALLING)
 485                         v16 |= DS_MODE_CLK_EDGE;
 486         }
 487         if (devc->limit_samples > DS_MAX_LOGIC_DEPTH *
 488                 ceil(devc->cur_samplerate * 1.0 / DS_MAX_LOGIC_SAMPLERATE)
 489                 && !devc->continuous_mode) {
 490                 /* Enable RLE for long captures.
 491                  * Without this, captured data present errors.
 492                  */
 493                 v16 |= DS_MODE_RLE_MODE;
 494         }
 495
 496         WL16(&cfg.mode, v16);
 497         v32 = ceil(DS_MAX_LOGIC_SAMPLERATE * 1.0 / devc->cur_samplerate);
 498         WL32(&cfg.divider, v32);
 499
 500         /* Number of 16-sample units. */
 501         WL32(&cfg.count, devc->limit_samples / 16);
 502
 503         set_trigger(sdi, &cfg);
 504
 505         len = sizeof(struct fpga_config);
 506         ret = libusb_bulk_transfer(usb->devhdl, 2 | LIBUSB_ENDPOINT_OUT,
 507                         (unsigned char *)&cfg, len, &transferred, USB_TIMEOUT);
 508         if (ret < 0 || transferred != len) {
 509                 sr_err("Failed to send FPGA configuration: %s.", libusb_error_name(ret));
 510                 return SR_ERR;
 511         }
 512
 513         return SR_OK;
 514 }
 515
 516 SR_PRIV int dslogic_set_voltage_threshold(const struct sr_dev_inst *sdi, double threshold)
 517 {
 518         int ret;
 519         struct dev_context *const devc = sdi->priv;
 520         const struct sr_usb_dev_inst *const usb = sdi->conn;
 521         const uint8_t value = (threshold / 5.0) * 255;
 522         const uint16_t cmd = value | (DS_ADDR_VTH << 8);
 523
 524         /* Send the control command. */
 525         ret = libusb_control_transfer(usb->devhdl,
 526                         LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_ENDPOINT_OUT,
 527                         DS_CMD_WR_REG, 0x0000, 0x0000,
 528                         (unsigned char *)&cmd, sizeof(cmd), 3000);
 529         if (ret < 0) {
 530                 sr_err("Unable to set voltage-threshold register: %s.",
 531                 libusb_error_name(ret));
 532                 return SR_ERR;
 533         }
 534
 535         devc->cur_threshold = threshold;
 536
 537         return SR_OK;
 538 }
 539
 540 SR_PRIV int dslogic_dev_open(struct sr_dev_inst *sdi, struct sr_dev_driver *di)
 541 {
 542         libusb_device **devlist;
 543         struct sr_usb_dev_inst *usb;
 544         struct libusb_device_descriptor des;
 545         struct dev_context *devc;
 546         struct drv_context *drvc;
 547         struct version_info vi;
 548         int ret = SR_ERR, i, device_count;
 549         uint8_t revid;
 550         char connection_id[64];
 551
 552         drvc = di->context;
 553         devc = sdi->priv;
 554         usb = sdi->conn;
 555
 556         device_count = libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
 557         if (device_count < 0) {
 558                 sr_err("Failed to get device list: %s.",
 559                        libusb_error_name(device_count));
 560                 return SR_ERR;
 561         }
 562
 563         for (i = 0; i < device_count; i++) {
 564                 libusb_get_device_descriptor(devlist[i], &des);
 565
 566                 if (des.idVendor != devc->profile->vid
 567                     || des.idProduct != devc->profile->pid)
 568                         continue;
 569
 570                 if ((sdi->status == SR_ST_INITIALIZING) ||
 571                                 (sdi->status == SR_ST_INACTIVE)) {
 572                         /* Check device by its physical USB bus/port address. */
 573                         usb_get_port_path(devlist[i], connection_id, sizeof(connection_id));
 574                         if (strcmp(sdi->connection_id, connection_id))
 575                                 /* This is not the one. */
 576                                 continue;
 577                 }
 578
 579                 if (!(ret = libusb_open(devlist[i], &usb->devhdl))) {
 580                         if (usb->address == 0xff)
 581                                 /*
 582                                  * First time we touch this device after FW
 583                                  * upload, so we don't know the address yet.
 584                                  */
 585                                 usb->address = libusb_get_device_address(devlist[i]);
 586                 } else {
 587                         sr_err("Failed to open device: %s.",
 588                                libusb_error_name(ret));
 589                         ret = SR_ERR;
 590                         break;
 591                 }
 592
 593                 if (libusb_has_capability(LIBUSB_CAP_SUPPORTS_DETACH_KERNEL_DRIVER)) {
 594                         if (libusb_kernel_driver_active(usb->devhdl, USB_INTERFACE) == 1) {
 595                                 if ((ret = libusb_detach_kernel_driver(usb->devhdl, USB_INTERFACE)) < 0) {
 596                                         sr_err("Failed to detach kernel driver: %s.",
 597                                                 libusb_error_name(ret));
 598                                         ret = SR_ERR;
 599                                         break;
 600                                 }
 601                         }
 602                 }
 603
 604                 ret = command_get_fw_version(usb->devhdl, &vi);
 605                 if (ret != SR_OK) {
 606                         sr_err("Failed to get firmware version.");
 607                         break;
 608                 }
 609
 610                 ret = command_get_revid_version(sdi, &revid);
 611                 if (ret != SR_OK) {
 612                         sr_err("Failed to get REVID.");
 613                         break;
 614                 }
 615
 616                 /*
 617                  * Changes in major version mean incompatible/API changes, so
 618                  * bail out if we encounter an incompatible version.
 619                  * Different minor versions are OK, they should be compatible.
 620                  */
 621                 if (vi.major != DSLOGIC_REQUIRED_VERSION_MAJOR) {
 622                         sr_err("Expected firmware version %d.x, "
 623                                "got %d.%d.", DSLOGIC_REQUIRED_VERSION_MAJOR,
 624                                vi.major, vi.minor);
 625                         ret = SR_ERR;
 626                         break;
 627                 }
 628
 629                 sr_info("Opened device on %d.%d (logical) / %s (physical), "
 630                         "interface %d, firmware %d.%d.",
 631                         usb->bus, usb->address, connection_id,
 632                         USB_INTERFACE, vi.major, vi.minor);
 633
 634                 sr_info("Detected REVID=%d, it's a Cypress CY7C68013%s.",
 635                         revid, (revid != 1) ? " (FX2)" : "A (FX2LP)");
 636
 637                 ret = SR_OK;
 638
 639                 break;
 640         }
 641
 642         libusb_free_device_list(devlist, 1);
 643
 644         return ret;
 645 }
 646
 647 SR_PRIV struct dev_context *dslogic_dev_new(void)
 648 {
 649         struct dev_context *devc;
 650
 651         devc = g_malloc0(sizeof(struct dev_context));
 652         devc->profile = NULL;
 653         devc->fw_updated = 0;
 654         devc->cur_samplerate = 0;
 655         devc->limit_samples = 0;
 656         devc->capture_ratio = 0;
 657         devc->continuous_mode = FALSE;
 658         devc->clock_edge = DS_EDGE_RISING;
 659
 660         return devc;
 661 }
 662
 663 static void abort_acquisition(struct dev_context *devc)
 664 {
 665         int i;
 666
 667         devc->acq_aborted = TRUE;
 668
 669         for (i = devc->num_transfers - 1; i >= 0; i--) {
 670                 if (devc->transfers[i])
 671                         libusb_cancel_transfer(devc->transfers[i]);
 672         }
 673 }
 674
 675 static void finish_acquisition(struct sr_dev_inst *sdi)
 676 {
 677         struct dev_context *devc;
 678
 679         devc = sdi->priv;
 680
 681         std_session_send_df_end(sdi);
 682
 683         usb_source_remove(sdi->session, devc->ctx);
 684
 685         devc->num_transfers = 0;
 686         g_free(devc->transfers);
 687         g_free(devc->deinterleave_buffer);
 688 }
 689
 690 static void free_transfer(struct libusb_transfer *transfer)
 691 {
 692         struct sr_dev_inst *sdi;
 693         struct dev_context *devc;
 694         unsigned int i;
 695
 696         sdi = transfer->user_data;
 697         devc = sdi->priv;
 698
 699         g_free(transfer->buffer);
 700         transfer->buffer = NULL;
 701         libusb_free_transfer(transfer);
 702
 703         for (i = 0; i < devc->num_transfers; i++) {
 704                 if (devc->transfers[i] == transfer) {
 705                         devc->transfers[i] = NULL;
 706                         break;
 707                 }
 708         }
 709
 710         devc->submitted_transfers--;
 711         if (devc->submitted_transfers == 0)
 712                 finish_acquisition(sdi);
 713 }
 714
 715 static void resubmit_transfer(struct libusb_transfer *transfer)
 716 {
 717         int ret;
 718
 719         if ((ret = libusb_submit_transfer(transfer)) == LIBUSB_SUCCESS)
 720                 return;
 721
 722         sr_err("%s: %s", __func__, libusb_error_name(ret));
 723         free_transfer(transfer);
 724
 725 }
 726
 727 static void deinterleave_buffer(const uint8_t *src, size_t length,
 728         uint16_t *dst_ptr, size_t channel_count, uint16_t channel_mask)
 729 {
 730         uint16_t sample;
 731
 732         for (const uint64_t *src_ptr = (uint64_t*)src;
 733                 src_ptr < (uint64_t*)(src + length);
 734                 src_ptr += channel_count) {
 735                 for (int bit = 0; bit != 64; bit++) {
 736                         const uint64_t *word_ptr = src_ptr;
 737                         sample = 0;
 738                         for (size_t channel = 0; channel != channel_count;
 739                                 channel++) {
 740                                 if ((channel_mask & (1 << channel)) &&
 741                                         (*word_ptr++ & (1ULL << bit)))
 742                                         sample |= 1 << channel;
 743                         }
 744                         *dst_ptr++ = sample;
 745                 }
 746         }
 747 }
 748
 749 static void send_data(struct sr_dev_inst *sdi,
 750         uint16_t *data, size_t sample_count)
 751 {
 752         const struct sr_datafeed_logic logic = {
 753                 .length = sample_count * sizeof(uint16_t),
 754                 .unitsize = sizeof(uint16_t),
 755                 .data = data
 756         };
 757
 758         const struct sr_datafeed_packet packet = {
 759                 .type = SR_DF_LOGIC,
 760                 .payload = &logic
 761         };
 762
 763         sr_session_send(sdi, &packet);
 764 }
 765
 766 static void LIBUSB_CALL receive_transfer(struct libusb_transfer *transfer)
 767 {
 768         struct sr_dev_inst *const sdi = transfer->user_data;
 769         struct dev_context *const devc = sdi->priv;
 770         const size_t channel_count = enabled_channel_count(sdi);
 771         const uint16_t channel_mask = enabled_channel_mask(sdi);
 772         const unsigned int cur_sample_count = DSLOGIC_ATOMIC_SAMPLES *
 773                 transfer->actual_length /
 774                 (DSLOGIC_ATOMIC_BYTES * channel_count);
 775
 776         gboolean packet_has_error = FALSE;
 777         struct sr_datafeed_packet packet;
 778         unsigned int num_samples;
 779         int trigger_offset;
 780
 781         /*
 782          * If acquisition has already ended, just free any queued up
 783          * transfer that come in.
 784          */
 785         if (devc->acq_aborted) {
 786                 free_transfer(transfer);
 787                 return;
 788         }
 789
 790         sr_dbg("receive_transfer(): status %s received %d bytes.",
 791                 libusb_error_name(transfer->status), transfer->actual_length);
 792
 793         /* Save incoming transfer before reusing the transfer struct. */
 794
 795         switch (transfer->status) {
 796         case LIBUSB_TRANSFER_NO_DEVICE:
 797                 abort_acquisition(devc);
 798                 free_transfer(transfer);
 799                 return;
 800         case LIBUSB_TRANSFER_COMPLETED:
 801         case LIBUSB_TRANSFER_TIMED_OUT: /* We may have received some data though. */
 802                 break;
 803         default:
 804                 packet_has_error = TRUE;
 805                 break;
 806         }
 807
 808         if (transfer->actual_length == 0 || packet_has_error) {
 809                 devc->empty_transfer_count++;
 810                 if (devc->empty_transfer_count > MAX_EMPTY_TRANSFERS) {
 811                         /*
 812                          * The FX2 gave up. End the acquisition, the frontend
 813                          * will work out that the samplecount is short.
 814                          */
 815                         abort_acquisition(devc);
 816                         free_transfer(transfer);
 817                 } else {
 818                         resubmit_transfer(transfer);
 819                 }
 820                 return;
 821         } else {
 822                 devc->empty_transfer_count = 0;
 823         }
 824
 825         if (!devc->limit_samples || devc->sent_samples < devc->limit_samples) {
 826                 if (devc->limit_samples && devc->sent_samples + cur_sample_count > devc->limit_samples)
 827                         num_samples = devc->limit_samples - devc->sent_samples;
 828                 else
 829                         num_samples = cur_sample_count;
 830
 831                 /**
 832                  * The DSLogic emits sample data as sequences of 64-bit sample words
 833                  * in a round-robin i.e. 64-bits from channel 0, 64-bits from channel 1
 834                  * etc. for each of the enabled channels, then looping back to the
 835                  * channel.
 836                  *
 837                  * Because sigrok's internal representation is bit-interleaved channels
 838                  * we must recast the data.
 839                  *
 840                  * Hopefully in future it will be possible to pass the data on as-is.
 841                  */
 842                 if (transfer->actual_length % (DSLOGIC_ATOMIC_BYTES * channel_count) != 0)
 843                         sr_err("Invalid transfer length!");
 844                 deinterleave_buffer(transfer->buffer, transfer->actual_length,
 845                         devc->deinterleave_buffer, channel_count, channel_mask);
 846
 847                 /* Send the incoming transfer to the session bus. */
 848                 if (devc->trigger_pos > devc->sent_samples
 849                         && devc->trigger_pos <= devc->sent_samples + num_samples) {
 850                         /* DSLogic trigger in this block. Send trigger position. */
 851                         trigger_offset = devc->trigger_pos - devc->sent_samples;
 852                         /* Pre-trigger samples. */
 853                         send_data(sdi, devc->deinterleave_buffer, trigger_offset);
 854                         devc->sent_samples += trigger_offset;
 855                         /* Trigger position. */
 856                         devc->trigger_pos = 0;
 857                         packet.type = SR_DF_TRIGGER;
 858                         packet.payload = NULL;
 859                         sr_session_send(sdi, &packet);
 860                         /* Post trigger samples. */
 861                         num_samples -= trigger_offset;
 862                         send_data(sdi, devc->deinterleave_buffer
 863                                 + trigger_offset, num_samples);
 864                         devc->sent_samples += num_samples;
 865                 } else {
 866                         send_data(sdi, devc->deinterleave_buffer, num_samples);
 867                         devc->sent_samples += num_samples;
 868                 }
 869         }
 870
 871         if (devc->limit_samples && devc->sent_samples >= devc->limit_samples) {
 872                 abort_acquisition(devc);
 873                 free_transfer(transfer);
 874         } else
 875                 resubmit_transfer(transfer);
 876 }
 877
 878 static int receive_data(int fd, int revents, void *cb_data)
 879 {
 880         struct timeval tv;
 881         struct drv_context *drvc;
 882
 883         (void)fd;
 884         (void)revents;
 885
 886         drvc = (struct drv_context *)cb_data;
 887
 888         tv.tv_sec = tv.tv_usec = 0;
 889         libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
 890
 891         return TRUE;
 892 }
 893
 894 static size_t to_bytes_per_ms(const struct sr_dev_inst *sdi)
 895 {
 896         const struct dev_context *const devc = sdi->priv;
 897         const size_t ch_count = enabled_channel_count(sdi);
 898
 899         if (devc->continuous_mode)
 900                 return (devc->cur_samplerate * ch_count) / (1000 * 8);
 901
 902
 903         /* If we're in buffered mode, the transfer rate is not so important,
 904          * but we expect to get at least 10% of the high-speed USB bandwidth.
 905          */
 906         return 35000000 / (1000 * 10);
 907 }
 908
 909 static size_t get_buffer_size(const struct sr_dev_inst *sdi)
 910 {
 911         /*
 912          * The buffer should be large enough to hold 10ms of data and
 913          * a multiple of the size of a data atom.
 914          */
 915         const size_t block_size = enabled_channel_count(sdi) * 512;
 916         const size_t s = 10 * to_bytes_per_ms(sdi);
 917         return ((s + block_size - 1) / block_size) * block_size;
 918 }
 919
 920 static unsigned int get_number_of_transfers(const struct sr_dev_inst *sdi)
 921 {
 922         /* Total buffer size should be able to hold about 100ms of data. */
 923         const unsigned int s = get_buffer_size(sdi);
 924         const unsigned int n = (100 * to_bytes_per_ms(sdi) + s - 1) / s;
 925         return (n > NUM_SIMUL_TRANSFERS) ? NUM_SIMUL_TRANSFERS : n;
 926 }
 927
 928 static unsigned int get_timeout(const struct sr_dev_inst *sdi)
 929 {
 930         const size_t total_size = get_buffer_size(sdi) *
 931                 get_number_of_transfers(sdi);
 932         const unsigned int timeout = total_size / to_bytes_per_ms(sdi);
 933         return timeout + timeout / 4; /* Leave a headroom of 25% percent. */
 934 }
 935
 936 static int start_transfers(const struct sr_dev_inst *sdi)
 937 {
 938         const size_t channel_count = enabled_channel_count(sdi);
 939         const size_t size = get_buffer_size(sdi);
 940         const unsigned int num_transfers = get_number_of_transfers(sdi);
 941         const unsigned int timeout = get_timeout(sdi);
 942
 943         struct dev_context *devc;
 944         struct sr_usb_dev_inst *usb;
 945         struct libusb_transfer *transfer;
 946         unsigned int i;
 947         int ret;
 948         unsigned char *buf;
 949
 950         devc = sdi->priv;
 951         usb = sdi->conn;
 952
 953         devc->sent_samples = 0;
 954         devc->acq_aborted = FALSE;
 955         devc->empty_transfer_count = 0;
 956         devc->submitted_transfers = 0;
 957
 958         g_free(devc->transfers);
 959         devc->transfers = g_try_malloc0(sizeof(*devc->transfers) * num_transfers);
 960         if (!devc->transfers) {
 961                 sr_err("USB transfers malloc failed.");
 962                 return SR_ERR_MALLOC;
 963         }
 964
 965         devc->deinterleave_buffer = g_try_malloc(DSLOGIC_ATOMIC_SAMPLES *
 966                 (size / (channel_count * DSLOGIC_ATOMIC_BYTES)) * sizeof(uint16_t));
 967         if (!devc->deinterleave_buffer) {
 968                 sr_err("Deinterleave buffer malloc failed.");
 969                 g_free(devc->deinterleave_buffer);
 970                 return SR_ERR_MALLOC;
 971         }
 972
 973         devc->num_transfers = num_transfers;
 974         for (i = 0; i < num_transfers; i++) {
 975                 if (!(buf = g_try_malloc(size))) {
 976                         sr_err("USB transfer buffer malloc failed.");
 977                         return SR_ERR_MALLOC;
 978                 }
 979                 transfer = libusb_alloc_transfer(0);
 980                 libusb_fill_bulk_transfer(transfer, usb->devhdl,
 981                                 6 | LIBUSB_ENDPOINT_IN, buf, size,
 982                                 receive_transfer, (void *)sdi, timeout);
 983                 sr_info("submitting transfer: %d", i);
 984                 if ((ret = libusb_submit_transfer(transfer)) != 0) {
 985                         sr_err("Failed to submit transfer: %s.",
 986                                libusb_error_name(ret));
 987                         libusb_free_transfer(transfer);
 988                         g_free(buf);
 989                         abort_acquisition(devc);
 990                         return SR_ERR;
 991                 }
 992                 devc->transfers[i] = transfer;
 993                 devc->submitted_transfers++;
 994         }
 995
 996         std_session_send_df_header(sdi);
 997
 998         return SR_OK;
 999 }
1000
1001 static void LIBUSB_CALL trigger_receive(struct libusb_transfer *transfer)
1002 {
1003         const struct sr_dev_inst *sdi;
1004         struct dslogic_trigger_pos *tpos;
1005         struct dev_context *devc;
1006
1007         sdi = transfer->user_data;
1008         devc = sdi->priv;
1009         if (transfer->status == LIBUSB_TRANSFER_CANCELLED) {
1010                 sr_dbg("Trigger transfer canceled.");
1011                 /* Terminate session. */
1012                 std_session_send_df_end(sdi);
1013                 usb_source_remove(sdi->session, devc->ctx);
1014                 devc->num_transfers = 0;
1015                 g_free(devc->transfers);
1016         } else if (transfer->status == LIBUSB_TRANSFER_COMPLETED
1017                         && transfer->actual_length == sizeof(struct dslogic_trigger_pos)) {
1018                 tpos = (struct dslogic_trigger_pos *)transfer->buffer;
1019                 sr_info("tpos real_pos %d ram_saddr %d cnt %d", tpos->real_pos,
1020                         tpos->ram_saddr, tpos->remain_cnt);
1021                 devc->trigger_pos = tpos->real_pos;
1022                 g_free(tpos);
1023                 start_transfers(sdi);
1024         }
1025         libusb_free_transfer(transfer);
1026 }
1027
1028 SR_PRIV int dslogic_acquisition_start(const struct sr_dev_inst *sdi)
1029 {
1030         const unsigned int timeout = get_timeout(sdi);
1031
1032         struct sr_dev_driver *di;
1033         struct drv_context *drvc;
1034         struct dev_context *devc;
1035         struct sr_usb_dev_inst *usb;
1036         struct dslogic_trigger_pos *tpos;
1037         struct libusb_transfer *transfer;
1038         int ret;
1039
1040         di = sdi->driver;
1041         drvc = di->context;
1042         devc = sdi->priv;
1043         usb = sdi->conn;
1044
1045         devc->ctx = drvc->sr_ctx;
1046         devc->sent_samples = 0;
1047         devc->empty_transfer_count = 0;
1048         devc->acq_aborted = FALSE;
1049
1050         usb_source_add(sdi->session, devc->ctx, timeout, receive_data, drvc);
1051
1052         if ((ret = command_stop_acquisition(sdi)) != SR_OK)
1053                 return ret;
1054
1055         if ((ret = fpga_configure(sdi)) != SR_OK)
1056                 return ret;
1057
1058         if ((ret = command_start_acquisition(sdi)) != SR_OK)
1059                 return ret;
1060
1061         sr_dbg("Getting trigger.");
1062         tpos = g_malloc(sizeof(struct dslogic_trigger_pos));
1063         transfer = libusb_alloc_transfer(0);
1064         libusb_fill_bulk_transfer(transfer, usb->devhdl, 6 | LIBUSB_ENDPOINT_IN,
1065                         (unsigned char *)tpos, sizeof(struct dslogic_trigger_pos),
1066                         trigger_receive, (void *)sdi, 0);
1067         if ((ret = libusb_submit_transfer(transfer)) < 0) {
1068                 sr_err("Failed to request trigger: %s.", libusb_error_name(ret));
1069                 libusb_free_transfer(transfer);
1070                 g_free(tpos);
1071                 return SR_ERR;
1072         }
1073
1074         devc->transfers = g_try_malloc0(sizeof(*devc->transfers));
1075         if (!devc->transfers) {
1076                 sr_err("USB trigger_pos transfer malloc failed.");
1077                 return SR_ERR_MALLOC;
1078         }
1079         devc->num_transfers = 1;
1080         devc->submitted_transfers++;
1081         devc->transfers[0] = transfer;
1082
1083         return ret;
1084 }
1085
1086 SR_PRIV int dslogic_acquisition_stop(struct sr_dev_inst *sdi)
1087 {
1088         command_stop_acquisition(sdi);
1089         abort_acquisition(sdi->priv);
1090         return SR_OK;
1091 }