2 * This file is part of the libsigrok project.
4 * Copyright (C) 2023 Gerhard Sittig <gerhard.sittig@gmx.net>
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #ifndef LIBSIGROK_HARDWARE_DEVANTECH_ETH008_PROTOCOL_H
21 #define LIBSIGROK_HARDWARE_DEVANTECH_ETH008_PROTOCOL_H
24 #include <libsigrok/libsigrok.h>
27 #include "libsigrok-internal.h"
29 #define LOG_PREFIX "devantech-eth008"
32 * Models have differing capabilities, and slightly different protocol
33 * variants. Setting the output state of individual relays usually takes
34 * one byte which carries the channel number. Requests are of identical
35 * length. Getting relay state takes a variable number of bytes to carry
36 * the bit fields. Response length depends on the model's relay count.
37 * As does request length for setting the state of several relays at the
38 * same time. Some models have gaps in their relay channel numbers
39 * (ETH484 misses R5..R8).
41 * ETH484 also has 8 digital inputs, and 4 analog inputs. Features
42 * beyond relay output are untested in this implementation.
44 * Vendor's support code for ETH8020 suggests that it has 8 digital
45 * inputs and 8 analog inputs. But that digital input supporting code
46 * could never have worked, probably wasn't tested.
48 * Digital inputs and analog inputs appear to share I/O pins. Users can
49 * read these pins either in terms of an ADC value, or can interpret
50 * them as raw digital input. While not all models with digital inputs
51 * seem to provide all of them in analog form. DI and AI channel counts
52 * may differ depending on the model.
54 struct devantech_eth008_model {
62 uint32_t mask_do_missing;
65 enum devantech_eth008_channel_type {
72 struct channel_group_context {
75 enum devantech_eth008_channel_type ch_type;
79 uint8_t model_code, hardware_version, firmware_version;
80 const struct devantech_eth008_model *model;
86 SR_PRIV int devantech_eth008_get_model(struct sr_serial_dev_inst *serial,
87 uint8_t *model_code, uint8_t *hw_version, uint8_t *fw_version);
88 SR_PRIV int devantech_eth008_get_serno(struct sr_serial_dev_inst *serial,
89 char *text_buffer, size_t text_length);
90 SR_PRIV int devantech_eth008_cache_state(const struct sr_dev_inst *sdi);
91 SR_PRIV int devantech_eth008_query_do(const struct sr_dev_inst *sdi,
92 const struct sr_channel_group *cg, gboolean *on);
93 SR_PRIV int devantech_eth008_setup_do(const struct sr_dev_inst *sdi,
94 const struct sr_channel_group *cg, gboolean on);
95 SR_PRIV int devantech_eth008_query_di(const struct sr_dev_inst *sdi,
96 const struct sr_channel_group *cg, gboolean *on);
97 SR_PRIV int devantech_eth008_query_ai(const struct sr_dev_inst *sdi,
98 const struct sr_channel_group *cg, uint16_t *adc_value);
99 SR_PRIV int devantech_eth008_query_supply(const struct sr_dev_inst *sdi,
100 const struct sr_channel_group *cg, uint16_t *millivolts);