src/hardware/asix-sigma/api.c

   1 /*
   2  * This file is part of the libsigrok project.
   3  *
   4  * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
   5  * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
   6  * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
   7  * Copyright (C) 2020 Gerhard Sittig <gerhard.sittig@gmx.net>
   8  *
   9  * This program is free software: you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation, either version 3 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  21  */
  22
  23 #include <config.h>
  24 #include "protocol.h"
  25
  26 /*
  27  * Channels are labelled 1-16, see this vendor's image of the cable:
  28  * http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg (TI/TO are
  29  * additional trigger in/out signals).
  30  */
  31 static const char *channel_names[] = {
  32         "1", "2", "3", "4", "5", "6", "7", "8",
  33         "9", "10", "11", "12", "13", "14", "15", "16",
  34 };
  35
  36 static const uint32_t scanopts[] = {
  37         SR_CONF_CONN,
  38 };
  39
  40 static const uint32_t drvopts[] = {
  41         SR_CONF_LOGIC_ANALYZER,
  42 };
  43
  44 static const uint32_t devopts[] = {
  45         SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
  46         SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
  47         SR_CONF_CONN | SR_CONF_GET,
  48         SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  49         SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET,
  50         SR_CONF_EXTERNAL_CLOCK_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  51         SR_CONF_CLOCK_EDGE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  52         SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
  53         SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
  54 };
  55
  56 static const char *ext_clock_edges[] = {
  57         [SIGMA_CLOCK_EDGE_RISING] = "rising",
  58         [SIGMA_CLOCK_EDGE_FALLING] = "falling",
  59         [SIGMA_CLOCK_EDGE_EITHER] = "either",
  60 };
  61
  62 static const int32_t trigger_matches[] = {
  63         SR_TRIGGER_ZERO,
  64         SR_TRIGGER_ONE,
  65         SR_TRIGGER_RISING,
  66         SR_TRIGGER_FALLING,
  67 };
  68
  69 static void clear_helper(struct dev_context *devc)
  70 {
  71         (void)sigma_force_close(devc);
  72 }
  73
  74 static int dev_clear(const struct sr_dev_driver *di)
  75 {
  76         return std_dev_clear_with_callback(di,
  77                 (std_dev_clear_callback)clear_helper);
  78 }
  79
  80 static gboolean bus_addr_in_devices(int bus, int addr, GSList *devs)
  81 {
  82         struct sr_usb_dev_inst *usb;
  83
  84         for (/* EMPTY */; devs; devs = devs->next) {
  85                 usb = devs->data;
  86                 if (usb->bus == bus && usb->address == addr)
  87                         return TRUE;
  88         }
  89
  90         return FALSE;
  91 }
  92
  93 static gboolean known_vid_pid(const struct libusb_device_descriptor *des)
  94 {
  95         gboolean is_sigma, is_omega;
  96
  97         if (des->idVendor != USB_VENDOR_ASIX)
  98                 return FALSE;
  99         is_sigma = des->idProduct == USB_PRODUCT_SIGMA;
 100         is_omega = des->idProduct == USB_PRODUCT_OMEGA;
 101         if (!is_sigma && !is_omega)
 102                 return FALSE;
 103         return TRUE;
 104 }
 105
 106 static GSList *scan(struct sr_dev_driver *di, GSList *options)
 107 {
 108         struct drv_context *drvc;
 109         libusb_context *usbctx;
 110         const char *conn;
 111         GSList *l, *conn_devices;
 112         struct sr_config *src;
 113         GSList *devices;
 114         libusb_device **devlist, *devitem;
 115         int bus, addr;
 116         struct libusb_device_descriptor des;
 117         struct libusb_device_handle *hdl;
 118         int ret;
 119         char conn_id[20];
 120         char serno_txt[16];
 121         char *end;
 122         long serno_num, serno_pre;
 123         enum asix_device_type dev_type;
 124         const char *dev_text;
 125         struct sr_dev_inst *sdi;
 126         struct dev_context *devc;
 127         size_t devidx, chidx;
 128
 129         drvc = di->context;
 130         usbctx = drvc->sr_ctx->libusb_ctx;
 131
 132         /* Find all devices which match an (optional) conn= spec. */
 133         conn = NULL;
 134         for (l = options; l; l = l->next) {
 135                 src = l->data;
 136                 switch (src->key) {
 137                 case SR_CONF_CONN:
 138                         conn = g_variant_get_string(src->data, NULL);
 139                         break;
 140                 }
 141         }
 142         conn_devices = NULL;
 143         if (conn)
 144                 conn_devices = sr_usb_find(usbctx, conn);
 145         if (conn && !conn_devices)
 146                 return NULL;
 147
 148         /* Find all ASIX logic analyzers (which match the connection spec). */
 149         devices = NULL;
 150         libusb_get_device_list(usbctx, &devlist);
 151         for (devidx = 0; devlist[devidx]; devidx++) {
 152                 devitem = devlist[devidx];
 153
 154                 /* Check for connection match if a user spec was given. */
 155                 bus = libusb_get_bus_number(devitem);
 156                 addr = libusb_get_device_address(devitem);
 157                 if (conn && !bus_addr_in_devices(bus, addr, conn_devices))
 158                         continue;
 159                 snprintf(conn_id, sizeof(conn_id), "%d.%d", bus, addr);
 160
 161                 /*
 162                  * Check for known VID:PID pairs. Get the serial number,
 163                  * to then derive the device type from it.
 164                  */
 165                 libusb_get_device_descriptor(devitem, &des);
 166                 if (!known_vid_pid(&des))
 167                         continue;
 168                 if (!des.iSerialNumber) {
 169                         sr_warn("Cannot get serial number (index 0).");
 170                         continue;
 171                 }
 172                 ret = libusb_open(devitem, &hdl);
 173                 if (ret < 0) {
 174                         sr_warn("Cannot open USB device %04x.%04x: %s.",
 175                                 des.idVendor, des.idProduct,
 176                                 libusb_error_name(ret));
 177                         continue;
 178                 }
 179                 ret = libusb_get_string_descriptor_ascii(hdl,
 180                         des.iSerialNumber,
 181                         (unsigned char *)serno_txt, sizeof(serno_txt));
 182                 if (ret < 0) {
 183                         sr_warn("Cannot get serial number (%s).",
 184                                 libusb_error_name(ret));
 185                         libusb_close(hdl);
 186                         continue;
 187                 }
 188                 libusb_close(hdl);
 189
 190                 /*
 191                  * All ASIX logic analyzers have a serial number, which
 192                  * reads as a hex number, and tells the device type.
 193                  */
 194                 ret = sr_atol_base(serno_txt, &serno_num, &end, 16);
 195                 if (ret != SR_OK || !end || *end) {
 196                         sr_warn("Cannot interpret serial number %s.", serno_txt);
 197                         continue;
 198                 }
 199                 dev_type = ASIX_TYPE_NONE;
 200                 dev_text = NULL;
 201                 serno_pre = serno_num >> 16;
 202                 switch (serno_pre) {
 203                 case 0xa601:
 204                         dev_type = ASIX_TYPE_SIGMA;
 205                         dev_text = "SIGMA";
 206                         sr_info("Found SIGMA, serno %s.", serno_txt);
 207                         break;
 208                 case 0xa602:
 209                         dev_type = ASIX_TYPE_SIGMA;
 210                         dev_text = "SIGMA2";
 211                         sr_info("Found SIGMA2, serno %s.", serno_txt);
 212                         break;
 213                 case 0xa603:
 214                         dev_type = ASIX_TYPE_OMEGA;
 215                         dev_text = "OMEGA";
 216                         sr_info("Found OMEGA, serno %s.", serno_txt);
 217                         if (!ASIX_WITH_OMEGA) {
 218                                 sr_warn("OMEGA support is not implemented yet.");
 219                                 continue;
 220                         }
 221                         break;
 222                 default:
 223                         sr_warn("Unknown serno %s, skipping.", serno_txt);
 224                         continue;
 225                 }
 226
 227                 /* Create a device instance, add it to the result set. */
 228
 229                 sdi = g_malloc0(sizeof(*sdi));
 230                 devices = g_slist_append(devices, sdi);
 231                 sdi->status = SR_ST_INITIALIZING;
 232                 sdi->vendor = g_strdup("ASIX");
 233                 sdi->model = g_strdup(dev_text);
 234                 sdi->serial_num = g_strdup(serno_txt);
 235                 sdi->connection_id = g_strdup(conn_id);
 236                 for (chidx = 0; chidx < ARRAY_SIZE(channel_names); chidx++)
 237                         sr_channel_new(sdi, chidx, SR_CHANNEL_LOGIC,
 238                                 TRUE, channel_names[chidx]);
 239
 240                 devc = g_malloc0(sizeof(*devc));
 241                 sdi->priv = devc;
 242                 devc->id.vid = des.idVendor;
 243                 devc->id.pid = des.idProduct;
 244                 devc->id.serno = serno_num;
 245                 devc->id.prefix = serno_pre;
 246                 devc->id.type = dev_type;
 247                 sr_sw_limits_init(&devc->limit.config);
 248                 devc->capture_ratio = 50;
 249                 devc->use_triggers = FALSE;
 250
 251                 /* Get current hardware configuration (or use defaults). */
 252                 (void)sigma_fetch_hw_config(sdi);
 253         }
 254         libusb_free_device_list(devlist, 1);
 255         g_slist_free_full(conn_devices, (GDestroyNotify)sr_usb_dev_inst_free);
 256
 257         return std_scan_complete(di, devices);
 258 }
 259
 260 static int dev_open(struct sr_dev_inst *sdi)
 261 {
 262         struct dev_context *devc;
 263
 264         devc = sdi->priv;
 265
 266         if (devc->id.type == ASIX_TYPE_OMEGA && !ASIX_WITH_OMEGA) {
 267                 sr_err("OMEGA support is not implemented yet.");
 268                 return SR_ERR_NA;
 269         }
 270
 271         return sigma_force_open(sdi);
 272 }
 273
 274 static int dev_close(struct sr_dev_inst *sdi)
 275 {
 276         struct dev_context *devc;
 277
 278         devc = sdi->priv;
 279
 280         return sigma_force_close(devc);
 281 }
 282
 283 static int config_get(uint32_t key, GVariant **data,
 284         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
 285 {
 286         struct dev_context *devc;
 287         const char *clock_text;
 288
 289         (void)cg;
 290
 291         if (!sdi)
 292                 return SR_ERR;
 293         devc = sdi->priv;
 294
 295         switch (key) {
 296         case SR_CONF_CONN:
 297                 *data = g_variant_new_string(sdi->connection_id);
 298                 break;
 299         case SR_CONF_SAMPLERATE:
 300                 *data = g_variant_new_uint64(devc->clock.samplerate);
 301                 break;
 302         case SR_CONF_EXTERNAL_CLOCK:
 303                 *data = g_variant_new_boolean(devc->clock.use_ext_clock);
 304                 break;
 305         case SR_CONF_EXTERNAL_CLOCK_SOURCE:
 306                 clock_text = channel_names[devc->clock.clock_pin];
 307                 *data = g_variant_new_string(clock_text);
 308                 break;
 309         case SR_CONF_CLOCK_EDGE:
 310                 clock_text = ext_clock_edges[devc->clock.clock_edge];
 311                 *data = g_variant_new_string(clock_text);
 312                 break;
 313         case SR_CONF_LIMIT_MSEC:
 314         case SR_CONF_LIMIT_SAMPLES:
 315                 return sr_sw_limits_config_get(&devc->limit.config, key, data);
 316         case SR_CONF_CAPTURE_RATIO:
 317                 *data = g_variant_new_uint64(devc->capture_ratio);
 318                 break;
 319         default:
 320                 return SR_ERR_NA;
 321         }
 322
 323         return SR_OK;
 324 }
 325
 326 static int config_set(uint32_t key, GVariant *data,
 327         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
 328 {
 329         struct dev_context *devc;
 330         int ret;
 331         uint64_t want_rate, have_rate;
 332         int idx;
 333
 334         (void)cg;
 335
 336         devc = sdi->priv;
 337
 338         switch (key) {
 339         case SR_CONF_SAMPLERATE:
 340                 want_rate = g_variant_get_uint64(data);
 341                 ret = sigma_normalize_samplerate(want_rate, &have_rate);
 342                 if (ret != SR_OK)
 343                         return ret;
 344                 if (have_rate != want_rate) {
 345                         char *text_want, *text_have;
 346                         text_want = sr_samplerate_string(want_rate);
 347                         text_have = sr_samplerate_string(have_rate);
 348                         sr_info("Adjusted samplerate %s to %s.",
 349                                 text_want, text_have);
 350                         g_free(text_want);
 351                         g_free(text_have);
 352                 }
 353                 devc->clock.samplerate = have_rate;
 354                 break;
 355         case SR_CONF_EXTERNAL_CLOCK:
 356                 devc->clock.use_ext_clock = g_variant_get_boolean(data);
 357                 break;
 358         case SR_CONF_EXTERNAL_CLOCK_SOURCE:
 359                 idx = std_str_idx(data, ARRAY_AND_SIZE(channel_names));
 360                 if (idx < 0)
 361                         return SR_ERR_ARG;
 362                 devc->clock.clock_pin = idx;
 363                 break;
 364         case SR_CONF_CLOCK_EDGE:
 365                 idx = std_str_idx(data, ARRAY_AND_SIZE(ext_clock_edges));
 366                 if (idx < 0)
 367                         return SR_ERR_ARG;
 368                 devc->clock.clock_edge = idx;
 369                 break;
 370         case SR_CONF_LIMIT_MSEC:
 371         case SR_CONF_LIMIT_SAMPLES:
 372                 return sr_sw_limits_config_set(&devc->limit.config, key, data);
 373         case SR_CONF_CAPTURE_RATIO:
 374                 devc->capture_ratio = g_variant_get_uint64(data);
 375                 break;
 376         default:
 377                 return SR_ERR_NA;
 378         }
 379
 380         return SR_OK;
 381 }
 382
 383 static int config_list(uint32_t key, GVariant **data,
 384         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
 385 {
 386         switch (key) {
 387         case SR_CONF_SCAN_OPTIONS:
 388         case SR_CONF_DEVICE_OPTIONS:
 389                 if (cg)
 390                         return SR_ERR_NA;
 391                 return STD_CONFIG_LIST(key, data, sdi, cg,
 392                         scanopts, drvopts, devopts);
 393         case SR_CONF_SAMPLERATE:
 394                 *data = sigma_get_samplerates_list();
 395                 break;
 396         case SR_CONF_EXTERNAL_CLOCK_SOURCE:
 397                 *data = g_variant_new_strv(ARRAY_AND_SIZE(channel_names));
 398                 break;
 399         case SR_CONF_CLOCK_EDGE:
 400                 *data = g_variant_new_strv(ARRAY_AND_SIZE(ext_clock_edges));
 401                 break;
 402         case SR_CONF_TRIGGER_MATCH:
 403                 *data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches));
 404                 break;
 405         default:
 406                 return SR_ERR_NA;
 407         }
 408
 409         return SR_OK;
 410 }
 411
 412 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 413 {
 414         struct dev_context *devc;
 415         uint16_t pindis_mask;
 416         uint8_t async, div;
 417         int ret;
 418         size_t triggerpin;
 419         uint8_t trigsel2;
 420         struct triggerinout triggerinout_conf;
 421         struct triggerlut lut;
 422         uint8_t regval, cmd_bytes[4], *wrptr;
 423
 424         devc = sdi->priv;
 425
 426         /* Convert caller's trigger spec to driver's internal format. */
 427         ret = sigma_convert_trigger(sdi);
 428         if (ret != SR_OK) {
 429                 sr_err("Could not configure triggers.");
 430                 return ret;
 431         }
 432
 433         /*
 434          * Setup the device's samplerate from the value which up to now
 435          * just got checked and stored. As a byproduct this can pick and
 436          * send firmware to the device, reduce the number of available
 437          * logic channels, etc.
 438          *
 439          * Determine an acquisition timeout from optionally configured
 440          * sample count or time limits. Which depends on the samplerate.
 441          * Force 50MHz samplerate when external clock is in use.
 442          */
 443         if (devc->clock.use_ext_clock) {
 444                 if (devc->clock.samplerate != SR_MHZ(50))
 445                         sr_info("External clock, forcing 50MHz samplerate.");
 446                 devc->clock.samplerate = SR_MHZ(50);
 447         }
 448         ret = sigma_set_samplerate(sdi);
 449         if (ret != SR_OK)
 450                 return ret;
 451         ret = sigma_set_acquire_timeout(devc);
 452         if (ret != SR_OK)
 453                 return ret;
 454
 455         /* Enter trigger programming mode. */
 456         trigsel2 = TRGSEL2_RESET;
 457         ret = sigma_set_register(devc, WRITE_TRIGGER_SELECT2, trigsel2);
 458         if (ret != SR_OK)
 459                 return ret;
 460
 461         trigsel2 = 0;
 462         if (devc->clock.samplerate >= SR_MHZ(100)) {
 463                 /* 100 and 200 MHz mode. */
 464                 /* TODO Decipher the 0x81 magic number's purpose. */
 465                 ret = sigma_set_register(devc, WRITE_TRIGGER_SELECT2, 0x81);
 466                 if (ret != SR_OK)
 467                         return ret;
 468
 469                 /* Find which pin to trigger on from mask. */
 470                 for (triggerpin = 0; triggerpin < 8; triggerpin++) {
 471                         if (devc->trigger.risingmask & BIT(triggerpin))
 472                                 break;
 473                         if (devc->trigger.fallingmask & BIT(triggerpin))
 474                                 break;
 475                 }
 476
 477                 /* Set trigger pin and light LED on trigger. */
 478                 trigsel2 = triggerpin & TRGSEL2_PINS_MASK;
 479                 trigsel2 |= TRGSEL2_LEDSEL1;
 480
 481                 /* Default rising edge. */
 482                 /* TODO Documentation disagrees, bit set means _rising_ edge. */
 483                 if (devc->trigger.fallingmask)
 484                         trigsel2 |= TRGSEL2_PINPOL_RISE;
 485
 486         } else if (devc->clock.samplerate <= SR_MHZ(50)) {
 487                 /* 50MHz firmware modes. */
 488
 489                 /* Translate application specs to hardware perspective. */
 490                 ret = sigma_build_basic_trigger(devc, &lut);
 491                 if (ret != SR_OK)
 492                         return ret;
 493
 494                 /* Communicate resulting register values to the device. */
 495                 ret = sigma_write_trigger_lut(devc, &lut);
 496                 if (ret != SR_OK)
 497                         return ret;
 498
 499                 trigsel2 = TRGSEL2_LEDSEL1 | TRGSEL2_LEDSEL0;
 500         }
 501
 502         /* Setup trigger in and out pins to default values. */
 503         memset(&triggerinout_conf, 0, sizeof(triggerinout_conf));
 504         triggerinout_conf.trgout_bytrigger = TRUE;
 505         triggerinout_conf.trgout_enable = TRUE;
 506         /* TODO
 507          * Verify the correctness of this implementation. The previous
 508          * version used to assign to a C language struct with bit fields
 509          * which is highly non-portable and hard to guess the resulting
 510          * raw memory layout or wire transfer content. The C struct's
 511          * field names did not match the vendor documentation's names.
 512          * Which means that I could not verify "on paper" either. Let's
 513          * re-visit this code later during research for trigger support.
 514          */
 515         wrptr = cmd_bytes;
 516         regval = 0;
 517         if (triggerinout_conf.trgout_bytrigger)
 518                 regval |= TRGOPT_TRGOOUTEN;
 519         write_u8_inc(&wrptr, regval);
 520         regval &= ~TRGOPT_CLEAR_MASK;
 521         if (triggerinout_conf.trgout_enable)
 522                 regval |= TRGOPT_TRGOEN;
 523         write_u8_inc(&wrptr, regval);
 524         ret = sigma_write_register(devc, WRITE_TRIGGER_OPTION,
 525                 cmd_bytes, wrptr - cmd_bytes);
 526         if (ret != SR_OK)
 527                 return ret;
 528
 529         /* Leave trigger programming mode. */
 530         ret = sigma_set_register(devc, WRITE_TRIGGER_SELECT2, trigsel2);
 531         if (ret != SR_OK)
 532                 return ret;
 533
 534         /*
 535          * Samplerate dependent clock and channels configuration. Some
 536          * channels by design are not available at higher clock rates.
 537          * Register layout differs between firmware variants (depth 1
 538          * with LSB channel mask above 50MHz, depth 4 with more details
 539          * up to 50MHz).
 540          *
 541          * Derive a mask where bits are set for unavailable channels.
 542          * Either send the single byte, or the full byte sequence.
 543          */
 544         pindis_mask = ~BITS_MASK(devc->interp.num_channels);
 545         if (devc->clock.samplerate > SR_MHZ(50)) {
 546                 ret = sigma_set_register(devc, WRITE_CLOCK_SELECT,
 547                         pindis_mask & 0xff);
 548         } else {
 549                 wrptr = cmd_bytes;
 550                 /* Select 50MHz base clock, and divider. */
 551                 async = 0;
 552                 div = SR_MHZ(50) / devc->clock.samplerate - 1;
 553                 if (devc->clock.use_ext_clock) {
 554                         async = CLKSEL_CLKSEL8;
 555                         div = devc->clock.clock_pin + 1;
 556                         switch (devc->clock.clock_edge) {
 557                         case SIGMA_CLOCK_EDGE_RISING:
 558                                 div |= CLKSEL_RISING;
 559                                 break;
 560                         case SIGMA_CLOCK_EDGE_FALLING:
 561                                 div |= CLKSEL_FALLING;
 562                                 break;
 563                         case SIGMA_CLOCK_EDGE_EITHER:
 564                                 div |= CLKSEL_RISING;
 565                                 div |= CLKSEL_FALLING;
 566                                 break;
 567                         }
 568                 }
 569                 write_u8_inc(&wrptr, async);
 570                 write_u8_inc(&wrptr, div);
 571                 write_u16be_inc(&wrptr, pindis_mask);
 572                 ret = sigma_write_register(devc, WRITE_CLOCK_SELECT,
 573                         cmd_bytes, wrptr - cmd_bytes);
 574         }
 575         if (ret != SR_OK)
 576                 return ret;
 577
 578         /* Setup maximum post trigger time. */
 579         ret = sigma_set_register(devc, WRITE_POST_TRIGGER,
 580                 (devc->capture_ratio * 255) / 100);
 581         if (ret != SR_OK)
 582                 return ret;
 583
 584         /* Start acqusition. */
 585         regval = WMR_TRGRES | WMR_SDRAMWRITEEN;
 586         if (devc->use_triggers)
 587                 regval |= WMR_TRGEN;
 588         ret = sigma_set_register(devc, WRITE_MODE, regval);
 589         if (ret != SR_OK)
 590                 return ret;
 591
 592         ret = std_session_send_df_header(sdi);
 593         if (ret != SR_OK)
 594                 return ret;
 595
 596         /* Add capture source. */
 597         ret = sr_session_source_add(sdi->session, -1, 0, 10,
 598                 sigma_receive_data, (void *)sdi);
 599         if (ret != SR_OK)
 600                 return ret;
 601
 602         devc->state = SIGMA_CAPTURE;
 603
 604         return SR_OK;
 605 }
 606
 607 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
 608 {
 609         struct dev_context *devc;
 610
 611         devc = sdi->priv;
 612
 613         /*
 614          * When acquisition is currently running, keep the receive
 615          * routine registered and have it stop the acquisition upon the
 616          * next invocation. Else unregister the receive routine here
 617          * already. The detour is required to have sample data retrieved
 618          * for forced acquisition stops.
 619          */
 620         if (devc->state == SIGMA_CAPTURE) {
 621                 devc->state = SIGMA_STOPPING;
 622         } else {
 623                 devc->state = SIGMA_IDLE;
 624                 (void)sr_session_source_remove(sdi->session, -1);
 625         }
 626
 627         return SR_OK;
 628 }
 629
 630 static struct sr_dev_driver asix_sigma_driver_info = {
 631         .name = "asix-sigma",
 632         .longname = "ASIX SIGMA/SIGMA2",
 633         .api_version = 1,
 634         .init = std_init,
 635         .cleanup = std_cleanup,
 636         .scan = scan,
 637         .dev_list = std_dev_list,
 638         .dev_clear = dev_clear,
 639         .config_get = config_get,
 640         .config_set = config_set,
 641         .config_list = config_list,
 642         .dev_open = dev_open,
 643         .dev_close = dev_close,
 644         .dev_acquisition_start = dev_acquisition_start,
 645         .dev_acquisition_stop = dev_acquisition_stop,
 646         .context = NULL,
 647 };
 648 SR_REGISTER_DEV_DRIVER(asix_sigma_driver_info);