src/hardware/asix-sigma/api.c

   1 /*
   2  * This file is part of the libsigrok project.
   3  *
   4  * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
   5  * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
   6  * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
   7  * Copyright (C) 2020 Gerhard Sittig <gerhard.sittig@gmx.net>
   8  *
   9  * This program is free software: you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation, either version 3 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  21  */
  22
  23 #include <config.h>
  24 #include "protocol.h"
  25
  26 /*
  27  * Channels are labelled 1-16, see this vendor's image of the cable:
  28  * http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg (TI/TO are
  29  * additional trigger in/out signals).
  30  */
  31 static const char *channel_names[] = {
  32         "1", "2", "3", "4", "5", "6", "7", "8",
  33         "9", "10", "11", "12", "13", "14", "15", "16",
  34 };
  35
  36 static const uint32_t scanopts[] = {
  37         SR_CONF_CONN,
  38 };
  39
  40 static const uint32_t drvopts[] = {
  41         SR_CONF_LOGIC_ANALYZER,
  42 };
  43
  44 static const uint32_t devopts[] = {
  45         SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
  46         SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
  47         SR_CONF_CONN | SR_CONF_GET,
  48         SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  49         SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET,
  50         SR_CONF_EXTERNAL_CLOCK_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  51         SR_CONF_CLOCK_EDGE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  52 #if ASIX_SIGMA_WITH_TRIGGER
  53         SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
  54         SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
  55 #endif
  56 };
  57
  58 static const char *ext_clock_edges[] = {
  59         [SIGMA_CLOCK_EDGE_RISING] = "rising",
  60         [SIGMA_CLOCK_EDGE_FALLING] = "falling",
  61         [SIGMA_CLOCK_EDGE_EITHER] = "either",
  62 };
  63
  64 #if ASIX_SIGMA_WITH_TRIGGER
  65 static const int32_t trigger_matches[] = {
  66         SR_TRIGGER_ZERO,
  67         SR_TRIGGER_ONE,
  68         SR_TRIGGER_RISING,
  69         SR_TRIGGER_FALLING,
  70 };
  71 #endif
  72
  73 static void clear_helper(struct dev_context *devc)
  74 {
  75         (void)sigma_force_close(devc);
  76 }
  77
  78 static int dev_clear(const struct sr_dev_driver *di)
  79 {
  80         return std_dev_clear_with_callback(di,
  81                 (std_dev_clear_callback)clear_helper);
  82 }
  83
  84 static gboolean bus_addr_in_devices(int bus, int addr, GSList *devs)
  85 {
  86         struct sr_usb_dev_inst *usb;
  87
  88         for (/* EMPTY */; devs; devs = devs->next) {
  89                 usb = devs->data;
  90                 if (usb->bus == bus && usb->address == addr)
  91                         return TRUE;
  92         }
  93
  94         return FALSE;
  95 }
  96
  97 static gboolean known_vid_pid(const struct libusb_device_descriptor *des)
  98 {
  99         gboolean is_sigma, is_omega;
 100
 101         if (des->idVendor != USB_VENDOR_ASIX)
 102                 return FALSE;
 103         is_sigma = des->idProduct == USB_PRODUCT_SIGMA;
 104         is_omega = des->idProduct == USB_PRODUCT_OMEGA;
 105         if (!is_sigma && !is_omega)
 106                 return FALSE;
 107         return TRUE;
 108 }
 109
 110 static GSList *scan(struct sr_dev_driver *di, GSList *options)
 111 {
 112         struct drv_context *drvc;
 113         libusb_context *usbctx;
 114         const char *conn;
 115         GSList *l, *conn_devices;
 116         struct sr_config *src;
 117         GSList *devices;
 118         libusb_device **devlist, *devitem;
 119         int bus, addr;
 120         struct libusb_device_descriptor des;
 121         struct libusb_device_handle *hdl;
 122         int ret;
 123         char conn_id[20];
 124         char serno_txt[16];
 125         char *end;
 126         long serno_num, serno_pre;
 127         enum asix_device_type dev_type;
 128         const char *dev_text;
 129         struct sr_dev_inst *sdi;
 130         struct dev_context *devc;
 131         size_t devidx, chidx;
 132
 133         drvc = di->context;
 134         usbctx = drvc->sr_ctx->libusb_ctx;
 135
 136         /* Find all devices which match an (optional) conn= spec. */
 137         conn = NULL;
 138         for (l = options; l; l = l->next) {
 139                 src = l->data;
 140                 switch (src->key) {
 141                 case SR_CONF_CONN:
 142                         conn = g_variant_get_string(src->data, NULL);
 143                         break;
 144                 }
 145         }
 146         conn_devices = NULL;
 147         if (conn)
 148                 conn_devices = sr_usb_find(usbctx, conn);
 149         if (conn && !conn_devices)
 150                 return NULL;
 151
 152         /* Find all ASIX logic analyzers (which match the connection spec). */
 153         devices = NULL;
 154         libusb_get_device_list(usbctx, &devlist);
 155         for (devidx = 0; devlist[devidx]; devidx++) {
 156                 devitem = devlist[devidx];
 157
 158                 /* Check for connection match if a user spec was given. */
 159                 bus = libusb_get_bus_number(devitem);
 160                 addr = libusb_get_device_address(devitem);
 161                 if (conn && !bus_addr_in_devices(bus, addr, conn_devices))
 162                         continue;
 163                 snprintf(conn_id, sizeof(conn_id), "%d.%d", bus, addr);
 164
 165                 /*
 166                  * Check for known VID:PID pairs. Get the serial number,
 167                  * to then derive the device type from it.
 168                  */
 169                 libusb_get_device_descriptor(devitem, &des);
 170                 if (!known_vid_pid(&des))
 171                         continue;
 172                 if (!des.iSerialNumber) {
 173                         sr_warn("Cannot get serial number (index 0).");
 174                         continue;
 175                 }
 176                 ret = libusb_open(devitem, &hdl);
 177                 if (ret < 0) {
 178                         sr_warn("Cannot open USB device %04x.%04x: %s.",
 179                                 des.idVendor, des.idProduct,
 180                                 libusb_error_name(ret));
 181                         continue;
 182                 }
 183                 ret = libusb_get_string_descriptor_ascii(hdl,
 184                         des.iSerialNumber,
 185                         (unsigned char *)serno_txt, sizeof(serno_txt));
 186                 if (ret < 0) {
 187                         sr_warn("Cannot get serial number (%s).",
 188                                 libusb_error_name(ret));
 189                         libusb_close(hdl);
 190                         continue;
 191                 }
 192                 libusb_close(hdl);
 193
 194                 /*
 195                  * All ASIX logic analyzers have a serial number, which
 196                  * reads as a hex number, and tells the device type.
 197                  */
 198                 ret = sr_atol_base(serno_txt, &serno_num, &end, 16);
 199                 if (ret != SR_OK || !end || *end) {
 200                         sr_warn("Cannot interpret serial number %s.", serno_txt);
 201                         continue;
 202                 }
 203                 dev_type = ASIX_TYPE_NONE;
 204                 dev_text = NULL;
 205                 serno_pre = serno_num >> 16;
 206                 switch (serno_pre) {
 207                 case 0xa601:
 208                         dev_type = ASIX_TYPE_SIGMA;
 209                         dev_text = "SIGMA";
 210                         sr_info("Found SIGMA, serno %s.", serno_txt);
 211                         break;
 212                 case 0xa602:
 213                         dev_type = ASIX_TYPE_SIGMA;
 214                         dev_text = "SIGMA2";
 215                         sr_info("Found SIGMA2, serno %s.", serno_txt);
 216                         break;
 217                 case 0xa603:
 218                         dev_type = ASIX_TYPE_OMEGA;
 219                         dev_text = "OMEGA";
 220                         sr_info("Found OMEGA, serno %s.", serno_txt);
 221                         if (!ASIX_WITH_OMEGA) {
 222                                 sr_warn("OMEGA support is not implemented yet.");
 223                                 continue;
 224                         }
 225                         break;
 226                 default:
 227                         sr_warn("Unknown serno %s, skipping.", serno_txt);
 228                         continue;
 229                 }
 230
 231                 /* Create a device instance, add it to the result set. */
 232
 233                 sdi = g_malloc0(sizeof(*sdi));
 234                 devices = g_slist_append(devices, sdi);
 235                 sdi->status = SR_ST_INITIALIZING;
 236                 sdi->vendor = g_strdup("ASIX");
 237                 sdi->model = g_strdup(dev_text);
 238                 sdi->serial_num = g_strdup(serno_txt);
 239                 sdi->connection_id = g_strdup(conn_id);
 240                 for (chidx = 0; chidx < ARRAY_SIZE(channel_names); chidx++)
 241                         sr_channel_new(sdi, chidx, SR_CHANNEL_LOGIC,
 242                                 TRUE, channel_names[chidx]);
 243
 244                 devc = g_malloc0(sizeof(*devc));
 245                 sdi->priv = devc;
 246                 devc->id.vid = des.idVendor;
 247                 devc->id.pid = des.idProduct;
 248                 devc->id.serno = serno_num;
 249                 devc->id.prefix = serno_pre;
 250                 devc->id.type = dev_type;
 251                 sr_sw_limits_init(&devc->limit.config);
 252                 devc->capture_ratio = 50;
 253                 devc->use_triggers = FALSE;
 254
 255                 /* Get current hardware configuration (or use defaults). */
 256                 (void)sigma_fetch_hw_config(sdi);
 257         }
 258         libusb_free_device_list(devlist, 1);
 259         g_slist_free_full(conn_devices, (GDestroyNotify)sr_usb_dev_inst_free);
 260
 261         return std_scan_complete(di, devices);
 262 }
 263
 264 static int dev_open(struct sr_dev_inst *sdi)
 265 {
 266         struct dev_context *devc;
 267
 268         devc = sdi->priv;
 269
 270         if (devc->id.type == ASIX_TYPE_OMEGA && !ASIX_WITH_OMEGA) {
 271                 sr_err("OMEGA support is not implemented yet.");
 272                 return SR_ERR_NA;
 273         }
 274
 275         return sigma_force_open(sdi);
 276 }
 277
 278 static int dev_close(struct sr_dev_inst *sdi)
 279 {
 280         struct dev_context *devc;
 281
 282         devc = sdi->priv;
 283
 284         return sigma_force_close(devc);
 285 }
 286
 287 static int config_get(uint32_t key, GVariant **data,
 288         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
 289 {
 290         struct dev_context *devc;
 291         const char *clock_text;
 292
 293         (void)cg;
 294
 295         if (!sdi)
 296                 return SR_ERR;
 297         devc = sdi->priv;
 298
 299         switch (key) {
 300         case SR_CONF_CONN:
 301                 *data = g_variant_new_string(sdi->connection_id);
 302                 break;
 303         case SR_CONF_SAMPLERATE:
 304                 *data = g_variant_new_uint64(devc->clock.samplerate);
 305                 break;
 306         case SR_CONF_EXTERNAL_CLOCK:
 307                 *data = g_variant_new_boolean(devc->clock.use_ext_clock);
 308                 break;
 309         case SR_CONF_EXTERNAL_CLOCK_SOURCE:
 310                 clock_text = channel_names[devc->clock.clock_pin];
 311                 *data = g_variant_new_string(clock_text);
 312                 break;
 313         case SR_CONF_CLOCK_EDGE:
 314                 clock_text = ext_clock_edges[devc->clock.clock_edge];
 315                 *data = g_variant_new_string(clock_text);
 316                 break;
 317         case SR_CONF_LIMIT_MSEC:
 318         case SR_CONF_LIMIT_SAMPLES:
 319                 return sr_sw_limits_config_get(&devc->limit.config, key, data);
 320 #if ASIX_SIGMA_WITH_TRIGGER
 321         case SR_CONF_CAPTURE_RATIO:
 322                 *data = g_variant_new_uint64(devc->capture_ratio);
 323                 break;
 324 #endif
 325         default:
 326                 return SR_ERR_NA;
 327         }
 328
 329         return SR_OK;
 330 }
 331
 332 static int config_set(uint32_t key, GVariant *data,
 333         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
 334 {
 335         struct dev_context *devc;
 336         int ret;
 337         uint64_t want_rate, have_rate;
 338         int idx;
 339
 340         (void)cg;
 341
 342         devc = sdi->priv;
 343
 344         switch (key) {
 345         case SR_CONF_SAMPLERATE:
 346                 want_rate = g_variant_get_uint64(data);
 347                 ret = sigma_normalize_samplerate(want_rate, &have_rate);
 348                 if (ret != SR_OK)
 349                         return ret;
 350                 if (have_rate != want_rate) {
 351                         char *text_want, *text_have;
 352                         text_want = sr_samplerate_string(want_rate);
 353                         text_have = sr_samplerate_string(have_rate);
 354                         sr_info("Adjusted samplerate %s to %s.",
 355                                 text_want, text_have);
 356                         g_free(text_want);
 357                         g_free(text_have);
 358                 }
 359                 devc->clock.samplerate = have_rate;
 360                 break;
 361         case SR_CONF_EXTERNAL_CLOCK:
 362                 devc->clock.use_ext_clock = g_variant_get_boolean(data);
 363                 break;
 364         case SR_CONF_EXTERNAL_CLOCK_SOURCE:
 365                 idx = std_str_idx(data, ARRAY_AND_SIZE(channel_names));
 366                 if (idx < 0)
 367                         return SR_ERR_ARG;
 368                 devc->clock.clock_pin = idx;
 369                 break;
 370         case SR_CONF_CLOCK_EDGE:
 371                 idx = std_str_idx(data, ARRAY_AND_SIZE(ext_clock_edges));
 372                 if (idx < 0)
 373                         return SR_ERR_ARG;
 374                 devc->clock.clock_edge = idx;
 375                 break;
 376         case SR_CONF_LIMIT_MSEC:
 377         case SR_CONF_LIMIT_SAMPLES:
 378                 return sr_sw_limits_config_set(&devc->limit.config, key, data);
 379 #if ASIX_SIGMA_WITH_TRIGGER
 380         case SR_CONF_CAPTURE_RATIO:
 381                 devc->capture_ratio = g_variant_get_uint64(data);
 382                 break;
 383 #endif
 384         default:
 385                 return SR_ERR_NA;
 386         }
 387
 388         return SR_OK;
 389 }
 390
 391 static int config_list(uint32_t key, GVariant **data,
 392         const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
 393 {
 394         switch (key) {
 395         case SR_CONF_SCAN_OPTIONS:
 396         case SR_CONF_DEVICE_OPTIONS:
 397                 if (cg)
 398                         return SR_ERR_NA;
 399                 return STD_CONFIG_LIST(key, data, sdi, cg,
 400                         scanopts, drvopts, devopts);
 401         case SR_CONF_SAMPLERATE:
 402                 *data = sigma_get_samplerates_list();
 403                 break;
 404         case SR_CONF_EXTERNAL_CLOCK_SOURCE:
 405                 *data = g_variant_new_strv(ARRAY_AND_SIZE(channel_names));
 406                 break;
 407         case SR_CONF_CLOCK_EDGE:
 408                 *data = g_variant_new_strv(ARRAY_AND_SIZE(ext_clock_edges));
 409                 break;
 410 #if ASIX_SIGMA_WITH_TRIGGER
 411         case SR_CONF_TRIGGER_MATCH:
 412                 *data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches));
 413                 break;
 414 #endif
 415         default:
 416                 return SR_ERR_NA;
 417         }
 418
 419         return SR_OK;
 420 }
 421
 422 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 423 {
 424         struct dev_context *devc;
 425         uint16_t pindis_mask;
 426         uint8_t async, div;
 427         int ret;
 428         size_t triggerpin;
 429         uint8_t trigsel2;
 430         struct triggerinout triggerinout_conf;
 431         struct triggerlut lut;
 432         uint8_t regval, cmd_bytes[4], *wrptr;
 433
 434         devc = sdi->priv;
 435
 436         /*
 437          * Setup the device's samplerate from the value which up to now
 438          * just got checked and stored. As a byproduct this can pick and
 439          * send firmware to the device, reduce the number of available
 440          * logic channels, etc.
 441          *
 442          * Determine an acquisition timeout from optionally configured
 443          * sample count or time limits. Which depends on the samplerate.
 444          * Force 50MHz samplerate when external clock is in use.
 445          */
 446         if (devc->clock.use_ext_clock) {
 447                 if (devc->clock.samplerate != SR_MHZ(50))
 448                         sr_info("External clock, forcing 50MHz samplerate.");
 449                 devc->clock.samplerate = SR_MHZ(50);
 450         }
 451         ret = sigma_set_samplerate(sdi);
 452         if (ret != SR_OK)
 453                 return ret;
 454         ret = sigma_set_acquire_timeout(devc);
 455         if (ret != SR_OK)
 456                 return ret;
 457
 458         ret = sigma_convert_trigger(sdi);
 459         if (ret != SR_OK) {
 460                 sr_err("Could not configure triggers.");
 461                 return ret;
 462         }
 463
 464         /* Enter trigger programming mode. */
 465         trigsel2 = TRGSEL2_RESET;
 466         ret = sigma_set_register(devc, WRITE_TRIGGER_SELECT2, trigsel2);
 467         if (ret != SR_OK)
 468                 return ret;
 469
 470         trigsel2 = 0;
 471         if (devc->clock.samplerate >= SR_MHZ(100)) {
 472                 /* 100 and 200 MHz mode. */
 473                 /* TODO Decipher the 0x81 magic number's purpose. */
 474                 ret = sigma_set_register(devc, WRITE_TRIGGER_SELECT2, 0x81);
 475                 if (ret != SR_OK)
 476                         return ret;
 477
 478                 /* Find which pin to trigger on from mask. */
 479                 for (triggerpin = 0; triggerpin < 8; triggerpin++) {
 480                         if (devc->trigger.risingmask & BIT(triggerpin))
 481                                 break;
 482                         if (devc->trigger.fallingmask & BIT(triggerpin))
 483                                 break;
 484                 }
 485
 486                 /* Set trigger pin and light LED on trigger. */
 487                 trigsel2 = triggerpin & TRGSEL2_PINS_MASK;
 488                 trigsel2 |= TRGSEL2_LEDSEL1;
 489
 490                 /* Default rising edge. */
 491                 /* TODO Documentation disagrees, bit set means _rising_ edge. */
 492                 if (devc->trigger.fallingmask)
 493                         trigsel2 |= TRGSEL2_PINPOL_RISE;
 494
 495         } else if (devc->clock.samplerate <= SR_MHZ(50)) {
 496                 /* 50MHz firmware modes. */
 497
 498                 /* Translate application specs to hardware perspective. */
 499                 ret = sigma_build_basic_trigger(devc, &lut);
 500                 if (ret != SR_OK)
 501                         return ret;
 502
 503                 /* Communicate resulting register values to the device. */
 504                 ret = sigma_write_trigger_lut(devc, &lut);
 505                 if (ret != SR_OK)
 506                         return ret;
 507
 508                 trigsel2 = TRGSEL2_LEDSEL1 | TRGSEL2_LEDSEL0;
 509         }
 510
 511         /* Setup trigger in and out pins to default values. */
 512         memset(&triggerinout_conf, 0, sizeof(triggerinout_conf));
 513         triggerinout_conf.trgout_bytrigger = TRUE;
 514         triggerinout_conf.trgout_enable = TRUE;
 515         /* TODO
 516          * Verify the correctness of this implementation. The previous
 517          * version used to assign to a C language struct with bit fields
 518          * which is highly non-portable and hard to guess the resulting
 519          * raw memory layout or wire transfer content. The C struct's
 520          * field names did not match the vendor documentation's names.
 521          * Which means that I could not verify "on paper" either. Let's
 522          * re-visit this code later during research for trigger support.
 523          */
 524         wrptr = cmd_bytes;
 525         regval = 0;
 526         if (triggerinout_conf.trgout_bytrigger)
 527                 regval |= TRGOPT_TRGOOUTEN;
 528         write_u8_inc(&wrptr, regval);
 529         regval &= ~TRGOPT_CLEAR_MASK;
 530         if (triggerinout_conf.trgout_enable)
 531                 regval |= TRGOPT_TRGOEN;
 532         write_u8_inc(&wrptr, regval);
 533         ret = sigma_write_register(devc, WRITE_TRIGGER_OPTION,
 534                 cmd_bytes, wrptr - cmd_bytes);
 535         if (ret != SR_OK)
 536                 return ret;
 537
 538         /* Leave trigger programming mode. */
 539         ret = sigma_set_register(devc, WRITE_TRIGGER_SELECT2, trigsel2);
 540         if (ret != SR_OK)
 541                 return ret;
 542
 543         /*
 544          * Samplerate dependent clock and channels configuration. Some
 545          * channels by design are not available at higher clock rates.
 546          * Register layout differs between firmware variants (depth 1
 547          * with LSB channel mask above 50MHz, depth 4 with more details
 548          * up to 50MHz).
 549          *
 550          * Derive a mask where bits are set for unavailable channels.
 551          * Either send the single byte, or the full byte sequence.
 552          */
 553         pindis_mask = ~BITS_MASK(devc->num_channels);
 554         if (devc->clock.samplerate > SR_MHZ(50)) {
 555                 ret = sigma_set_register(devc, WRITE_CLOCK_SELECT,
 556                         pindis_mask & 0xff);
 557         } else {
 558                 wrptr = cmd_bytes;
 559                 /* Select 50MHz base clock, and divider. */
 560                 async = 0;
 561                 div = SR_MHZ(50) / devc->clock.samplerate - 1;
 562                 if (devc->clock.use_ext_clock) {
 563                         async = CLKSEL_CLKSEL8;
 564                         div = devc->clock.clock_pin + 1;
 565                         switch (devc->clock.clock_edge) {
 566                         case SIGMA_CLOCK_EDGE_RISING:
 567                                 div |= CLKSEL_RISING;
 568                                 break;
 569                         case SIGMA_CLOCK_EDGE_FALLING:
 570                                 div |= CLKSEL_FALLING;
 571                                 break;
 572                         case SIGMA_CLOCK_EDGE_EITHER:
 573                                 div |= CLKSEL_RISING;
 574                                 div |= CLKSEL_FALLING;
 575                                 break;
 576                         }
 577                 }
 578                 write_u8_inc(&wrptr, async);
 579                 write_u8_inc(&wrptr, div);
 580                 write_u16be_inc(&wrptr, pindis_mask);
 581                 ret = sigma_write_register(devc, WRITE_CLOCK_SELECT,
 582                         cmd_bytes, wrptr - cmd_bytes);
 583         }
 584         if (ret != SR_OK)
 585                 return ret;
 586
 587         /* Setup maximum post trigger time. */
 588         ret = sigma_set_register(devc, WRITE_POST_TRIGGER,
 589                 (devc->capture_ratio * 255) / 100);
 590         if (ret != SR_OK)
 591                 return ret;
 592
 593         /* Start acqusition. */
 594         regval = WMR_TRGRES | WMR_SDRAMWRITEEN;
 595         if (devc->use_triggers && ASIX_SIGMA_WITH_TRIGGER)
 596                 regval |= WMR_TRGEN;
 597         ret = sigma_set_register(devc, WRITE_MODE, regval);
 598         if (ret != SR_OK)
 599                 return ret;
 600
 601         ret = std_session_send_df_header(sdi);
 602         if (ret != SR_OK)
 603                 return ret;
 604
 605         /* Add capture source. */
 606         ret = sr_session_source_add(sdi->session, -1, 0, 10,
 607                 sigma_receive_data, (void *)sdi);
 608         if (ret != SR_OK)
 609                 return ret;
 610
 611         devc->state.state = SIGMA_CAPTURE;
 612
 613         return SR_OK;
 614 }
 615
 616 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
 617 {
 618         struct dev_context *devc;
 619
 620         devc = sdi->priv;
 621
 622         /*
 623          * When acquisition is currently running, keep the receive
 624          * routine registered and have it stop the acquisition upon the
 625          * next invocation. Else unregister the receive routine here
 626          * already. The detour is required to have sample data retrieved
 627          * for forced acquisition stops.
 628          */
 629         if (devc->state.state == SIGMA_CAPTURE) {
 630                 devc->state.state = SIGMA_STOPPING;
 631         } else {
 632                 devc->state.state = SIGMA_IDLE;
 633                 (void)sr_session_source_remove(sdi->session, -1);
 634         }
 635
 636         return SR_OK;
 637 }
 638
 639 static struct sr_dev_driver asix_sigma_driver_info = {
 640         .name = "asix-sigma",
 641         .longname = "ASIX SIGMA/SIGMA2",
 642         .api_version = 1,
 643         .init = std_init,
 644         .cleanup = std_cleanup,
 645         .scan = scan,
 646         .dev_list = std_dev_list,
 647         .dev_clear = dev_clear,
 648         .config_get = config_get,
 649         .config_set = config_set,
 650         .config_list = config_list,
 651         .dev_open = dev_open,
 652         .dev_close = dev_close,
 653         .dev_acquisition_start = dev_acquisition_start,
 654         .dev_acquisition_stop = dev_acquisition_stop,
 655         .context = NULL,
 656 };
 657 SR_REGISTER_DEV_DRIVER(asix_sigma_driver_info);