2 * This file is part of the libsigrok project.
4 * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
5 * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
6 * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 * ASIX SIGMA/SIGMA2 logic analyzer driver
30 * Channel numbers seem to go from 1-16, according to this image:
31 * http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg
32 * (the cable has two additional GND pins, and a TI and TO pin)
34 static const char *channel_names[] = {
35 "1", "2", "3", "4", "5", "6", "7", "8",
36 "9", "10", "11", "12", "13", "14", "15", "16",
39 static const uint32_t drvopts[] = {
40 SR_CONF_LOGIC_ANALYZER,
43 static const uint32_t devopts[] = {
44 SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
45 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
46 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
47 #if ASIX_SIGMA_WITH_TRIGGER
48 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
49 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
53 static const int32_t trigger_matches[] = {
61 static int dev_clear(const struct sr_dev_driver *di)
63 return std_dev_clear(di, sigma_clear_helper);
66 static GSList *scan(struct sr_dev_driver *di, GSList *options)
68 struct sr_dev_inst *sdi;
69 struct dev_context *devc;
70 struct ftdi_device_list *devlist;
78 devc = g_malloc0(sizeof(struct dev_context));
80 ftdi_init(&devc->ftdic);
82 /* Look for SIGMAs. */
84 if ((ret = ftdi_usb_find_all(&devc->ftdic, &devlist,
85 USB_VENDOR, USB_PRODUCT)) <= 0) {
87 sr_err("ftdi_usb_find_all(): %d", ret);
91 /* Make sure it's a version 1 or 2 SIGMA. */
92 ftdi_usb_get_strings(&devc->ftdic, devlist->dev, NULL, 0, NULL, 0,
93 serial_txt, sizeof(serial_txt));
94 sscanf(serial_txt, "%x", &serial);
96 if (serial < 0xa6010000 || serial > 0xa602ffff) {
97 sr_err("Only SIGMA and SIGMA2 are supported "
98 "in this version of libsigrok.");
102 sr_info("Found ASIX SIGMA - Serial: %s", serial_txt);
104 devc->cur_samplerate = samplerates[0];
105 devc->limit_msec = 0;
106 devc->limit_samples = 0;
107 devc->cur_firmware = -1;
108 devc->num_channels = 0;
109 devc->samples_per_event = 0;
110 devc->capture_ratio = 50;
111 devc->use_triggers = 0;
113 /* Register SIGMA device. */
114 sdi = g_malloc0(sizeof(struct sr_dev_inst));
115 sdi->status = SR_ST_INITIALIZING;
116 sdi->vendor = g_strdup(USB_VENDOR_NAME);
117 sdi->model = g_strdup(USB_MODEL_NAME);
119 for (i = 0; i < ARRAY_SIZE(channel_names); i++)
120 sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_names[i]);
124 /* We will open the device again when we need it. */
125 ftdi_list_free(&devlist);
127 return std_scan_complete(di, g_slist_append(NULL, sdi));
130 ftdi_deinit(&devc->ftdic);
135 static int dev_open(struct sr_dev_inst *sdi)
137 struct dev_context *devc;
142 /* Make sure it's an ASIX SIGMA. */
143 if ((ret = ftdi_usb_open_desc(&devc->ftdic,
144 USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
146 sr_err("ftdi_usb_open failed: %s",
147 ftdi_get_error_string(&devc->ftdic));
152 sdi->status = SR_ST_ACTIVE;
157 static int dev_close(struct sr_dev_inst *sdi)
159 struct dev_context *devc;
164 if (sdi->status == SR_ST_ACTIVE)
165 ftdi_usb_close(&devc->ftdic);
167 sdi->status = SR_ST_INACTIVE;
172 static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
173 const struct sr_channel_group *cg)
175 struct dev_context *devc;
184 case SR_CONF_SAMPLERATE:
185 *data = g_variant_new_uint64(devc->cur_samplerate);
187 case SR_CONF_LIMIT_MSEC:
188 *data = g_variant_new_uint64(devc->limit_msec);
190 case SR_CONF_LIMIT_SAMPLES:
191 *data = g_variant_new_uint64(devc->limit_samples);
193 #if ASIX_SIGMA_WITH_TRIGGER
194 case SR_CONF_CAPTURE_RATIO:
195 *data = g_variant_new_uint64(devc->capture_ratio);
205 static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
206 const struct sr_channel_group *cg)
208 struct dev_context *devc;
214 if (sdi->status != SR_ST_ACTIVE)
215 return SR_ERR_DEV_CLOSED;
221 case SR_CONF_SAMPLERATE:
222 ret = sigma_set_samplerate(sdi, g_variant_get_uint64(data));
224 case SR_CONF_LIMIT_MSEC:
225 tmp = g_variant_get_uint64(data);
227 devc->limit_msec = g_variant_get_uint64(data);
231 case SR_CONF_LIMIT_SAMPLES:
232 tmp = g_variant_get_uint64(data);
233 devc->limit_samples = tmp;
234 devc->limit_msec = sigma_limit_samples_to_msec(devc, tmp);
236 #if ASIX_SIGMA_WITH_TRIGGER
237 case SR_CONF_CAPTURE_RATIO:
238 tmp = g_variant_get_uint64(data);
241 devc->capture_ratio = tmp;
251 static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
252 const struct sr_channel_group *cg)
260 case SR_CONF_DEVICE_OPTIONS:
262 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
263 drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
265 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
266 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
268 case SR_CONF_SAMPLERATE:
269 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
270 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
271 samplerates_count, sizeof(samplerates[0]));
272 g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
273 *data = g_variant_builder_end(&gvb);
275 #if ASIX_SIGMA_WITH_TRIGGER
276 case SR_CONF_TRIGGER_MATCH:
277 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
278 trigger_matches, ARRAY_SIZE(trigger_matches),
289 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
291 struct dev_context *devc;
292 struct clockselect_50 clockselect;
294 uint8_t triggerselect;
295 struct triggerinout triggerinout_conf;
296 struct triggerlut lut;
298 uint8_t clock_bytes[sizeof(clockselect)];
301 if (sdi->status != SR_ST_ACTIVE)
302 return SR_ERR_DEV_CLOSED;
306 if (sigma_convert_trigger(sdi) != SR_OK) {
307 sr_err("Failed to configure triggers.");
311 /* If the samplerate has not been set, default to 200 kHz. */
312 if (devc->cur_firmware == -1) {
313 if ((ret = sigma_set_samplerate(sdi, SR_KHZ(200))) != SR_OK)
317 /* Enter trigger programming mode. */
318 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, devc);
321 if (devc->cur_samplerate >= SR_MHZ(100)) {
322 /* 100 and 200 MHz mode. */
323 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, devc);
325 /* Find which pin to trigger on from mask. */
326 for (triggerpin = 0; triggerpin < 8; triggerpin++)
327 if ((devc->trigger.risingmask | devc->trigger.fallingmask) &
331 /* Set trigger pin and light LED on trigger. */
332 triggerselect = (1 << LEDSEL1) | (triggerpin & 0x7);
334 /* Default rising edge. */
335 if (devc->trigger.fallingmask)
336 triggerselect |= 1 << 3;
338 } else if (devc->cur_samplerate <= SR_MHZ(50)) {
339 /* All other modes. */
340 sigma_build_basic_trigger(&lut, devc);
342 sigma_write_trigger_lut(&lut, devc);
344 triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0);
347 /* Setup trigger in and out pins to default values. */
348 memset(&triggerinout_conf, 0, sizeof(struct triggerinout));
349 triggerinout_conf.trgout_bytrigger = 1;
350 triggerinout_conf.trgout_enable = 1;
352 sigma_write_register(WRITE_TRIGGER_OPTION,
353 (uint8_t *) &triggerinout_conf,
354 sizeof(struct triggerinout), devc);
356 /* Go back to normal mode. */
357 sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, devc);
359 /* Set clock select register. */
360 clockselect.async = 0;
361 clockselect.fraction = 1 - 1; /* Divider 1. */
362 clockselect.disabled_channels = 0x0000; /* All channels enabled. */
363 if (devc->cur_samplerate == SR_MHZ(200)) {
364 /* Enable 4 channels. */
365 clockselect.disabled_channels = 0xf0ff;
366 } else if (devc->cur_samplerate == SR_MHZ(100)) {
367 /* Enable 8 channels. */
368 clockselect.disabled_channels = 0x00ff;
371 * 50 MHz mode, or fraction thereof. The 50MHz reference
372 * can get divided by any integer in the range 1 to 256.
373 * Divider minus 1 gets written to the hardware.
374 * (The driver lists a discrete set of sample rates, but
375 * all of them fit the above description.)
377 clockselect.fraction = SR_MHZ(50) / devc->cur_samplerate - 1;
380 clock_bytes[clock_idx++] = clockselect.async;
381 clock_bytes[clock_idx++] = clockselect.fraction;
382 clock_bytes[clock_idx++] = clockselect.disabled_channels & 0xff;
383 clock_bytes[clock_idx++] = clockselect.disabled_channels >> 8;
384 sigma_write_register(WRITE_CLOCK_SELECT, clock_bytes, clock_idx, devc);
386 /* Setup maximum post trigger time. */
387 sigma_set_register(WRITE_POST_TRIGGER,
388 (devc->capture_ratio * 255) / 100, devc);
390 /* Start acqusition. */
391 gettimeofday(&devc->start_tv, 0);
392 regval = WMR_TRGRES | WMR_SDRAMWRITEEN;
393 #if ASIX_SIGMA_WITH_TRIGGER
396 sigma_set_register(WRITE_MODE, regval, devc);
398 std_session_send_df_header(sdi);
400 /* Add capture source. */
401 sr_session_source_add(sdi->session, -1, 0, 10, sigma_receive_data, (void *)sdi);
403 devc->state.state = SIGMA_CAPTURE;
408 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
410 struct dev_context *devc;
413 devc->state.state = SIGMA_IDLE;
415 sr_session_source_remove(sdi->session, -1);
420 static struct sr_dev_driver asix_sigma_driver_info = {
421 .name = "asix-sigma",
422 .longname = "ASIX SIGMA/SIGMA2",
425 .cleanup = std_cleanup,
427 .dev_list = std_dev_list,
428 .dev_clear = dev_clear,
429 .config_get = config_get,
430 .config_set = config_set,
431 .config_list = config_list,
432 .dev_open = dev_open,
433 .dev_close = dev_close,
434 .dev_acquisition_start = dev_acquisition_start,
435 .dev_acquisition_stop = dev_acquisition_stop,
438 SR_REGISTER_DEV_DRIVER(asix_sigma_driver_info);