2 * This file is part of the libsigrok project.
4 * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
5 * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
6 * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 * ASIX SIGMA/SIGMA2 logic analyzer driver
30 * Channel numbers seem to go from 1-16, according to this image:
31 * http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg
32 * (the cable has two additional GND pins, and a TI and TO pin)
34 static const char *channel_names[] = {
35 "1", "2", "3", "4", "5", "6", "7", "8",
36 "9", "10", "11", "12", "13", "14", "15", "16",
39 static const uint32_t drvopts[] = {
40 SR_CONF_LOGIC_ANALYZER,
43 static const uint32_t devopts[] = {
44 SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
45 SR_CONF_LIMIT_SAMPLES | SR_CONF_SET,
46 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
47 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
48 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
51 static const int32_t trigger_matches[] = {
59 static int dev_clear(const struct sr_dev_driver *di)
61 return std_dev_clear(di, sigma_clear_helper);
64 static GSList *scan(struct sr_dev_driver *di, GSList *options)
66 struct sr_dev_inst *sdi;
67 struct dev_context *devc;
69 struct ftdi_device_list *devlist;
79 devc = g_malloc0(sizeof(struct dev_context));
81 ftdi_init(&devc->ftdic);
83 /* Look for SIGMAs. */
85 if ((ret = ftdi_usb_find_all(&devc->ftdic, &devlist,
86 USB_VENDOR, USB_PRODUCT)) <= 0) {
88 sr_err("ftdi_usb_find_all(): %d", ret);
92 /* Make sure it's a version 1 or 2 SIGMA. */
93 ftdi_usb_get_strings(&devc->ftdic, devlist->dev, NULL, 0, NULL, 0,
94 serial_txt, sizeof(serial_txt));
95 sscanf(serial_txt, "%x", &serial);
97 if (serial < 0xa6010000 || serial > 0xa602ffff) {
98 sr_err("Only SIGMA and SIGMA2 are supported "
99 "in this version of libsigrok.");
103 sr_info("Found ASIX SIGMA - Serial: %s", serial_txt);
105 devc->cur_samplerate = samplerates[0];
107 devc->limit_msec = 0;
108 devc->cur_firmware = -1;
109 devc->num_channels = 0;
110 devc->samples_per_event = 0;
111 devc->capture_ratio = 50;
112 devc->use_triggers = 0;
114 /* Register SIGMA device. */
115 sdi = g_malloc0(sizeof(struct sr_dev_inst));
116 sdi->status = SR_ST_INITIALIZING;
117 sdi->vendor = g_strdup(USB_VENDOR_NAME);
118 sdi->model = g_strdup(USB_MODEL_NAME);
120 for (i = 0; i < ARRAY_SIZE(channel_names); i++)
121 sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_names[i]);
123 devices = g_slist_append(devices, sdi);
126 /* We will open the device again when we need it. */
127 ftdi_list_free(&devlist);
129 return std_scan_complete(di, devices);
132 ftdi_deinit(&devc->ftdic);
137 static int dev_open(struct sr_dev_inst *sdi)
139 struct dev_context *devc;
144 /* Make sure it's an ASIX SIGMA. */
145 if ((ret = ftdi_usb_open_desc(&devc->ftdic,
146 USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
148 sr_err("ftdi_usb_open failed: %s",
149 ftdi_get_error_string(&devc->ftdic));
154 sdi->status = SR_ST_ACTIVE;
159 static int dev_close(struct sr_dev_inst *sdi)
161 struct dev_context *devc;
166 if (sdi->status == SR_ST_ACTIVE)
167 ftdi_usb_close(&devc->ftdic);
169 sdi->status = SR_ST_INACTIVE;
174 static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
175 const struct sr_channel_group *cg)
177 struct dev_context *devc;
186 case SR_CONF_SAMPLERATE:
187 *data = g_variant_new_uint64(devc->cur_samplerate);
189 case SR_CONF_LIMIT_MSEC:
190 *data = g_variant_new_uint64(devc->limit_msec);
192 case SR_CONF_CAPTURE_RATIO:
193 *data = g_variant_new_uint64(devc->capture_ratio);
202 static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
203 const struct sr_channel_group *cg)
205 struct dev_context *devc;
211 if (sdi->status != SR_ST_ACTIVE)
212 return SR_ERR_DEV_CLOSED;
218 case SR_CONF_SAMPLERATE:
219 ret = sigma_set_samplerate(sdi, g_variant_get_uint64(data));
221 case SR_CONF_LIMIT_MSEC:
222 tmp = g_variant_get_uint64(data);
224 devc->limit_msec = g_variant_get_uint64(data);
228 case SR_CONF_LIMIT_SAMPLES:
229 tmp = g_variant_get_uint64(data);
230 devc->limit_msec = tmp * 1000 / devc->cur_samplerate;
232 case SR_CONF_CAPTURE_RATIO:
233 tmp = g_variant_get_uint64(data);
235 devc->capture_ratio = tmp;
246 static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
247 const struct sr_channel_group *cg)
255 case SR_CONF_DEVICE_OPTIONS:
257 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
258 drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
260 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
261 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
263 case SR_CONF_SAMPLERATE:
264 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
265 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
266 SAMPLERATES_COUNT, sizeof(uint64_t));
267 g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
268 *data = g_variant_builder_end(&gvb);
270 case SR_CONF_TRIGGER_MATCH:
271 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
272 trigger_matches, ARRAY_SIZE(trigger_matches),
282 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
284 struct dev_context *devc;
285 struct clockselect_50 clockselect;
286 int frac, triggerpin, ret;
287 uint8_t triggerselect = 0;
288 struct triggerinout triggerinout_conf;
289 struct triggerlut lut;
291 if (sdi->status != SR_ST_ACTIVE)
292 return SR_ERR_DEV_CLOSED;
296 if (sigma_convert_trigger(sdi) != SR_OK) {
297 sr_err("Failed to configure triggers.");
301 /* If the samplerate has not been set, default to 200 kHz. */
302 if (devc->cur_firmware == -1) {
303 if ((ret = sigma_set_samplerate(sdi, SR_KHZ(200))) != SR_OK)
307 /* Enter trigger programming mode. */
308 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, devc);
310 /* 100 and 200 MHz mode. */
311 if (devc->cur_samplerate >= SR_MHZ(100)) {
312 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, devc);
314 /* Find which pin to trigger on from mask. */
315 for (triggerpin = 0; triggerpin < 8; triggerpin++)
316 if ((devc->trigger.risingmask | devc->trigger.fallingmask) &
320 /* Set trigger pin and light LED on trigger. */
321 triggerselect = (1 << LEDSEL1) | (triggerpin & 0x7);
323 /* Default rising edge. */
324 if (devc->trigger.fallingmask)
325 triggerselect |= 1 << 3;
327 /* All other modes. */
328 } else if (devc->cur_samplerate <= SR_MHZ(50)) {
329 sigma_build_basic_trigger(&lut, devc);
331 sigma_write_trigger_lut(&lut, devc);
333 triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0);
336 /* Setup trigger in and out pins to default values. */
337 memset(&triggerinout_conf, 0, sizeof(struct triggerinout));
338 triggerinout_conf.trgout_bytrigger = 1;
339 triggerinout_conf.trgout_enable = 1;
341 sigma_write_register(WRITE_TRIGGER_OPTION,
342 (uint8_t *) &triggerinout_conf,
343 sizeof(struct triggerinout), devc);
345 /* Go back to normal mode. */
346 sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, devc);
348 /* Set clock select register. */
349 if (devc->cur_samplerate == SR_MHZ(200))
350 /* Enable 4 channels. */
351 sigma_set_register(WRITE_CLOCK_SELECT, 0xf0, devc);
352 else if (devc->cur_samplerate == SR_MHZ(100))
353 /* Enable 8 channels. */
354 sigma_set_register(WRITE_CLOCK_SELECT, 0x00, devc);
357 * 50 MHz mode (or fraction thereof). Any fraction down to
358 * 50 MHz / 256 can be used, but is not supported by sigrok API.
360 frac = SR_MHZ(50) / devc->cur_samplerate - 1;
362 clockselect.async = 0;
363 clockselect.fraction = frac;
364 clockselect.disabled_channels = 0;
366 sigma_write_register(WRITE_CLOCK_SELECT,
367 (uint8_t *) &clockselect,
368 sizeof(clockselect), devc);
371 /* Setup maximum post trigger time. */
372 sigma_set_register(WRITE_POST_TRIGGER,
373 (devc->capture_ratio * 255) / 100, devc);
375 /* Start acqusition. */
376 gettimeofday(&devc->start_tv, 0);
377 sigma_set_register(WRITE_MODE, 0x0d, devc);
379 std_session_send_df_header(sdi, LOG_PREFIX);
381 /* Add capture source. */
382 sr_session_source_add(sdi->session, -1, 0, 10, sigma_receive_data, (void *)sdi);
384 devc->state.state = SIGMA_CAPTURE;
389 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
391 struct dev_context *devc;
394 devc->state.state = SIGMA_IDLE;
396 sr_session_source_remove(sdi->session, -1);
401 static struct sr_dev_driver asix_sigma_driver_info = {
402 .name = "asix-sigma",
403 .longname = "ASIX SIGMA/SIGMA2",
406 .cleanup = std_cleanup,
408 .dev_list = std_dev_list,
409 .dev_clear = dev_clear,
410 .config_get = config_get,
411 .config_set = config_set,
412 .config_list = config_list,
413 .dev_open = dev_open,
414 .dev_close = dev_close,
415 .dev_acquisition_start = dev_acquisition_start,
416 .dev_acquisition_stop = dev_acquisition_stop,
419 SR_REGISTER_DEV_DRIVER(asix_sigma_driver_info);