src/hardware/asix-sigma/api.c

   1 /*
   2  * This file is part of the libsigrok project.
   3  *
   4  * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
   5  * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
   6  * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
   7  *
   8  * This program is free software: you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation, either version 3 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 /*
  23  * ASIX SIGMA/SIGMA2 logic analyzer driver
  24  */
  25
  26 #include <config.h>
  27 #include "protocol.h"
  28
  29 /*
  30  * Channel numbers seem to go from 1-16, according to this image:
  31  * http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg
  32  * (the cable has two additional GND pins, and a TI and TO pin)
  33  */
  34 static const char *channel_names[] = {
  35         "1", "2", "3", "4", "5", "6", "7", "8",
  36         "9", "10", "11", "12", "13", "14", "15", "16",
  37 };
  38
  39 static const uint32_t drvopts[] = {
  40         SR_CONF_LOGIC_ANALYZER,
  41 };
  42
  43 static const uint32_t devopts[] = {
  44         SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
  45         SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
  46         SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  47 #if ASIX_SIGMA_WITH_TRIGGER
  48         SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
  49         SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
  50 #endif
  51 };
  52
  53 #if ASIX_SIGMA_WITH_TRIGGER
  54 static const int32_t trigger_matches[] = {
  55         SR_TRIGGER_ZERO,
  56         SR_TRIGGER_ONE,
  57         SR_TRIGGER_RISING,
  58         SR_TRIGGER_FALLING,
  59 };
  60 #endif
  61
  62 static int dev_clear(const struct sr_dev_driver *di)
  63 {
  64         return std_dev_clear(di, sigma_clear_helper);
  65 }
  66
  67 static GSList *scan(struct sr_dev_driver *di, GSList *options)
  68 {
  69         struct sr_dev_inst *sdi;
  70         struct dev_context *devc;
  71         struct ftdi_device_list *devlist;
  72         char serial_txt[10];
  73         uint32_t serial;
  74         int ret;
  75         unsigned int i;
  76
  77         (void)options;
  78
  79         devc = g_malloc0(sizeof(struct dev_context));
  80
  81         ftdi_init(&devc->ftdic);
  82
  83         /* Look for SIGMAs. */
  84
  85         if ((ret = ftdi_usb_find_all(&devc->ftdic, &devlist,
  86             USB_VENDOR, USB_PRODUCT)) <= 0) {
  87                 if (ret < 0)
  88                         sr_err("ftdi_usb_find_all(): %d", ret);
  89                 goto free;
  90         }
  91
  92         /* Make sure it's a version 1 or 2 SIGMA. */
  93         ftdi_usb_get_strings(&devc->ftdic, devlist->dev, NULL, 0, NULL, 0,
  94                              serial_txt, sizeof(serial_txt));
  95         sscanf(serial_txt, "%x", &serial);
  96
  97         if (serial < 0xa6010000 || serial > 0xa602ffff) {
  98                 sr_err("Only SIGMA and SIGMA2 are supported "
  99                        "in this version of libsigrok.");
 100                 goto free;
 101         }
 102
 103         sr_info("Found ASIX SIGMA - Serial: %s", serial_txt);
 104
 105         devc->cur_samplerate = samplerates[0];
 106         devc->limit_msec = 0;
 107         devc->limit_samples = 0;
 108         devc->cur_firmware = -1;
 109         devc->num_channels = 0;
 110         devc->samples_per_event = 0;
 111         devc->capture_ratio = 50;
 112         devc->use_triggers = 0;
 113
 114         /* Register SIGMA device. */
 115         sdi = g_malloc0(sizeof(struct sr_dev_inst));
 116         sdi->status = SR_ST_INITIALIZING;
 117         sdi->vendor = g_strdup(USB_VENDOR_NAME);
 118         sdi->model = g_strdup(USB_MODEL_NAME);
 119
 120         for (i = 0; i < ARRAY_SIZE(channel_names); i++)
 121                 sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_names[i]);
 122
 123         sdi->priv = devc;
 124
 125         /* We will open the device again when we need it. */
 126         ftdi_list_free(&devlist);
 127
 128         return std_scan_complete(di, g_slist_append(NULL, sdi));
 129
 130 free:
 131         ftdi_deinit(&devc->ftdic);
 132         g_free(devc);
 133         return NULL;
 134 }
 135
 136 static int dev_open(struct sr_dev_inst *sdi)
 137 {
 138         struct dev_context *devc;
 139         int ret;
 140
 141         devc = sdi->priv;
 142
 143         if ((ret = ftdi_usb_open_desc(&devc->ftdic,
 144                         USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
 145                 sr_err("Failed to open device (%d): %s.",
 146                        ret, ftdi_get_error_string(&devc->ftdic));
 147                 return SR_ERR;
 148         }
 149
 150         return SR_OK;
 151 }
 152
 153 static int dev_close(struct sr_dev_inst *sdi)
 154 {
 155         struct dev_context *devc;
 156
 157         devc = sdi->priv;
 158
 159         ftdi_usb_close(&devc->ftdic);
 160
 161         sdi->status = SR_ST_INACTIVE;
 162
 163         return SR_OK;
 164 }
 165
 166 static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
 167                 const struct sr_channel_group *cg)
 168 {
 169         struct dev_context *devc;
 170
 171         (void)cg;
 172
 173         if (!sdi)
 174                 return SR_ERR;
 175         devc = sdi->priv;
 176
 177         switch (key) {
 178         case SR_CONF_SAMPLERATE:
 179                 *data = g_variant_new_uint64(devc->cur_samplerate);
 180                 break;
 181         case SR_CONF_LIMIT_MSEC:
 182                 *data = g_variant_new_uint64(devc->limit_msec);
 183                 break;
 184         case SR_CONF_LIMIT_SAMPLES:
 185                 *data = g_variant_new_uint64(devc->limit_samples);
 186                 break;
 187 #if ASIX_SIGMA_WITH_TRIGGER
 188         case SR_CONF_CAPTURE_RATIO:
 189                 *data = g_variant_new_uint64(devc->capture_ratio);
 190                 break;
 191 #endif
 192         default:
 193                 return SR_ERR_NA;
 194         }
 195
 196         return SR_OK;
 197 }
 198
 199 static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
 200                 const struct sr_channel_group *cg)
 201 {
 202         struct dev_context *devc;
 203         uint64_t tmp;
 204         int ret;
 205
 206         (void)cg;
 207
 208         devc = sdi->priv;
 209
 210         ret = SR_OK;
 211         switch (key) {
 212         case SR_CONF_SAMPLERATE:
 213                 ret = sigma_set_samplerate(sdi, g_variant_get_uint64(data));
 214                 break;
 215         case SR_CONF_LIMIT_MSEC:
 216                 tmp = g_variant_get_uint64(data);
 217                 if (tmp > 0)
 218                         devc->limit_msec = g_variant_get_uint64(data);
 219                 else
 220                         ret = SR_ERR;
 221                 break;
 222         case SR_CONF_LIMIT_SAMPLES:
 223                 tmp = g_variant_get_uint64(data);
 224                 devc->limit_samples = tmp;
 225                 devc->limit_msec = sigma_limit_samples_to_msec(devc, tmp);
 226                 break;
 227 #if ASIX_SIGMA_WITH_TRIGGER
 228         case SR_CONF_CAPTURE_RATIO:
 229                 tmp = g_variant_get_uint64(data);
 230                 if (tmp > 100)
 231                         return SR_ERR;
 232                 devc->capture_ratio = tmp;
 233                 break;
 234 #endif
 235         default:
 236                 ret = SR_ERR_NA;
 237         }
 238
 239         return ret;
 240 }
 241
 242 static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
 243                 const struct sr_channel_group *cg)
 244 {
 245         GVariant *gvar;
 246         GVariantBuilder gvb;
 247
 248         (void)cg;
 249
 250         switch (key) {
 251         case SR_CONF_DEVICE_OPTIONS:
 252                 if (!sdi)
 253                         *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
 254                                         drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
 255                 else
 256                         *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
 257                                         devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
 258                 break;
 259         case SR_CONF_SAMPLERATE:
 260                 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
 261                 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
 262                                 samplerates_count, sizeof(samplerates[0]));
 263                 g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
 264                 *data = g_variant_builder_end(&gvb);
 265                 break;
 266 #if ASIX_SIGMA_WITH_TRIGGER
 267         case SR_CONF_TRIGGER_MATCH:
 268                 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
 269                                 trigger_matches, ARRAY_SIZE(trigger_matches),
 270                                 sizeof(int32_t));
 271                 break;
 272 #endif
 273         default:
 274                 return SR_ERR_NA;
 275         }
 276
 277         return SR_OK;
 278 }
 279
 280 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 281 {
 282         struct dev_context *devc;
 283         struct clockselect_50 clockselect;
 284         int triggerpin, ret;
 285         uint8_t triggerselect;
 286         struct triggerinout triggerinout_conf;
 287         struct triggerlut lut;
 288         uint8_t regval;
 289         uint8_t clock_bytes[sizeof(clockselect)];
 290         size_t clock_idx;
 291
 292         devc = sdi->priv;
 293
 294         if (sigma_convert_trigger(sdi) != SR_OK) {
 295                 sr_err("Failed to configure triggers.");
 296                 return SR_ERR;
 297         }
 298
 299         /* If the samplerate has not been set, default to 200 kHz. */
 300         if (devc->cur_firmware == -1) {
 301                 if ((ret = sigma_set_samplerate(sdi, SR_KHZ(200))) != SR_OK)
 302                         return ret;
 303         }
 304
 305         /* Enter trigger programming mode. */
 306         sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, devc);
 307
 308         triggerselect = 0;
 309         if (devc->cur_samplerate >= SR_MHZ(100)) {
 310                 /* 100 and 200 MHz mode. */
 311                 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, devc);
 312
 313                 /* Find which pin to trigger on from mask. */
 314                 for (triggerpin = 0; triggerpin < 8; triggerpin++)
 315                         if ((devc->trigger.risingmask | devc->trigger.fallingmask) &
 316                             (1 << triggerpin))
 317                                 break;
 318
 319                 /* Set trigger pin and light LED on trigger. */
 320                 triggerselect = (1 << LEDSEL1) | (triggerpin & 0x7);
 321
 322                 /* Default rising edge. */
 323                 if (devc->trigger.fallingmask)
 324                         triggerselect |= 1 << 3;
 325
 326         } else if (devc->cur_samplerate <= SR_MHZ(50)) {
 327                 /* All other modes. */
 328                 sigma_build_basic_trigger(&lut, devc);
 329
 330                 sigma_write_trigger_lut(&lut, devc);
 331
 332                 triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0);
 333         }
 334
 335         /* Setup trigger in and out pins to default values. */
 336         memset(&triggerinout_conf, 0, sizeof(struct triggerinout));
 337         triggerinout_conf.trgout_bytrigger = 1;
 338         triggerinout_conf.trgout_enable = 1;
 339
 340         sigma_write_register(WRITE_TRIGGER_OPTION,
 341                              (uint8_t *) &triggerinout_conf,
 342                              sizeof(struct triggerinout), devc);
 343
 344         /* Go back to normal mode. */
 345         sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, devc);
 346
 347         /* Set clock select register. */
 348         clockselect.async = 0;
 349         clockselect.fraction = 1 - 1;           /* Divider 1. */
 350         clockselect.disabled_channels = 0x0000; /* All channels enabled. */
 351         if (devc->cur_samplerate == SR_MHZ(200)) {
 352                 /* Enable 4 channels. */
 353                 clockselect.disabled_channels = 0xf0ff;
 354         } else if (devc->cur_samplerate == SR_MHZ(100)) {
 355                 /* Enable 8 channels. */
 356                 clockselect.disabled_channels = 0x00ff;
 357         } else {
 358                 /*
 359                  * 50 MHz mode, or fraction thereof. The 50MHz reference
 360                  * can get divided by any integer in the range 1 to 256.
 361                  * Divider minus 1 gets written to the hardware.
 362                  * (The driver lists a discrete set of sample rates, but
 363                  * all of them fit the above description.)
 364                  */
 365                 clockselect.fraction = SR_MHZ(50) / devc->cur_samplerate - 1;
 366         }
 367         clock_idx = 0;
 368         clock_bytes[clock_idx++] = clockselect.async;
 369         clock_bytes[clock_idx++] = clockselect.fraction;
 370         clock_bytes[clock_idx++] = clockselect.disabled_channels & 0xff;
 371         clock_bytes[clock_idx++] = clockselect.disabled_channels >> 8;
 372         sigma_write_register(WRITE_CLOCK_SELECT, clock_bytes, clock_idx, devc);
 373
 374         /* Setup maximum post trigger time. */
 375         sigma_set_register(WRITE_POST_TRIGGER,
 376                            (devc->capture_ratio * 255) / 100, devc);
 377
 378         /* Start acqusition. */
 379         devc->start_time = g_get_monotonic_time();
 380         regval =  WMR_TRGRES | WMR_SDRAMWRITEEN;
 381 #if ASIX_SIGMA_WITH_TRIGGER
 382         regval |= WMR_TRGEN;
 383 #endif
 384         sigma_set_register(WRITE_MODE, regval, devc);
 385
 386         std_session_send_df_header(sdi);
 387
 388         /* Add capture source. */
 389         sr_session_source_add(sdi->session, -1, 0, 10, sigma_receive_data, (void *)sdi);
 390
 391         devc->state.state = SIGMA_CAPTURE;
 392
 393         return SR_OK;
 394 }
 395
 396 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
 397 {
 398         struct dev_context *devc;
 399
 400         devc = sdi->priv;
 401         devc->state.state = SIGMA_IDLE;
 402
 403         sr_session_source_remove(sdi->session, -1);
 404
 405         return SR_OK;
 406 }
 407
 408 static struct sr_dev_driver asix_sigma_driver_info = {
 409         .name = "asix-sigma",
 410         .longname = "ASIX SIGMA/SIGMA2",
 411         .api_version = 1,
 412         .init = std_init,
 413         .cleanup = std_cleanup,
 414         .scan = scan,
 415         .dev_list = std_dev_list,
 416         .dev_clear = dev_clear,
 417         .config_get = config_get,
 418         .config_set = config_set,
 419         .config_list = config_list,
 420         .dev_open = dev_open,
 421         .dev_close = dev_close,
 422         .dev_acquisition_start = dev_acquisition_start,
 423         .dev_acquisition_stop = dev_acquisition_stop,
 424         .context = NULL,
 425 };
 426 SR_REGISTER_DEV_DRIVER(asix_sigma_driver_info);