src/hardware/asix-sigma/api.c

   1 /*
   2  * This file is part of the libsigrok project.
   3  *
   4  * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
   5  * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
   6  * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
   7  *
   8  * This program is free software: you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation, either version 3 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 /*
  23  * ASIX SIGMA/SIGMA2 logic analyzer driver
  24  */
  25
  26 #include <config.h>
  27 #include "protocol.h"
  28
  29 /*
  30  * Channel numbers seem to go from 1-16, according to this image:
  31  * http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg
  32  * (the cable has two additional GND pins, and a TI and TO pin)
  33  */
  34 static const char *channel_names[] = {
  35         "1", "2", "3", "4", "5", "6", "7", "8",
  36         "9", "10", "11", "12", "13", "14", "15", "16",
  37 };
  38
  39 static const uint32_t drvopts[] = {
  40         SR_CONF_LOGIC_ANALYZER,
  41 };
  42
  43 static const uint32_t devopts[] = {
  44         SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
  45         SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
  46         SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
  47 #if ASIX_SIGMA_WITH_TRIGGER
  48         SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
  49         SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
  50 #endif
  51 };
  52
  53 #if ASIX_SIGMA_WITH_TRIGGER
  54 static const int32_t trigger_matches[] = {
  55         SR_TRIGGER_ZERO,
  56         SR_TRIGGER_ONE,
  57         SR_TRIGGER_RISING,
  58         SR_TRIGGER_FALLING,
  59 };
  60 #endif
  61
  62 static int dev_clear(const struct sr_dev_driver *di)
  63 {
  64         return std_dev_clear(di, sigma_clear_helper);
  65 }
  66
  67 static GSList *scan(struct sr_dev_driver *di, GSList *options)
  68 {
  69         struct sr_dev_inst *sdi;
  70         struct dev_context *devc;
  71         struct ftdi_device_list *devlist;
  72         char serial_txt[10];
  73         uint32_t serial;
  74         int ret;
  75         unsigned int i;
  76
  77         (void)options;
  78
  79         devc = g_malloc0(sizeof(struct dev_context));
  80
  81         ftdi_init(&devc->ftdic);
  82
  83         /* Look for SIGMAs. */
  84
  85         if ((ret = ftdi_usb_find_all(&devc->ftdic, &devlist,
  86             USB_VENDOR, USB_PRODUCT)) <= 0) {
  87                 if (ret < 0)
  88                         sr_err("ftdi_usb_find_all(): %d", ret);
  89                 goto free;
  90         }
  91
  92         /* Make sure it's a version 1 or 2 SIGMA. */
  93         ftdi_usb_get_strings(&devc->ftdic, devlist->dev, NULL, 0, NULL, 0,
  94                              serial_txt, sizeof(serial_txt));
  95         sscanf(serial_txt, "%x", &serial);
  96
  97         if (serial < 0xa6010000 || serial > 0xa602ffff) {
  98                 sr_err("Only SIGMA and SIGMA2 are supported "
  99                        "in this version of libsigrok.");
 100                 goto free;
 101         }
 102
 103         sr_info("Found ASIX SIGMA - Serial: %s", serial_txt);
 104
 105         devc->cur_samplerate = samplerates[0];
 106         devc->limit_msec = 0;
 107         devc->limit_samples = 0;
 108         devc->cur_firmware = -1;
 109         devc->num_channels = 0;
 110         devc->samples_per_event = 0;
 111         devc->capture_ratio = 50;
 112         devc->use_triggers = 0;
 113
 114         /* Register SIGMA device. */
 115         sdi = g_malloc0(sizeof(struct sr_dev_inst));
 116         sdi->status = SR_ST_INITIALIZING;
 117         sdi->vendor = g_strdup(USB_VENDOR_NAME);
 118         sdi->model = g_strdup(USB_MODEL_NAME);
 119
 120         for (i = 0; i < ARRAY_SIZE(channel_names); i++)
 121                 sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_names[i]);
 122
 123         sdi->priv = devc;
 124
 125         /* We will open the device again when we need it. */
 126         ftdi_list_free(&devlist);
 127
 128         return std_scan_complete(di, g_slist_append(NULL, sdi));
 129
 130 free:
 131         ftdi_deinit(&devc->ftdic);
 132         g_free(devc);
 133         return NULL;
 134 }
 135
 136 static int dev_open(struct sr_dev_inst *sdi)
 137 {
 138         struct dev_context *devc;
 139         int ret;
 140
 141         devc = sdi->priv;
 142
 143         if ((ret = ftdi_usb_open_desc(&devc->ftdic,
 144                         USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
 145                 sr_err("Failed to open device (%d): %s.",
 146                        ret, ftdi_get_error_string(&devc->ftdic));
 147                 return SR_ERR;
 148         }
 149
 150         return SR_OK;
 151 }
 152
 153 static int dev_close(struct sr_dev_inst *sdi)
 154 {
 155         struct dev_context *devc;
 156
 157         devc = sdi->priv;
 158
 159         return (ftdi_usb_close(&devc->ftdic) == 0) ? SR_OK : SR_ERR;
 160 }
 161
 162 static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
 163                 const struct sr_channel_group *cg)
 164 {
 165         struct dev_context *devc;
 166
 167         (void)cg;
 168
 169         if (!sdi)
 170                 return SR_ERR;
 171         devc = sdi->priv;
 172
 173         switch (key) {
 174         case SR_CONF_SAMPLERATE:
 175                 *data = g_variant_new_uint64(devc->cur_samplerate);
 176                 break;
 177         case SR_CONF_LIMIT_MSEC:
 178                 *data = g_variant_new_uint64(devc->limit_msec);
 179                 break;
 180         case SR_CONF_LIMIT_SAMPLES:
 181                 *data = g_variant_new_uint64(devc->limit_samples);
 182                 break;
 183 #if ASIX_SIGMA_WITH_TRIGGER
 184         case SR_CONF_CAPTURE_RATIO:
 185                 *data = g_variant_new_uint64(devc->capture_ratio);
 186                 break;
 187 #endif
 188         default:
 189                 return SR_ERR_NA;
 190         }
 191
 192         return SR_OK;
 193 }
 194
 195 static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
 196                 const struct sr_channel_group *cg)
 197 {
 198         struct dev_context *devc;
 199         uint64_t tmp;
 200         int ret;
 201
 202         (void)cg;
 203
 204         devc = sdi->priv;
 205
 206         ret = SR_OK;
 207         switch (key) {
 208         case SR_CONF_SAMPLERATE:
 209                 ret = sigma_set_samplerate(sdi, g_variant_get_uint64(data));
 210                 break;
 211         case SR_CONF_LIMIT_MSEC:
 212                 tmp = g_variant_get_uint64(data);
 213                 if (tmp > 0)
 214                         devc->limit_msec = g_variant_get_uint64(data);
 215                 else
 216                         ret = SR_ERR;
 217                 break;
 218         case SR_CONF_LIMIT_SAMPLES:
 219                 tmp = g_variant_get_uint64(data);
 220                 devc->limit_samples = tmp;
 221                 devc->limit_msec = sigma_limit_samples_to_msec(devc, tmp);
 222                 break;
 223 #if ASIX_SIGMA_WITH_TRIGGER
 224         case SR_CONF_CAPTURE_RATIO:
 225                 tmp = g_variant_get_uint64(data);
 226                 if (tmp > 100)
 227                         return SR_ERR;
 228                 devc->capture_ratio = tmp;
 229                 break;
 230 #endif
 231         default:
 232                 ret = SR_ERR_NA;
 233         }
 234
 235         return ret;
 236 }
 237
 238 static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
 239                 const struct sr_channel_group *cg)
 240 {
 241         GVariant *gvar;
 242         GVariantBuilder gvb;
 243
 244         (void)cg;
 245
 246         switch (key) {
 247         case SR_CONF_DEVICE_OPTIONS:
 248                 if (!sdi)
 249                         *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
 250                                         drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
 251                 else
 252                         *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
 253                                         devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
 254                 break;
 255         case SR_CONF_SAMPLERATE:
 256                 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
 257                 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
 258                                 samplerates_count, sizeof(samplerates[0]));
 259                 g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
 260                 *data = g_variant_builder_end(&gvb);
 261                 break;
 262 #if ASIX_SIGMA_WITH_TRIGGER
 263         case SR_CONF_TRIGGER_MATCH:
 264                 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
 265                                 trigger_matches, ARRAY_SIZE(trigger_matches),
 266                                 sizeof(int32_t));
 267                 break;
 268 #endif
 269         default:
 270                 return SR_ERR_NA;
 271         }
 272
 273         return SR_OK;
 274 }
 275
 276 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 277 {
 278         struct dev_context *devc;
 279         struct clockselect_50 clockselect;
 280         int triggerpin, ret;
 281         uint8_t triggerselect;
 282         struct triggerinout triggerinout_conf;
 283         struct triggerlut lut;
 284         uint8_t regval;
 285         uint8_t clock_bytes[sizeof(clockselect)];
 286         size_t clock_idx;
 287
 288         devc = sdi->priv;
 289
 290         if (sigma_convert_trigger(sdi) != SR_OK) {
 291                 sr_err("Failed to configure triggers.");
 292                 return SR_ERR;
 293         }
 294
 295         /* If the samplerate has not been set, default to 200 kHz. */
 296         if (devc->cur_firmware == -1) {
 297                 if ((ret = sigma_set_samplerate(sdi, SR_KHZ(200))) != SR_OK)
 298                         return ret;
 299         }
 300
 301         /* Enter trigger programming mode. */
 302         sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, devc);
 303
 304         triggerselect = 0;
 305         if (devc->cur_samplerate >= SR_MHZ(100)) {
 306                 /* 100 and 200 MHz mode. */
 307                 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, devc);
 308
 309                 /* Find which pin to trigger on from mask. */
 310                 for (triggerpin = 0; triggerpin < 8; triggerpin++)
 311                         if ((devc->trigger.risingmask | devc->trigger.fallingmask) &
 312                             (1 << triggerpin))
 313                                 break;
 314
 315                 /* Set trigger pin and light LED on trigger. */
 316                 triggerselect = (1 << LEDSEL1) | (triggerpin & 0x7);
 317
 318                 /* Default rising edge. */
 319                 if (devc->trigger.fallingmask)
 320                         triggerselect |= 1 << 3;
 321
 322         } else if (devc->cur_samplerate <= SR_MHZ(50)) {
 323                 /* All other modes. */
 324                 sigma_build_basic_trigger(&lut, devc);
 325
 326                 sigma_write_trigger_lut(&lut, devc);
 327
 328                 triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0);
 329         }
 330
 331         /* Setup trigger in and out pins to default values. */
 332         memset(&triggerinout_conf, 0, sizeof(struct triggerinout));
 333         triggerinout_conf.trgout_bytrigger = 1;
 334         triggerinout_conf.trgout_enable = 1;
 335
 336         sigma_write_register(WRITE_TRIGGER_OPTION,
 337                              (uint8_t *) &triggerinout_conf,
 338                              sizeof(struct triggerinout), devc);
 339
 340         /* Go back to normal mode. */
 341         sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, devc);
 342
 343         /* Set clock select register. */
 344         clockselect.async = 0;
 345         clockselect.fraction = 1 - 1;           /* Divider 1. */
 346         clockselect.disabled_channels = 0x0000; /* All channels enabled. */
 347         if (devc->cur_samplerate == SR_MHZ(200)) {
 348                 /* Enable 4 channels. */
 349                 clockselect.disabled_channels = 0xf0ff;
 350         } else if (devc->cur_samplerate == SR_MHZ(100)) {
 351                 /* Enable 8 channels. */
 352                 clockselect.disabled_channels = 0x00ff;
 353         } else {
 354                 /*
 355                  * 50 MHz mode, or fraction thereof. The 50MHz reference
 356                  * can get divided by any integer in the range 1 to 256.
 357                  * Divider minus 1 gets written to the hardware.
 358                  * (The driver lists a discrete set of sample rates, but
 359                  * all of them fit the above description.)
 360                  */
 361                 clockselect.fraction = SR_MHZ(50) / devc->cur_samplerate - 1;
 362         }
 363         clock_idx = 0;
 364         clock_bytes[clock_idx++] = clockselect.async;
 365         clock_bytes[clock_idx++] = clockselect.fraction;
 366         clock_bytes[clock_idx++] = clockselect.disabled_channels & 0xff;
 367         clock_bytes[clock_idx++] = clockselect.disabled_channels >> 8;
 368         sigma_write_register(WRITE_CLOCK_SELECT, clock_bytes, clock_idx, devc);
 369
 370         /* Setup maximum post trigger time. */
 371         sigma_set_register(WRITE_POST_TRIGGER,
 372                            (devc->capture_ratio * 255) / 100, devc);
 373
 374         /* Start acqusition. */
 375         devc->start_time = g_get_monotonic_time();
 376         regval =  WMR_TRGRES | WMR_SDRAMWRITEEN;
 377 #if ASIX_SIGMA_WITH_TRIGGER
 378         regval |= WMR_TRGEN;
 379 #endif
 380         sigma_set_register(WRITE_MODE, regval, devc);
 381
 382         std_session_send_df_header(sdi);
 383
 384         /* Add capture source. */
 385         sr_session_source_add(sdi->session, -1, 0, 10, sigma_receive_data, (void *)sdi);
 386
 387         devc->state.state = SIGMA_CAPTURE;
 388
 389         return SR_OK;
 390 }
 391
 392 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
 393 {
 394         struct dev_context *devc;
 395
 396         devc = sdi->priv;
 397         devc->state.state = SIGMA_IDLE;
 398
 399         sr_session_source_remove(sdi->session, -1);
 400
 401         return SR_OK;
 402 }
 403
 404 static struct sr_dev_driver asix_sigma_driver_info = {
 405         .name = "asix-sigma",
 406         .longname = "ASIX SIGMA/SIGMA2",
 407         .api_version = 1,
 408         .init = std_init,
 409         .cleanup = std_cleanup,
 410         .scan = scan,
 411         .dev_list = std_dev_list,
 412         .dev_clear = dev_clear,
 413         .config_get = config_get,
 414         .config_set = config_set,
 415         .config_list = config_list,
 416         .dev_open = dev_open,
 417         .dev_close = dev_close,
 418         .dev_acquisition_start = dev_acquisition_start,
 419         .dev_acquisition_stop = dev_acquisition_stop,
 420         .context = NULL,
 421 };
 422 SR_REGISTER_DEV_DRIVER(asix_sigma_driver_info);