2 * This file is part of the libsigrok project.
4 * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
5 * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
6 * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
7 * Copyright (C) 2020 Gerhard Sittig <gerhard.sittig@gmx.net>
9 * This program is free software: you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation, either version 3 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program. If not, see <http://www.gnu.org/licenses/>.
27 * Channel numbers seem to go from 1-16, according to this image:
28 * http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg
29 * (the cable has two additional GND pins, and a TI and TO pin)
31 static const char *channel_names[] = {
32 "1", "2", "3", "4", "5", "6", "7", "8",
33 "9", "10", "11", "12", "13", "14", "15", "16",
36 static const uint32_t scanopts[] = {
40 static const uint32_t drvopts[] = {
41 SR_CONF_LOGIC_ANALYZER,
44 static const uint32_t devopts[] = {
45 SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
46 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
47 SR_CONF_CONN | SR_CONF_GET,
48 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
49 #if ASIX_SIGMA_WITH_TRIGGER
50 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
51 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
55 #if ASIX_SIGMA_WITH_TRIGGER
56 static const int32_t trigger_matches[] = {
64 static void clear_helper(struct dev_context *devc)
66 ftdi_deinit(&devc->ftdic);
69 static int dev_clear(const struct sr_dev_driver *di)
71 return std_dev_clear_with_callback(di,
72 (std_dev_clear_callback)clear_helper);
75 static gboolean bus_addr_in_devices(int bus, int addr, GSList *devs)
77 struct sr_usb_dev_inst *usb;
79 for (/* EMPTY */; devs; devs = devs->next) {
81 if (usb->bus == bus && usb->address == addr)
88 static gboolean known_vid_pid(const struct libusb_device_descriptor *des)
90 gboolean is_sigma, is_omega;
92 if (des->idVendor != USB_VENDOR_ASIX)
94 is_sigma = des->idProduct == USB_PRODUCT_SIGMA;
95 is_omega = des->idProduct == USB_PRODUCT_OMEGA;
96 if (!is_sigma && !is_omega)
101 static GSList *scan(struct sr_dev_driver *di, GSList *options)
103 struct drv_context *drvc;
104 libusb_context *usbctx;
106 GSList *l, *conn_devices;
107 struct sr_config *src;
109 libusb_device **devlist, *devitem;
111 struct libusb_device_descriptor des;
112 struct libusb_device_handle *hdl;
117 long serno_num, serno_pre;
118 enum asix_device_type dev_type;
119 const char *dev_text;
120 struct sr_dev_inst *sdi;
121 struct dev_context *devc;
122 size_t devidx, chidx;
125 usbctx = drvc->sr_ctx->libusb_ctx;
127 /* Find all devices which match an (optional) conn= spec. */
129 for (l = options; l; l = l->next) {
133 conn = g_variant_get_string(src->data, NULL);
139 conn_devices = sr_usb_find(usbctx, conn);
140 if (conn && !conn_devices)
143 /* Find all ASIX logic analyzers (which match the connection spec). */
145 libusb_get_device_list(usbctx, &devlist);
146 for (devidx = 0; devlist[devidx]; devidx++) {
147 devitem = devlist[devidx];
149 /* Check for connection match if a user spec was given. */
150 bus = libusb_get_bus_number(devitem);
151 addr = libusb_get_device_address(devitem);
152 if (conn && !bus_addr_in_devices(bus, addr, conn_devices))
154 snprintf(conn_id, sizeof(conn_id), "%d.%d", bus, addr);
157 * Check for known VID:PID pairs. Get the serial number,
158 * to then derive the device type from it.
160 libusb_get_device_descriptor(devitem, &des);
161 if (!known_vid_pid(&des))
163 if (!des.iSerialNumber) {
164 sr_warn("Cannot get serial number (index 0).");
167 ret = libusb_open(devitem, &hdl);
169 sr_warn("Cannot open USB device %04x.%04x: %s.",
170 des.idVendor, des.idProduct,
171 libusb_error_name(ret));
174 ret = libusb_get_string_descriptor_ascii(hdl,
176 (unsigned char *)serno_txt, sizeof(serno_txt));
178 sr_warn("Cannot get serial number (%s).",
179 libusb_error_name(ret));
186 * All ASIX logic analyzers have a serial number, which
187 * reads as a hex number, and tells the device type.
189 ret = sr_atol_base(serno_txt, &serno_num, &end, 16);
190 if (ret != SR_OK || !end || *end) {
191 sr_warn("Cannot interpret serial number %s.", serno_txt);
194 dev_type = ASIX_TYPE_NONE;
196 serno_pre = serno_num >> 16;
199 dev_type = ASIX_TYPE_SIGMA;
201 sr_info("Found SIGMA, serno %s.", serno_txt);
204 dev_type = ASIX_TYPE_SIGMA;
206 sr_info("Found SIGMA2, serno %s.", serno_txt);
209 dev_type = ASIX_TYPE_OMEGA;
211 sr_info("Found OMEGA, serno %s.", serno_txt);
212 if (!ASIX_WITH_OMEGA) {
213 sr_warn("OMEGA support is not implemented yet.");
218 sr_warn("Unknown serno %s, skipping.", serno_txt);
222 /* Create a device instance, add it to the result set. */
224 sdi = g_malloc0(sizeof(*sdi));
225 devices = g_slist_append(devices, sdi);
226 sdi->status = SR_ST_INITIALIZING;
227 sdi->vendor = g_strdup("ASIX");
228 sdi->model = g_strdup(dev_text);
229 sdi->serial_num = g_strdup(serno_txt);
230 sdi->connection_id = g_strdup(conn_id);
231 for (chidx = 0; chidx < ARRAY_SIZE(channel_names); chidx++)
232 sr_channel_new(sdi, chidx, SR_CHANNEL_LOGIC,
233 TRUE, channel_names[chidx]);
235 devc = g_malloc0(sizeof(*devc));
237 devc->id.vid = des.idVendor;
238 devc->id.pid = des.idProduct;
239 devc->id.serno = serno_num;
240 devc->id.prefix = serno_pre;
241 devc->id.type = dev_type;
242 devc->samplerate = samplerates[0];
243 sr_sw_limits_init(&devc->cfg_limits);
244 devc->firmware_idx = SIGMA_FW_NONE;
245 devc->capture_ratio = 50;
246 devc->use_triggers = 0;
248 libusb_free_device_list(devlist, 1);
249 g_slist_free_full(conn_devices, (GDestroyNotify)sr_usb_dev_inst_free);
251 return std_scan_complete(di, devices);
254 static int dev_open(struct sr_dev_inst *sdi)
256 struct dev_context *devc;
263 if (devc->id.type == ASIX_TYPE_OMEGA && !ASIX_WITH_OMEGA) {
264 sr_err("OMEGA support is not implemented yet.");
269 serno = sdi->serial_num;
271 ret = ftdi_init(&devc->ftdic);
273 sr_err("Cannot initialize FTDI context (%d): %s.",
274 ret, ftdi_get_error_string(&devc->ftdic));
277 ret = ftdi_usb_open_desc_index(&devc->ftdic, vid, pid, NULL, serno, 0);
279 sr_err("Cannot open device (%d): %s.",
280 ret, ftdi_get_error_string(&devc->ftdic));
287 static int dev_close(struct sr_dev_inst *sdi)
289 struct dev_context *devc;
294 ret = ftdi_usb_close(&devc->ftdic);
295 ftdi_deinit(&devc->ftdic);
297 return (ret == 0) ? SR_OK : SR_ERR;
300 static int config_get(uint32_t key, GVariant **data,
301 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
303 struct dev_context *devc;
313 *data = g_variant_new_string(sdi->connection_id);
315 case SR_CONF_SAMPLERATE:
316 *data = g_variant_new_uint64(devc->samplerate);
318 case SR_CONF_LIMIT_MSEC:
319 case SR_CONF_LIMIT_SAMPLES:
320 return sr_sw_limits_config_get(&devc->cfg_limits, key, data);
321 #if ASIX_SIGMA_WITH_TRIGGER
322 case SR_CONF_CAPTURE_RATIO:
323 *data = g_variant_new_uint64(devc->capture_ratio);
333 static int config_set(uint32_t key, GVariant *data,
334 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
336 struct dev_context *devc;
338 uint64_t want_rate, have_rate;
345 case SR_CONF_SAMPLERATE:
346 want_rate = g_variant_get_uint64(data);
347 ret = sigma_normalize_samplerate(want_rate, &have_rate);
350 if (have_rate != want_rate) {
351 char *text_want, *text_have;
352 text_want = sr_samplerate_string(want_rate);
353 text_have = sr_samplerate_string(have_rate);
354 sr_info("Adjusted samplerate %s to %s.",
355 text_want, text_have);
359 devc->samplerate = have_rate;
361 case SR_CONF_LIMIT_MSEC:
362 case SR_CONF_LIMIT_SAMPLES:
363 return sr_sw_limits_config_set(&devc->cfg_limits, key, data);
364 #if ASIX_SIGMA_WITH_TRIGGER
365 case SR_CONF_CAPTURE_RATIO:
366 devc->capture_ratio = g_variant_get_uint64(data);
376 static int config_list(uint32_t key, GVariant **data,
377 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
380 case SR_CONF_SCAN_OPTIONS:
381 case SR_CONF_DEVICE_OPTIONS:
384 return STD_CONFIG_LIST(key, data, sdi, cg,
385 scanopts, drvopts, devopts);
386 case SR_CONF_SAMPLERATE:
387 *data = std_gvar_samplerates(samplerates, samplerates_count);
389 #if ASIX_SIGMA_WITH_TRIGGER
390 case SR_CONF_TRIGGER_MATCH:
391 *data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches));
401 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
403 struct dev_context *devc;
404 struct clockselect_50 clockselect;
406 uint8_t triggerselect;
407 struct triggerinout triggerinout_conf;
408 struct triggerlut lut;
409 uint8_t regval, trgconf_bytes[2], clock_bytes[4], *wrptr;
415 * Setup the device's samplerate from the value which up to now
416 * just got checked and stored. As a byproduct this can pick and
417 * send firmware to the device, reduce the number of available
418 * logic channels, etc.
420 * Determine an acquisition timeout from optionally configured
421 * sample count or time limits. Which depends on the samplerate.
423 ret = sigma_set_samplerate(sdi);
426 ret = sigma_set_acquire_timeout(devc);
430 ret = sigma_convert_trigger(sdi);
432 sr_err("Could not configure triggers.");
436 /* Enter trigger programming mode. */
437 ret = sigma_set_register(devc, WRITE_TRIGGER_SELECT2, 0x20);
442 if (devc->samplerate >= SR_MHZ(100)) {
443 /* 100 and 200 MHz mode. */
444 ret = sigma_set_register(devc, WRITE_TRIGGER_SELECT2, 0x81);
448 /* Find which pin to trigger on from mask. */
449 for (triggerpin = 0; triggerpin < 8; triggerpin++) {
450 if (devc->trigger.risingmask & (1 << triggerpin))
452 if (devc->trigger.fallingmask & (1 << triggerpin))
456 /* Set trigger pin and light LED on trigger. */
457 triggerselect = TRGSEL2_LEDSEL1 | (triggerpin & 0x7);
459 /* Default rising edge. */
460 if (devc->trigger.fallingmask)
461 triggerselect |= 1 << 3;
463 } else if (devc->samplerate <= SR_MHZ(50)) {
464 /* All other modes. */
465 ret = sigma_build_basic_trigger(devc, &lut);
469 ret = sigma_write_trigger_lut(devc, &lut);
473 triggerselect = TRGSEL2_LEDSEL1 | TRGSEL2_LEDSEL0;
476 /* Setup trigger in and out pins to default values. */
477 memset(&triggerinout_conf, 0, sizeof(triggerinout_conf));
478 triggerinout_conf.trgout_bytrigger = 1;
479 triggerinout_conf.trgout_enable = 1;
481 * Verify the correctness of this implementation. The previous
482 * version used to assign to a C language struct with bit fields
483 * which is highly non-portable and hard to guess the resulting
484 * raw memory layout or wire transfer content. The C struct's
485 * field names did not match the vendor documentation's names.
486 * Which means that I could not verify "on paper" either. Let's
487 * re-visit this code later during research for trigger support.
489 wrptr = trgconf_bytes;
491 if (triggerinout_conf.trgout_bytrigger)
492 regval |= TRGOPT_TRGOOUTEN;
493 write_u8_inc(&wrptr, regval);
494 regval &= ~TRGOPT_CLEAR_MASK;
495 if (triggerinout_conf.trgout_enable)
496 regval |= TRGOPT_TRGOEN;
497 write_u8_inc(&wrptr, regval);
498 count = wrptr - trgconf_bytes;
499 ret = sigma_write_register(devc, WRITE_TRIGGER_OPTION,
500 trgconf_bytes, count);
504 /* Leave trigger programming mode. */
505 ret = sigma_set_register(devc, WRITE_TRIGGER_SELECT2, triggerselect);
509 /* Set clock select register. */
510 clockselect.async = 0;
511 clockselect.fraction = 1; /* Divider 1. */
512 clockselect.disabled_channels = 0x0000; /* All channels enabled. */
513 if (devc->samplerate == SR_MHZ(200)) {
514 /* Enable 4 channels. */
515 clockselect.disabled_channels = 0xfff0;
516 } else if (devc->samplerate == SR_MHZ(100)) {
517 /* Enable 8 channels. */
518 clockselect.disabled_channels = 0xff00;
521 * 50 MHz mode, or fraction thereof. The 50MHz reference
522 * can get divided by any integer in the range 1 to 256.
523 * Divider minus 1 gets written to the hardware.
524 * (The driver lists a discrete set of sample rates, but
525 * all of them fit the above description.)
527 clockselect.fraction = SR_MHZ(50) / devc->samplerate;
530 write_u8_inc(&wrptr, clockselect.async);
531 write_u8_inc(&wrptr, clockselect.fraction - 1);
532 write_u16be_inc(&wrptr, clockselect.disabled_channels);
533 count = wrptr - clock_bytes;
534 ret = sigma_write_register(devc, WRITE_CLOCK_SELECT, clock_bytes, count);
538 /* Setup maximum post trigger time. */
539 ret = sigma_set_register(devc, WRITE_POST_TRIGGER,
540 (devc->capture_ratio * 255) / 100);
544 /* Start acqusition. */
545 regval = WMR_TRGRES | WMR_SDRAMWRITEEN;
546 #if ASIX_SIGMA_WITH_TRIGGER
549 ret = sigma_set_register(devc, WRITE_MODE, regval);
553 ret = std_session_send_df_header(sdi);
557 /* Add capture source. */
558 ret = sr_session_source_add(sdi->session, -1, 0, 10,
559 sigma_receive_data, (void *)sdi);
563 devc->state.state = SIGMA_CAPTURE;
568 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
570 struct dev_context *devc;
575 * When acquisition is currently running, keep the receive
576 * routine registered and have it stop the acquisition upon the
577 * next invocation. Else unregister the receive routine here
578 * already. The detour is required to have sample data retrieved
579 * for forced acquisition stops.
581 if (devc->state.state == SIGMA_CAPTURE) {
582 devc->state.state = SIGMA_STOPPING;
584 devc->state.state = SIGMA_IDLE;
585 (void)sr_session_source_remove(sdi->session, -1);
591 static struct sr_dev_driver asix_sigma_driver_info = {
592 .name = "asix-sigma",
593 .longname = "ASIX SIGMA/SIGMA2",
596 .cleanup = std_cleanup,
598 .dev_list = std_dev_list,
599 .dev_clear = dev_clear,
600 .config_get = config_get,
601 .config_set = config_set,
602 .config_list = config_list,
603 .dev_open = dev_open,
604 .dev_close = dev_close,
605 .dev_acquisition_start = dev_acquisition_start,
606 .dev_acquisition_stop = dev_acquisition_stop,
609 SR_REGISTER_DEV_DRIVER(asix_sigma_driver_info);