hardware/rigol-ds/protocol.c

   1 /*
   2  * This file is part of the libsigrok project.
   3  *
   4  * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
   5  * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
   6  * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
   7  *
   8  * This program is free software: you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation, either version 3 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 #include <stdlib.h>
  23 #include <stdarg.h>
  24 #include <unistd.h>
  25 #include <errno.h>
  26 #include <string.h>
  27 #include <math.h>
  28 #include <ctype.h>
  29 #include <time.h>
  30 #include <glib.h>
  31 #include "libsigrok.h"
  32 #include "libsigrok-internal.h"
  33 #include "protocol.h"
  34
  35 /*
  36  * This is a unified protocol driver for the DS1000 and DS2000 series.
  37  *
  38  * DS1000 support tested with a Rigol DS1102D.
  39  *
  40  * DS2000 support tested with a Rigol DS2072 using firmware version 01.01.00.02.
  41  *
  42  * The Rigol DS2000 series scopes try to adhere to the IEEE 488.2 (I think)
  43  * standard. If you want to read it - it costs real money...
  44  *
  45  * Every response from the scope has a linefeed appended because the
  46  * standard says so. In principle this could be ignored because sending the
  47  * next command clears the output queue of the scope. This driver tries to
  48  * avoid doing that because it may cause an error being generated inside the
  49  * scope and who knows what bugs the firmware has WRT this.
  50  *
  51  * Waveform data is transferred in a format called "arbitrary block program
  52  * data" specified in IEEE 488.2. See Agilents programming manuals for their
  53  * 2000/3000 series scopes for a nice description.
  54  *
  55  * Each data block from the scope has a header, e.g. "#900000001400".
  56  * The '#' marks the start of a block.
  57  * Next is one ASCII decimal digit between 1 and 9, this gives the number of
  58  * ASCII decimal digits following.
  59  * Last are the ASCII decimal digits giving the number of bytes (not
  60  * samples!) in the block.
  61  *
  62  * After this header as many data bytes as indicated follow.
  63  *
  64  * Each data block has a trailing linefeed too.
  65  */
  66
  67 static int parse_int(const char *str, int *ret)
  68 {
  69         char *e;
  70         long tmp;
  71
  72         errno = 0;
  73         tmp = strtol(str, &e, 10);
  74         if (e == str || *e != '\0') {
  75                 sr_dbg("Failed to parse integer: '%s'", str);
  76                 return SR_ERR;
  77         }
  78         if (errno) {
  79                 sr_dbg("Failed to parse integer: '%s', numerical overflow", str);
  80                 return SR_ERR;
  81         }
  82         if (tmp > INT_MAX || tmp < INT_MIN) {
  83                 sr_dbg("Failed to parse integer: '%s', value to large/small", str);
  84                 return SR_ERR;
  85         }
  86
  87         *ret = (int)tmp;
  88         return SR_OK;
  89 }
  90
  91 /* Set the next event to wait for in rigol_ds_receive */
  92 static void rigol_ds_set_wait_event(struct dev_context *devc, enum wait_events event)
  93 {
  94         if (event == WAIT_STOP)
  95                 devc->wait_status = 2;
  96         else
  97                 devc->wait_status = 1;
  98         devc->wait_event = event;
  99 }
 100
 101 /*
 102  * Waiting for a event will return a timeout after 2 to 3 seconds in order
 103  * to not block the application.
 104  */
 105 static int rigol_ds_event_wait(const struct sr_dev_inst *sdi, char status1, char status2)
 106 {
 107         char *buf;
 108         struct dev_context *devc;
 109         time_t start;
 110
 111         if (!(devc = sdi->priv))
 112                 return SR_ERR;
 113
 114         start = time(NULL);
 115
 116         /*
 117          * Trigger status may return:
 118          * "TD" or "T'D" - triggered
 119          * "AUTO"        - autotriggered
 120          * "RUN"         - running
 121          * "WAIT"        - waiting for trigger
 122          * "STOP"        - stopped
 123          */
 124
 125         if (devc->wait_status == 1) {
 126                 do {
 127                         if (time(NULL) - start >= 3) {
 128                                 sr_dbg("Timeout waiting for trigger");
 129                                 return SR_ERR_TIMEOUT;
 130                         }
 131
 132                         if (sr_scpi_get_string(sdi->conn, ":TRIG:STAT?", &buf) != SR_OK)
 133                                 return SR_ERR;
 134                 } while (buf[0] == status1 || buf[0] == status2);
 135
 136                 devc->wait_status = 2;
 137         }
 138         if (devc->wait_status == 2) {
 139                 do {
 140                         if (time(NULL) - start >= 3) {
 141                                 sr_dbg("Timeout waiting for trigger");
 142                                 return SR_ERR_TIMEOUT;
 143                         }
 144
 145                         if (sr_scpi_get_string(sdi->conn, ":TRIG:STAT?", &buf) != SR_OK)
 146                                 return SR_ERR;
 147                 } while (buf[0] != status1 && buf[0] != status2);
 148
 149                 rigol_ds_set_wait_event(devc, WAIT_NONE);
 150         }
 151
 152         return SR_OK;
 153 }
 154
 155 /*
 156  * For live capture we need to wait for a new trigger event to ensure that
 157  * sample data is not returned twice.
 158  *
 159  * Unfortunately this will never really work because for sufficiently fast
 160  * timebases and trigger rates it just can't catch the status changes.
 161  *
 162  * What would be needed is a trigger event register with autoreset like the
 163  * Agilents have. The Rigols don't seem to have anything like this.
 164  *
 165  * The workaround is to only wait for the trigger when the timebase is slow
 166  * enough. Of course this means that for faster timebases sample data can be
 167  * returned multiple times, this effect is mitigated somewhat by sleeping
 168  * for about one sweep time in that case.
 169  */
 170 static int rigol_ds_trigger_wait(const struct sr_dev_inst *sdi)
 171 {
 172         struct dev_context *devc;
 173         long s;
 174
 175         if (!(devc = sdi->priv))
 176                 return SR_ERR;
 177
 178         /*
 179          * If timebase < 50 msecs/DIV just sleep about one sweep time except
 180          * for really fast sweeps.
 181          */
 182         if (devc->timebase < 0.0499) {
 183                 if (devc->timebase > 0.99e-6) {
 184                         /*
 185                          * Timebase * num hor. divs * 85(%) * 1e6(usecs) / 100
 186                          * -> 85 percent of sweep time
 187                          */
 188                         s = (devc->timebase * devc->model->series->num_horizontal_divs
 189                              * 85e6) / 100L;
 190                         sr_spew("Sleeping for %ld usecs instead of trigger-wait", s);
 191                         g_usleep(s);
 192                 }
 193                 rigol_ds_set_wait_event(devc, WAIT_NONE);
 194                 return SR_OK;
 195         } else {
 196                 return rigol_ds_event_wait(sdi, 'T', 'A');
 197         }
 198 }
 199
 200 /* Wait for scope to got to "Stop" in single shot mode */
 201 static int rigol_ds_stop_wait(const struct sr_dev_inst *sdi)
 202 {
 203         return rigol_ds_event_wait(sdi, 'S', 'S');
 204 }
 205
 206 /* Check that a single shot acquisition actually succeeded on the DS2000 */
 207 static int rigol_ds_check_stop(const struct sr_dev_inst *sdi)
 208 {
 209         struct dev_context *devc;
 210         struct sr_probe *probe;
 211         int tmp;
 212
 213         if (!(devc = sdi->priv))
 214                 return SR_ERR;
 215
 216         probe = devc->channel_entry->data;
 217
 218         if (devc->model->series->protocol <= PROTOCOL_V2)
 219                 return SR_OK;
 220
 221         if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
 222                           probe->index + 1) != SR_OK)
 223                 return SR_ERR;
 224         /* Check that the number of samples will be accepted */
 225         if (rigol_ds_config_set(sdi, ":WAV:POIN %d", devc->analog_frame_size) != SR_OK)
 226                 return SR_ERR;
 227         if (sr_scpi_get_int(sdi->conn, "*ESR?", &tmp) != SR_OK)
 228                 return SR_ERR;
 229         /*
 230          * If we get an "Execution error" the scope went from "Single" to
 231          * "Stop" without actually triggering. There is no waveform
 232          * displayed and trying to download one will fail - the scope thinks
 233          * it has 1400 samples (like display memory) and the driver thinks
 234          * it has a different number of samples.
 235          *
 236          * In that case just try to capture something again. Might still
 237          * fail in interesting ways.
 238          *
 239          * Ain't firmware fun?
 240          */
 241         if (tmp & 0x10) {
 242                 sr_warn("Single shot acquisition failed, retrying...");
 243                 /* Sleep a bit, otherwise the single shot will often fail */
 244                 g_usleep(500000);
 245                 rigol_ds_config_set(sdi, ":SING");
 246                 rigol_ds_set_wait_event(devc, WAIT_STOP);
 247                 return SR_ERR;
 248         }
 249
 250         return SR_OK;
 251 }
 252
 253 /* Wait for enough data becoming available in scope output buffer */
 254 static int rigol_ds_block_wait(const struct sr_dev_inst *sdi)
 255 {
 256         char *buf;
 257         struct dev_context *devc;
 258         time_t start;
 259         int len;
 260
 261         if (!(devc = sdi->priv))
 262                 return SR_ERR;
 263
 264         start = time(NULL);
 265
 266         do {
 267                 if (time(NULL) - start >= 3) {
 268                         sr_dbg("Timeout waiting for data block");
 269                         return SR_ERR_TIMEOUT;
 270                 }
 271
 272                 /*
 273                  * The scope copies data really slowly from sample
 274                  * memory to its output buffer, so try not to bother
 275                  * it too much with SCPI requests but don't wait too
 276                  * long for short sample frame sizes.
 277                  */
 278                 g_usleep(devc->analog_frame_size < 15000 ? 100000 : 1000000);
 279
 280                 /* "READ,nnnn" (still working) or "IDLE,nnnn" (finished) */
 281                 if (sr_scpi_get_string(sdi->conn, ":WAV:STAT?", &buf) != SR_OK)
 282                         return SR_ERR;
 283
 284                 if (parse_int(buf + 5, &len) != SR_OK)
 285                         return SR_ERR;
 286         } while (buf[0] == 'R' && len < 1000000);
 287
 288         rigol_ds_set_wait_event(devc, WAIT_NONE);
 289
 290         return SR_OK;
 291 }
 292
 293 /* Send a configuration setting. */
 294 SR_PRIV int rigol_ds_config_set(const struct sr_dev_inst *sdi, const char *format, ...)
 295 {
 296         struct dev_context *devc = sdi->priv;
 297         va_list args;
 298         int ret;
 299
 300         va_start(args, format);
 301         ret = sr_scpi_send_variadic(sdi->conn, format, args);
 302         va_end(args);
 303
 304         if (ret != SR_OK)
 305                 return SR_ERR;
 306
 307         if (devc->model->series->protocol == PROTOCOL_V2) {
 308                 /* The DS1000 series needs this stupid delay, *OPC? doesn't work. */
 309                 sr_spew("delay %dms", 100);
 310                 g_usleep(100000);
 311                 return SR_OK;
 312         } else {
 313                 return sr_scpi_get_opc(sdi->conn);
 314         }
 315 }
 316
 317 /* Start capturing a new frameset */
 318 SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
 319 {
 320         struct dev_context *devc;
 321         gchar *trig_mode;
 322
 323         if (!(devc = sdi->priv))
 324                 return SR_ERR;
 325
 326         sr_dbg("Starting data capture for frameset %lu of %lu",
 327                devc->num_frames + 1, devc->limit_frames);
 328
 329         switch (devc->model->series->protocol) {
 330         case PROTOCOL_V1:
 331                 rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
 332                 break;
 333         case PROTOCOL_V2:
 334                 if (devc->data_source == DATA_SOURCE_LIVE) {
 335                         if (rigol_ds_config_set(sdi, ":WAV:POIN:MODE NORMAL") != SR_OK)
 336                                 return SR_ERR;
 337                         rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
 338                 } else {
 339                         if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
 340                                 return SR_ERR;
 341                         if (rigol_ds_config_set(sdi, ":WAV:POIN:MODE RAW") != SR_OK)
 342                                 return SR_ERR;
 343                         if (sr_scpi_get_string(sdi->conn, ":TRIG:MODE?", &trig_mode) != SR_OK)
 344                                 return SR_ERR;
 345                         if (rigol_ds_config_set(sdi, ":TRIG:%s:SWE SING", trig_mode) != SR_OK)
 346                                 return SR_ERR;
 347                         if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
 348                                 return SR_ERR;
 349                         rigol_ds_set_wait_event(devc, WAIT_STOP);
 350                 }
 351                 break;
 352         case PROTOCOL_V3:
 353                 if (rigol_ds_config_set(sdi, ":WAV:FORM BYTE") != SR_OK)
 354                         return SR_ERR;
 355                 if (devc->data_source == DATA_SOURCE_LIVE) {
 356                         if (rigol_ds_config_set(sdi, ":WAV:MODE NORM") != SR_OK)
 357                                 return SR_ERR;
 358                         rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
 359                 } else {
 360                         if (rigol_ds_config_set(sdi, ":WAV:MODE RAW") != SR_OK)
 361                                 return SR_ERR;
 362                         if (rigol_ds_config_set(sdi, ":SING") != SR_OK)
 363                                 return SR_ERR;
 364                         rigol_ds_set_wait_event(devc, WAIT_STOP);
 365                 }
 366                 break;
 367         }
 368
 369         return SR_OK;
 370 }
 371
 372 /* Start reading data from the current channel */
 373 SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi)
 374 {
 375         struct dev_context *devc;
 376         struct sr_probe *probe;
 377
 378         if (!(devc = sdi->priv))
 379                 return SR_ERR;
 380
 381         probe = devc->channel_entry->data;
 382
 383         sr_dbg("Starting reading data from channel %d", probe->index + 1);
 384
 385         if (devc->model->series->protocol <= PROTOCOL_V2) {
 386                 if (probe->type == SR_PROBE_LOGIC) {
 387                         if (sr_scpi_send(sdi->conn, ":WAV:DATA? DIG") != SR_OK)
 388                                 return SR_ERR;
 389                 } else {
 390                         if (sr_scpi_send(sdi->conn, ":WAV:DATA? CHAN%d",
 391                                         probe->index + 1) != SR_OK)
 392                                 return SR_ERR;
 393                 }
 394                 rigol_ds_set_wait_event(devc, WAIT_NONE);
 395         } else {
 396                 if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
 397                                   probe->index + 1) != SR_OK)
 398                         return SR_ERR;
 399                 if (devc->data_source != DATA_SOURCE_LIVE) {
 400                         if (rigol_ds_config_set(sdi, ":WAV:RES") != SR_OK)
 401                                 return SR_ERR;
 402                         if (rigol_ds_config_set(sdi, ":WAV:BEG") != SR_OK)
 403                                 return SR_ERR;
 404                         rigol_ds_set_wait_event(devc, WAIT_BLOCK);
 405                 } else
 406                         rigol_ds_set_wait_event(devc, WAIT_NONE);
 407         }
 408
 409         devc->num_channel_bytes = 0;
 410         devc->num_block_bytes = 0;
 411
 412         return SR_OK;
 413 }
 414
 415 /* Read the header of a data block */
 416 static int rigol_ds_read_header(struct sr_scpi_dev_inst *scpi)
 417 {
 418         char start[3], length[10];
 419         int len, tmp;
 420
 421         /* Read the hashsign and length digit. */
 422         tmp = sr_scpi_read_data(scpi, start, 2);
 423         start[2] = '\0';
 424         if (tmp != 2) {
 425                 sr_err("Failed to read first two bytes of data block header.");
 426                 return -1;
 427         }
 428         if (start[0] != '#' || !isdigit(start[1]) || start[1] == '0') {
 429                 sr_err("Received invalid data block header start '%s'.", start);
 430                 return -1;
 431         }
 432         len = atoi(start + 1);
 433
 434         /* Read the data length. */
 435         tmp = sr_scpi_read_data(scpi, length, len);
 436         length[len] = '\0';
 437         if (tmp != len) {
 438                 sr_err("Failed to read %d bytes of data block length.", len);
 439                 return -1;
 440         }
 441         if (parse_int(length, &len) != SR_OK) {
 442                 sr_err("Received invalid data block length '%s'.", length);
 443                 return -1;
 444         }
 445
 446         sr_dbg("Received data block header: %s%s -> block length %d", start, length, len);
 447
 448         return len;
 449 }
 450
 451 SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
 452 {
 453         struct sr_dev_inst *sdi;
 454         struct sr_scpi_dev_inst *scpi;
 455         struct dev_context *devc;
 456         struct sr_datafeed_packet packet;
 457         struct sr_datafeed_analog analog;
 458         struct sr_datafeed_logic logic;
 459         double vdiv, offset;
 460         int len, i, vref;
 461         struct sr_probe *probe;
 462         gsize expected_data_bytes;
 463
 464         (void)fd;
 465
 466         if (!(sdi = cb_data))
 467                 return TRUE;
 468
 469         if (!(devc = sdi->priv))
 470                 return TRUE;
 471
 472         scpi = sdi->conn;
 473
 474         if (revents == G_IO_IN || revents == 0) {
 475                 switch(devc->wait_event) {
 476                 case WAIT_NONE:
 477                         break;
 478                 case WAIT_TRIGGER:
 479                         if (rigol_ds_trigger_wait(sdi) != SR_OK)
 480                                 return TRUE;
 481                         if (rigol_ds_channel_start(sdi) != SR_OK)
 482                                 return TRUE;
 483                         break;
 484                 case WAIT_BLOCK:
 485                         if (rigol_ds_block_wait(sdi) != SR_OK)
 486                                 return TRUE;
 487                         break;
 488                 case WAIT_STOP:
 489                         if (rigol_ds_stop_wait(sdi) != SR_OK)
 490                                 return TRUE;
 491                         if (rigol_ds_check_stop(sdi) != SR_OK)
 492                                 return TRUE;
 493                         if (rigol_ds_channel_start(sdi) != SR_OK)
 494                                 return TRUE;
 495                         return TRUE;
 496                 default:
 497                         sr_err("BUG: Unknown event target encountered");
 498                 }
 499
 500                 probe = devc->channel_entry->data;
 501
 502                 expected_data_bytes = probe->type == SR_PROBE_ANALOG ?
 503                                 devc->analog_frame_size : devc->digital_frame_size;
 504
 505                 if (devc->num_block_bytes == 0) {
 506                         if (devc->model->series->protocol >= PROTOCOL_V3)
 507                                 if (sr_scpi_send(sdi->conn, ":WAV:DATA?") != SR_OK)
 508                                         return TRUE;
 509
 510                         if (sr_scpi_read_begin(scpi) != SR_OK)
 511                                 return TRUE;
 512
 513                         if (devc->format == FORMAT_IEEE488_2) {
 514                                 sr_dbg("New block header expected");
 515                                 len = rigol_ds_read_header(scpi);
 516                                 if (len == -1)
 517                                         return TRUE;
 518                                 /* At slow timebases in live capture the DS2072
 519                                  * sometimes returns "short" data blocks, with
 520                                  * apparently no way to get the rest of the data.
 521                                  * Discard these, the complete data block will
 522                                  * appear eventually.
 523                                  */
 524                                 if (devc->data_source == DATA_SOURCE_LIVE
 525                                                 && (unsigned)len < expected_data_bytes) {
 526                                         sr_dbg("Discarding short data block");
 527                                         sr_scpi_read_data(scpi, (char *)devc->buffer, len + 1);
 528                                         return TRUE;
 529                                 }
 530                                 devc->num_block_bytes = len;
 531                         } else {
 532                                 devc->num_block_bytes = expected_data_bytes;
 533                         }
 534                         devc->num_block_read = 0;
 535                 }
 536
 537                 len = devc->num_block_bytes - devc->num_block_read;
 538                 len = sr_scpi_read_data(scpi, (char *)devc->buffer,
 539                                 len < ACQ_BUFFER_SIZE ? len : ACQ_BUFFER_SIZE);
 540
 541                 sr_dbg("Received %d bytes.", len);
 542                 if (len == -1)
 543                         return TRUE;
 544
 545                 devc->num_block_read += len;
 546
 547                 if (probe->type == SR_PROBE_ANALOG) {
 548                         vref = devc->vert_reference[probe->index];
 549                         vdiv = devc->vdiv[probe->index] / 25.6;
 550                         offset = devc->vert_offset[probe->index];
 551                         if (devc->model->series->protocol >= PROTOCOL_V3)
 552                                 for (i = 0; i < len; i++)
 553                                         devc->data[i] = ((int)devc->buffer[i] - vref) * vdiv - offset;
 554                         else
 555                                 for (i = 0; i < len; i++)
 556                                         devc->data[i] = (128 - devc->buffer[i]) * vdiv - offset;
 557                         analog.probes = g_slist_append(NULL, probe);
 558                         analog.num_samples = len;
 559                         analog.data = devc->data;
 560                         analog.mq = SR_MQ_VOLTAGE;
 561                         analog.unit = SR_UNIT_VOLT;
 562                         analog.mqflags = 0;
 563                         packet.type = SR_DF_ANALOG;
 564                         packet.payload = &analog;
 565                         sr_session_send(cb_data, &packet);
 566                         g_slist_free(analog.probes);
 567                 } else {
 568                         logic.length = len;
 569                         logic.unitsize = 2;
 570                         logic.data = devc->buffer;
 571                         packet.type = SR_DF_LOGIC;
 572                         packet.payload = &logic;
 573                         sr_session_send(cb_data, &packet);
 574                 }
 575
 576                 if (devc->num_block_read == devc->num_block_bytes) {
 577                         sr_dbg("Block has been completed");
 578                         if (devc->format == FORMAT_IEEE488_2) {
 579                                 /* Discard the terminating linefeed */
 580                                 sr_scpi_read_data(scpi, (char *)devc->buffer, 1);
 581                                 /* Prepare for possible next block */
 582                                 devc->num_block_bytes = 0;
 583                                 if (devc->data_source != DATA_SOURCE_LIVE)
 584                                         rigol_ds_set_wait_event(devc, WAIT_BLOCK);
 585                         }
 586                         if (!sr_scpi_read_complete(scpi)) {
 587                                 sr_err("Read should have been completed");
 588                                 sdi->driver->dev_acquisition_stop(sdi, cb_data);
 589                                 return TRUE;
 590                         }
 591                         devc->num_block_read = 0;
 592                 } else {
 593                         sr_dbg("%d of %d block bytes read", devc->num_block_read, devc->num_block_bytes);
 594                 }
 595
 596                 devc->num_channel_bytes += len;
 597
 598                 if (devc->num_channel_bytes < expected_data_bytes)
 599                         /* Don't have the full data for this channel yet, re-run. */
 600                         return TRUE;
 601
 602                 /* End of data for this channel. */
 603                 if (devc->model->series->protocol >= PROTOCOL_V3) {
 604                         /* Signal end of data download to scope */
 605                         if (devc->data_source != DATA_SOURCE_LIVE)
 606                                 /*
 607                                  * This causes a query error, without it switching
 608                                  * to the next channel causes an error. Fun with
 609                                  * firmware...
 610                                  */
 611                                 rigol_ds_config_set(sdi, ":WAV:END");
 612                 }
 613
 614                 if (probe->type == SR_PROBE_ANALOG
 615                                 && devc->channel_entry->next != NULL) {
 616                         /* We got the frame for this analog channel, but
 617                          * there's another analog channel. */
 618                         devc->channel_entry = devc->channel_entry->next;
 619                         rigol_ds_channel_start(sdi);
 620                 } else {
 621                         /* Done with all analog channels in this frame. */
 622                         if (devc->enabled_digital_probes
 623                                         && devc->channel_entry != devc->enabled_digital_probes) {
 624                                 /* Now we need to get the digital data. */
 625                                 devc->channel_entry = devc->enabled_digital_probes;
 626                                 rigol_ds_channel_start(sdi);
 627                         } else {
 628                                 /* Done with this frame. */
 629                                 packet.type = SR_DF_FRAME_END;
 630                                 sr_session_send(cb_data, &packet);
 631
 632                                 if (++devc->num_frames == devc->limit_frames) {
 633                                         /* Last frame, stop capture. */
 634                                         sdi->driver->dev_acquisition_stop(sdi, cb_data);
 635                                 } else {
 636                                         /* Get the next frame, starting with the first analog channel. */
 637                                         if (devc->enabled_analog_probes)
 638                                                 devc->channel_entry = devc->enabled_analog_probes;
 639                                         else
 640                                                 devc->channel_entry = devc->enabled_digital_probes;
 641
 642                                         rigol_ds_capture_start(sdi);
 643
 644                                         /* Start of next frame. */
 645                                         packet.type = SR_DF_FRAME_BEGIN;
 646                                         sr_session_send(cb_data, &packet);
 647                                 }
 648                         }
 649                 }
 650         }
 651
 652         return TRUE;
 653 }
 654
 655 SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi)
 656 {
 657         struct dev_context *devc;
 658         char *t_s, *cmd;
 659         unsigned int i;
 660         int res;
 661
 662         devc = sdi->priv;
 663
 664         /* Analog channel state. */
 665         for (i = 0; i < devc->model->analog_channels; i++) {
 666                 cmd = g_strdup_printf(":CHAN%d:DISP?", i + 1);
 667                 res = sr_scpi_get_string(sdi->conn, cmd, &t_s);
 668                 g_free(cmd);
 669                 if (res != SR_OK)
 670                         return SR_ERR;
 671                 devc->analog_channels[i] = !strcmp(t_s, "ON") || !strcmp(t_s, "1");
 672         }
 673         sr_dbg("Current analog channel state:");
 674         for (i = 0; i < devc->model->analog_channels; i++)
 675                 sr_dbg("CH%d %s", i + 1, devc->analog_channels[i] ? "on" : "off");
 676
 677         /* Digital channel state. */
 678         if (devc->model->has_digital) {
 679                 if (sr_scpi_get_string(sdi->conn, ":LA:DISP?", &t_s) != SR_OK)
 680                         return SR_ERR;
 681                 devc->la_enabled = !strcmp(t_s, "ON") ? TRUE : FALSE;
 682                 sr_dbg("Logic analyzer %s, current digital channel state:",
 683                                 devc->la_enabled ? "enabled" : "disabled");
 684                 for (i = 0; i < 16; i++) {
 685                         cmd = g_strdup_printf(":DIG%d:TURN?", i);
 686                         res = sr_scpi_get_string(sdi->conn, cmd, &t_s);
 687                         g_free(cmd);
 688                         if (res != SR_OK)
 689                                 return SR_ERR;
 690                         devc->digital_channels[i] = !strcmp(t_s, "ON") ? TRUE : FALSE;
 691                         g_free(t_s);
 692                         sr_dbg("D%d: %s", i, devc->digital_channels[i] ? "on" : "off");
 693                 }
 694         }
 695
 696         /* Timebase. */
 697         if (sr_scpi_get_float(sdi->conn, ":TIM:SCAL?", &devc->timebase) != SR_OK)
 698                 return SR_ERR;
 699         sr_dbg("Current timebase %g", devc->timebase);
 700
 701         /* Vertical gain. */
 702         for (i = 0; i < devc->model->analog_channels; i++) {
 703                 cmd = g_strdup_printf(":CHAN%d:SCAL?", i + 1);
 704                 res = sr_scpi_get_float(sdi->conn, cmd, &devc->vdiv[i]);
 705                 g_free(cmd);
 706                 if (res != SR_OK)
 707                         return SR_ERR;
 708         }
 709         sr_dbg("Current vertical gain:");
 710         for (i = 0; i < devc->model->analog_channels; i++)
 711                 sr_dbg("CH%d %g", i + 1, devc->vdiv[i]);
 712
 713         sr_dbg("Current vertical reference:");
 714         if (devc->model->series->protocol >= PROTOCOL_V3) {
 715                 /* Vertical reference - not certain if this is the place to read it. */
 716                 for (i = 0; i < devc->model->analog_channels; i++) {
 717                         if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d", i + 1) != SR_OK)
 718                                 return SR_ERR;
 719                         if (sr_scpi_get_int(sdi->conn, ":WAV:YREF?", &devc->vert_reference[i]) != SR_OK)
 720                                 return SR_ERR;
 721                         sr_dbg("CH%d %d", i + 1, devc->vert_reference[i]);
 722                 }
 723         }
 724
 725         /* Vertical offset. */
 726         for (i = 0; i < devc->model->analog_channels; i++) {
 727                 cmd = g_strdup_printf(":CHAN%d:OFFS?", i + 1);
 728                 res = sr_scpi_get_float(sdi->conn, cmd, &devc->vert_offset[i]);
 729                 g_free(cmd);
 730                 if (res != SR_OK)
 731                         return SR_ERR;
 732         }
 733         sr_dbg("Current vertical offset:");
 734         for (i = 0; i < devc->model->analog_channels; i++)
 735                 sr_dbg("CH%d %g", i + 1, devc->vert_offset[i]);
 736
 737         /* Coupling. */
 738         for (i = 0; i < devc->model->analog_channels; i++) {
 739                 cmd = g_strdup_printf(":CHAN%d:COUP?", i + 1);
 740                 res = sr_scpi_get_string(sdi->conn, cmd, &devc->coupling[i]);
 741                 g_free(cmd);
 742                 if (res != SR_OK)
 743                         return SR_ERR;
 744         }
 745         sr_dbg("Current coupling:");
 746         for (i = 0; i < devc->model->analog_channels; i++)
 747                 sr_dbg("CH%d %s", i + 1, devc->coupling[i]);
 748
 749         /* Trigger source. */
 750         if (sr_scpi_get_string(sdi->conn, ":TRIG:EDGE:SOUR?", &devc->trigger_source) != SR_OK)
 751                 return SR_ERR;
 752         sr_dbg("Current trigger source %s", devc->trigger_source);
 753
 754         /* Horizontal trigger position. */
 755         if (sr_scpi_get_float(sdi->conn, ":TIM:OFFS?", &devc->horiz_triggerpos) != SR_OK)
 756                 return SR_ERR;
 757         sr_dbg("Current horizontal trigger position %g", devc->horiz_triggerpos);
 758
 759         /* Trigger slope. */
 760         if (sr_scpi_get_string(sdi->conn, ":TRIG:EDGE:SLOP?", &devc->trigger_slope) != SR_OK)
 761                 return SR_ERR;
 762         sr_dbg("Current trigger slope %s", devc->trigger_slope);
 763
 764         return SR_OK;
 765 }