2 * This file is part of the sigrok project.
4 * Copyright (C) 2010-2012 Bert Vermeulen <bert@biot.com>
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 extern SR_PRIV struct sr_dev_driver link_mso19_driver_info;
23 static struct sr_dev_driver *di = &link_mso19_driver_info;
25 SR_PRIV int mso_configure_trigger(struct sr_dev_inst *sdi)
27 struct dev_context *devc = sdi->priv;
29 uint16_t dso_trigger = mso_calc_raw_from_mv(devc);
32 if ((!devc->trigger_slope && devc->trigger_chan == 1) ||
33 (devc->trigger_slope &&
34 (devc->trigger_chan == 0 ||
35 devc->trigger_chan == 2 ||
36 devc->trigger_chan == 3)))
39 switch (devc->trigger_chan) {
41 dso_trigger |= 0xe000;
43 dso_trigger |= 0x4000;
46 dso_trigger |= 0x2000;
49 dso_trigger |= 0xa000;
52 dso_trigger |= 0x8000;
59 switch (devc->trigger_outsrc) {
64 dso_trigger |= 0x1000;
67 dso_trigger |= 0x1800;
72 ops[0] = mso_trans(5, devc->la_trigger);
73 ops[1] = mso_trans(6, devc->la_trigger_mask);
74 ops[2] = mso_trans(3, dso_trigger & 0xff);
75 ops[3] = mso_trans(4, (dso_trigger >> 8) & 0xff);
76 ops[4] = mso_trans(11,
77 devc->dso_trigger_width / SR_HZ_TO_NS(devc->cur_rate));
79 /* Select the SPI/I2C trigger config bank */
80 ops[5] = mso_trans(REG_CTL2, (devc->ctlbase2 | BITS_CTL2_BANK(2)));
81 /* Configure the SPI/I2C protocol trigger */
82 ops[6] = mso_trans(REG_PT_WORD(0), devc->protocol_trigger.word[0]);
83 ops[7] = mso_trans(REG_PT_WORD(1), devc->protocol_trigger.word[1]);
84 ops[8] = mso_trans(REG_PT_WORD(2), devc->protocol_trigger.word[2]);
85 ops[9] = mso_trans(REG_PT_WORD(3), devc->protocol_trigger.word[3]);
86 ops[10] = mso_trans(REG_PT_MASK(0), devc->protocol_trigger.mask[0]);
87 ops[11] = mso_trans(REG_PT_MASK(1), devc->protocol_trigger.mask[1]);
88 ops[12] = mso_trans(REG_PT_MASK(2), devc->protocol_trigger.mask[2]);
89 ops[13] = mso_trans(REG_PT_MASK(3), devc->protocol_trigger.mask[3]);
90 ops[14] = mso_trans(REG_PT_SPIMODE, devc->protocol_trigger.spimode);
91 /* Select the default config bank */
92 ops[15] = mso_trans(REG_CTL2, devc->ctlbase2);
94 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
97 SR_PRIV int mso_configure_threshold_level(struct sr_dev_inst *sdi)
99 struct dev_context *devc = sdi->priv;
101 return mso_dac_out(sdi, la_threshold_map[devc->la_threshold]);
104 SR_PRIV int mso_read_buffer(struct sr_dev_inst *sdi)
106 uint16_t ops[] = { mso_trans(REG_BUFFER, 0) };
107 struct dev_context *devc = sdi->priv;
109 sr_dbg("Requesting buffer dump.");
110 return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
113 SR_PRIV int mso_arm(struct sr_dev_inst *sdi)
115 struct dev_context *devc = sdi->priv;
117 mso_trans(REG_CTL1, devc->ctlbase1 | BIT_CTL1_RESETFSM),
118 mso_trans(REG_CTL1, devc->ctlbase1 | BIT_CTL1_ARM),
119 mso_trans(REG_CTL1, devc->ctlbase1),
122 sr_dbg("Requesting trigger arm.");
123 return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
126 SR_PRIV int mso_force_capture(struct sr_dev_inst *sdi)
128 struct dev_context *devc = sdi->priv;
130 mso_trans(REG_CTL1, devc->ctlbase1 | 8),
131 mso_trans(REG_CTL1, devc->ctlbase1),
134 sr_dbg("Requesting forced capture.");
135 return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
138 SR_PRIV int mso_dac_out(struct sr_dev_inst *sdi, uint16_t val)
140 struct dev_context *devc = sdi->priv;
142 mso_trans(REG_DAC1, (val >> 8) & 0xff),
143 mso_trans(REG_DAC2, val & 0xff),
144 mso_trans(REG_CTL1, devc->ctlbase1 | BIT_CTL1_RESETADC),
147 sr_dbg("Setting dac word to 0x%x.", val);
148 return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
151 SR_PRIV inline uint16_t mso_calc_raw_from_mv(struct dev_context *devc)
153 return (uint16_t) (0x200 -
154 ((devc->dso_trigger_voltage / devc->dso_probe_attn) /
159 SR_PRIV int mso_parse_serial(const char *iSerial, const char *iProduct,
160 struct dev_context *devc)
162 unsigned int u1, u2, u3, u4, u5, u6;
165 /* FIXME: This code is in the original app, but I think its
166 * used only for the GUI */
167 /* if (strstr(iProduct, "REV_02") || strstr(iProduct, "REV_03"))
168 devc->num_sample_rates = 0x16;
170 devc->num_sample_rates = 0x10; */
174 if (iSerial[0] != '4' || sscanf(iSerial, "%5u%3u%3u%1u%1u%6u",
175 &u1, &u2, &u3, &u4, &u5, &u6) != 6)
180 devc->vbit = u1 / 10000;
182 devc->vbit = 4.19195;
183 devc->dac_offset = u2;
184 if (devc->dac_offset == 0)
185 devc->dac_offset = 0x1ff;
186 devc->offset_range = u3;
187 if (devc->offset_range == 0)
188 devc->offset_range = 0x17d;
191 * FIXME: There is more code on the original software to handle
192 * bigger iSerial strings, but as I can't test on my device
193 * I will not implement it yet
199 SR_PRIV int mso_send_control_message(struct sr_serial_dev_inst *serial,
200 uint16_t payload[], int n)
202 int i, w, ret, s = n * 2 + sizeof(mso_head) + sizeof(mso_foot);
210 if (!(buf = g_try_malloc(s))) {
211 sr_err("Failed to malloc message buffer.");
217 memcpy(p, mso_head, sizeof(mso_head));
218 p += sizeof(mso_head);
220 for (i = 0; i < n; i++) {
221 *(uint16_t *) p = htons(payload[i]);
224 memcpy(p, mso_foot, sizeof(mso_foot));
228 ret = serial_write(serial, buf + w, s - w);
242 SR_PRIV int mso_reset_adc(struct sr_dev_inst *sdi)
244 struct dev_context *devc = sdi->priv;
247 ops[0] = mso_trans(REG_CTL1, (devc->ctlbase1 | BIT_CTL1_RESETADC));
248 ops[1] = mso_trans(REG_CTL1, devc->ctlbase1);
249 devc->ctlbase1 |= BIT_CTL1_ADC_UNKNOWN4;
251 sr_dbg("Requesting ADC reset.");
252 return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
255 SR_PRIV void stop_acquisition(const struct sr_dev_inst *sdi)
257 struct sr_datafeed_packet packet;
258 struct dev_context *devc;
261 sr_source_remove(devc->serial->fd);
263 /* Terminate session */
264 packet.type = SR_DF_END;
265 sr_session_send(sdi, &packet);
268 SR_PRIV int mso_clkrate_out(struct sr_serial_dev_inst *serial, uint16_t val)
271 mso_trans(REG_CLKRATE1, (val >> 8) & 0xff),
272 mso_trans(REG_CLKRATE2, val & 0xff),
275 sr_dbg("Setting clkrate word to 0x%x.", val);
276 return mso_send_control_message(serial, ARRAY_AND_SIZE(ops));
279 SR_PRIV int mso_configure_rate(struct sr_dev_inst *sdi, uint32_t rate)
281 struct dev_context *devc = sdi->priv;
285 for (i = 0; i < ARRAY_SIZE(rate_map); i++) {
286 if (rate_map[i].rate == rate) {
287 devc->ctlbase2 = rate_map[i].slowmode;
288 ret = mso_clkrate_out(devc->serial, rate_map[i].val);
290 devc->cur_rate = rate;
301 SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst *serial, uint8_t *info)
303 uint16_t ops[] = { mso_trans(REG_TRIGGER, 0) };
306 sr_dbg("Requesting trigger state.");
307 ret = mso_send_control_message(serial, ARRAY_AND_SIZE(ops));
308 if (info == NULL || ret != SR_OK)
313 if (serial_read(serial, &buf, 1) != 1) /* FIXME: Need timeout */
317 sr_dbg("Trigger state is: 0x%x.", *info);
321 SR_PRIV int mso_receive_data(int fd, int revents, void *cb_data)
324 struct sr_datafeed_packet packet;
325 struct sr_datafeed_logic logic;
326 struct sr_dev_inst *sdi;
327 struct drv_context *drvc;
328 struct dev_context *devc;
330 int num_channels, offset, i, j;
335 /* Find this device's devc struct by its fd. */
337 for (l = drvc->instances; l; l = l->next) {
340 if (devc->serial->fd == fd)
345 /* Shouldn't happen. */
351 size_t s = serial_read(devc->serial, in, sizeof(in));
356 if (devc->trigger_state != MSO_TRIGGER_DATAREADY) {
357 devc->trigger_state = in[0];
358 if (devc->trigger_state == MSO_TRIGGER_DATAREADY) {
359 mso_read_buffer(sdi);
362 mso_check_trigger(devc->serial, NULL);
367 /* the hardware always dumps 1024 samples, 24bits each */
368 if (devc->buffer_n < 3072) {
369 memcpy(devc->buffer + devc->buffer_n, in, s);
372 if (devc->buffer_n < 3072)
375 /* do the conversion */
376 uint8_t logic_out[1024];
377 double analog_out[1024];
378 for (i = 0; i < 1024; i++) {
379 /* FIXME: Need to do conversion to mV */
380 analog_out[i] = (devc->buffer[i * 3] & 0x3f) |
381 ((devc->buffer[i * 3 + 1] & 0xf) << 6);
382 logic_out[i] = ((devc->buffer[i * 3 + 1] & 0x30) >> 4) |
383 ((devc->buffer[i * 3 + 2] & 0x3f) << 2);
386 packet.type = SR_DF_LOGIC;
387 packet.payload = &logic;
390 logic.data = logic_out;
391 sr_session_send(cb_data, &packet);
393 // Dont bother fixing this yet, keep it "old style"
395 packet.type = SR_DF_ANALOG;
396 packet.length = 1024;
397 packet.unitsize = sizeof(double);
398 packet.payload = analog_out;
399 sr_session_send(ctx->session_dev_id, &packet);
402 packet.type = SR_DF_END;
403 sr_session_send(devc->session_dev_id, &packet);