2 * This file is part of the sigrok project.
4 * Copyright (C) 2010 Håvard Espeland <gus@ping.uio.no>,
5 * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
6 * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 * ASIX Sigma Logic Analyzer Driver
30 #include "asix-sigma.h"
32 #define USB_VENDOR 0xa600
33 #define USB_PRODUCT 0xa000
34 #define USB_DESCRIPTION "ASIX SIGMA"
35 #define USB_VENDOR_NAME "ASIX"
36 #define USB_MODEL_NAME "SIGMA"
37 #define USB_MODEL_VERSION ""
38 #define FIRMWARE FIRMWARE_DIR "/asix-sigma-200.firmware"
40 static GSList *device_instances = NULL;
42 // XXX These should be per device
43 static struct ftdi_context ftdic;
44 static uint64_t cur_samplerate = MHZ(200);
45 static uint32_t limit_msec = 0;
46 static struct timeval start_tv;
48 static uint64_t supported_samplerates[] = {
53 static struct samplerates samplerates = {
57 supported_samplerates,
60 static int capabilities[] = {
64 /* These are really implemented in the driver, not the hardware. */
69 /* Force the FPGA to reboot. */
70 static uint8_t suicide[] = {
71 0x84, 0x84, 0x88, 0x84, 0x88, 0x84, 0x88, 0x84,
74 /* Prepare to upload firmware (FPGA specific). */
75 static uint8_t init[] = {
76 0x03, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
79 /* Initialize the logic analyzer mode. */
80 static uint8_t logic_mode_start[] = {
81 0x00, 0x40, 0x0f, 0x25, 0x35, 0x40,
82 0x2a, 0x3a, 0x40, 0x03, 0x20, 0x38,
85 static int sigma_read(void *buf, size_t size)
89 ret = ftdi_read_data(&ftdic, (unsigned char *)buf, size);
91 g_warning("ftdi_read_data failed: %s",
92 ftdi_get_error_string(&ftdic));
98 static int sigma_write(void *buf, size_t size)
102 ret = ftdi_write_data(&ftdic, (unsigned char *)buf, size);
104 g_warning("ftdi_write_data failed: %s",
105 ftdi_get_error_string(&ftdic));
106 } else if ((size_t) ret != size) {
107 g_warning("ftdi_write_data did not complete write\n");
113 static int sigma_write_register(uint8_t reg, uint8_t *data, size_t len)
116 uint8_t buf[len + 2];
119 buf[idx++] = REG_ADDR_LOW | (reg & 0xf);
120 buf[idx++] = REG_ADDR_HIGH | (reg >> 4);
122 for (i = 0; i < len; ++i) {
123 buf[idx++] = REG_DATA_LOW | (data[i] & 0xf);
124 buf[idx++] = REG_DATA_HIGH_WRITE | (data[i] >> 4);
127 return sigma_write(buf, idx);
130 static int sigma_set_register(uint8_t reg, uint8_t value)
132 return sigma_write_register(reg, &value, 1);
135 static int sigma_read_register(uint8_t reg, uint8_t *data, size_t len)
139 buf[0] = REG_ADDR_LOW | (reg & 0xf);
140 buf[1] = REG_ADDR_HIGH | (reg >> 4);
141 buf[2] = REG_READ_ADDR;
143 sigma_write(buf, sizeof(buf));
145 return sigma_read(data, len);
148 static uint8_t sigma_get_register(uint8_t reg)
152 if (1 != sigma_read_register(reg, &value, 1)) {
153 g_warning("Sigma_get_register: 1 byte expected");
160 static int sigma_read_pos(uint32_t *stoppos, uint32_t *triggerpos)
163 REG_ADDR_LOW | READ_TRIGGER_POS_LOW,
165 REG_READ_ADDR | NEXT_REG,
166 REG_READ_ADDR | NEXT_REG,
167 REG_READ_ADDR | NEXT_REG,
168 REG_READ_ADDR | NEXT_REG,
169 REG_READ_ADDR | NEXT_REG,
170 REG_READ_ADDR | NEXT_REG,
174 sigma_write(buf, sizeof(buf));
176 sigma_read(result, sizeof(result));
178 *triggerpos = result[0] | (result[1] << 8) | (result[2] << 16);
179 *stoppos = result[3] | (result[4] << 8) | (result[5] << 16);
184 static int sigma_read_dram(uint16_t startchunk, size_t numchunks, uint8_t *data)
190 /* Send the startchunk. Index start with 1. */
191 buf[0] = startchunk >> 8;
192 buf[1] = startchunk & 0xff;
193 sigma_write_register(WRITE_MEMROW, buf, 2);
196 buf[idx++] = REG_DRAM_BLOCK;
197 buf[idx++] = REG_DRAM_WAIT_ACK;
199 for (i = 0; i < numchunks; ++i) {
200 /* Alternate bit to copy from DRAM to cache. */
201 if (i != (numchunks - 1))
202 buf[idx++] = REG_DRAM_BLOCK | (((i + 1) % 2) << 4);
204 buf[idx++] = REG_DRAM_BLOCK_DATA | ((i % 2) << 4);
206 if (i != (numchunks - 1))
207 buf[idx++] = REG_DRAM_WAIT_ACK;
210 sigma_write(buf, idx);
212 return sigma_read(data, numchunks * CHUNK_SIZE);
215 /* Generate the bitbang stream for programming the FPGA. */
216 static int bin2bitbang(const char *filename,
217 unsigned char **buf, size_t *buf_size)
221 unsigned long offset = 0;
223 uint8_t *compressed_buf, *firmware;
224 uLongf csize, fwsize;
225 const int buffer_size = 65536;
228 uint32_t imm = 0x3f6df2ab;
230 f = fopen(filename, "r");
232 g_warning("fopen(\"%s\", \"r\")", filename);
236 if (-1 == fseek(f, 0, SEEK_END)) {
237 g_warning("fseek on %s failed", filename);
242 file_size = ftell(f);
244 fseek(f, 0, SEEK_SET);
246 compressed_buf = g_malloc(file_size);
247 firmware = g_malloc(buffer_size);
249 if (!compressed_buf || !firmware) {
250 g_warning("Error allocating buffers");
255 while ((c = getc(f)) != EOF) {
256 imm = (imm + 0xa853753) % 177 + (imm * 0x8034052);
257 compressed_buf[csize++] = c ^ imm;
261 fwsize = buffer_size;
262 ret = uncompress(firmware, &fwsize, compressed_buf, csize);
264 g_free(compressed_buf);
266 g_warning("Could not unpack Sigma firmware. (Error %d)\n", ret);
270 g_free(compressed_buf);
272 *buf_size = fwsize * 2 * 8;
274 *buf = p = (unsigned char *)g_malloc(*buf_size);
277 g_warning("Error allocating buffers");
281 for (i = 0; i < fwsize; ++i) {
282 for (bit = 7; bit >= 0; --bit) {
283 v = firmware[i] & 1 << bit ? 0x40 : 0x00;
284 p[offset++] = v | 0x01;
291 if (offset != *buf_size) {
293 g_warning("Error reading firmware %s "
294 "offset=%ld, file_size=%ld, buf_size=%zd\n",
295 filename, offset, file_size, *buf_size);
303 static int hw_init(char *deviceinfo)
305 struct sigrok_device_instance *sdi;
307 deviceinfo = deviceinfo;
311 /* Look for SIGMAs. */
312 if (ftdi_usb_open_desc(&ftdic, USB_VENDOR, USB_PRODUCT,
313 USB_DESCRIPTION, NULL) < 0)
316 /* Register SIGMA device. */
317 sdi = sigrok_device_instance_new(0, ST_INITIALIZING,
318 USB_VENDOR_NAME, USB_MODEL_NAME, USB_MODEL_VERSION);
322 device_instances = g_slist_append(device_instances, sdi);
324 /* We will open the device again when we need it. */
325 ftdi_usb_close(&ftdic);
330 static int hw_opendev(int device_index)
336 struct sigrok_device_instance *sdi;
337 unsigned char result[32];
339 /* Make sure it's an ASIX SIGMA. */
340 if ((ret = ftdi_usb_open_desc(&ftdic,
341 USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
342 g_warning("ftdi_usb_open failed: %s",
343 ftdi_get_error_string(&ftdic));
347 if ((ret = ftdi_set_bitmode(&ftdic, 0xdf, BITMODE_BITBANG)) < 0) {
348 g_warning("ftdi_set_bitmode failed: %s",
349 ftdi_get_error_string(&ftdic));
353 /* Four times the speed of sigmalogan - Works well. */
354 if ((ret = ftdi_set_baudrate(&ftdic, 750000)) < 0) {
355 g_warning("ftdi_set_baudrate failed: %s",
356 ftdi_get_error_string(&ftdic));
360 /* Force the FPGA to reboot. */
361 sigma_write(suicide, sizeof(suicide));
362 sigma_write(suicide, sizeof(suicide));
363 sigma_write(suicide, sizeof(suicide));
364 sigma_write(suicide, sizeof(suicide));
366 /* Prepare to upload firmware (FPGA specific). */
367 sigma_write(init, sizeof(init));
369 ftdi_usb_purge_buffers(&ftdic);
371 /* Wait until the FPGA asserts INIT_B. */
373 ret = sigma_read(result, 1);
374 if (result[0] & 0x20)
378 /* Prepare firmware. */
379 if (-1 == bin2bitbang(FIRMWARE, &buf, &buf_size)) {
380 g_warning("An error occured while reading the firmware: %s",
385 /* Upload firmare. */
386 sigma_write(buf, buf_size);
390 if ((ret = ftdi_set_bitmode(&ftdic, 0x00, BITMODE_RESET)) < 0) {
391 g_warning("ftdi_set_bitmode failed: %s",
392 ftdi_get_error_string(&ftdic));
396 ftdi_usb_purge_buffers(&ftdic);
398 /* Discard garbage. */
399 while (1 == sigma_read(&pins, 1))
402 /* Initialize the logic analyzer mode. */
403 sigma_write(logic_mode_start, sizeof(logic_mode_start));
405 /* Expect a 3 byte reply. */
406 ret = sigma_read(result, 3);
408 result[0] != 0xa6 || result[1] != 0x55 || result[2] != 0xaa) {
409 g_warning("Configuration failed. Invalid reply received.");
413 /* Works like a charm... */
415 if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
418 sdi->status = ST_ACTIVE;
420 g_message("Firmware uploaded");
425 static void hw_closedev(int device_index)
427 device_index = device_index;
429 ftdi_usb_close(&ftdic);
432 static void hw_cleanup(void)
436 static void *hw_get_device_info(int device_index, int device_info_id)
438 struct sigrok_device_instance *sdi;
441 if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) {
442 fprintf(stderr, "It's NULL.\n");
446 switch (device_info_id) {
451 info = GINT_TO_POINTER(4);
456 case DI_TRIGGER_TYPES:
457 info = 0; //TRIGGER_TYPES;
459 case DI_CUR_SAMPLERATE:
460 info = &cur_samplerate;
467 static int hw_get_status(int device_index)
469 struct sigrok_device_instance *sdi;
471 sdi = get_sigrok_device_instance(device_instances, device_index);
478 static int *hw_get_capabilities(void)
483 static int hw_set_configuration(int device_index, int capability, void *value)
485 struct sigrok_device_instance *sdi;
489 if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
492 if (capability == HWCAP_SAMPLERATE) {
493 tmp_u64 = (uint64_t *) value;
494 /* Only 200 MHz implemented */
496 } else if (capability == HWCAP_PROBECONFIG) {
498 } else if (capability == HWCAP_LIMIT_MSEC) {
499 limit_msec = strtoull(value, NULL, 10);
509 * Decode chunk of 1024 bytes, 64 clusters, 7 events per cluster.
510 * Each event is 20ns apart, and can contain multiple samples.
511 * For 200 MHz, an event contains 4 samples for each channel,
514 static int decode_chunk_ts(uint8_t *buf, uint16_t *lastts,
515 uint8_t *lastsample, void *user_data)
517 const int samples_per_event = 4;
519 uint8_t samples[65536 * samples_per_event];
520 struct datafeed_packet packet;
521 int i, j, k, numpad, tosend;
522 size_t n = 0, sent = 0;
523 int clustersize = EVENTS_PER_CLUSTER * samples_per_event; /* 4 for 200 MHz */
527 for (i = 0; i < 64; ++i) {
528 ts = *(uint16_t *) &buf[i * 16];
529 tsdiff = ts - *lastts;
532 /* Pad last sample up to current point. */
533 numpad = tsdiff * samples_per_event - clustersize;
535 memset(samples, *lastsample,
536 tsdiff * samples_per_event - clustersize);
537 n = tsdiff * samples_per_event - clustersize;
540 event = (uint16_t *) &buf[i * 16 + 2];
542 /* For each sample in cluster. */
543 for (j = 0; j < 7; ++j) {
544 for (k = 0; k < samples_per_event; ++k) {
546 * Extract samples from bytestream.
547 * Samples are packed together in a short.
550 ((!!(event[j] & (1 << (k + 0x0)))) << 0) |
551 ((!!(event[j] & (1 << (k + 0x4)))) << 1) |
552 ((!!(event[j] & (1 << (k + 0x8)))) << 2) |
553 ((!!(event[j] & (1 << (k + 0xc)))) << 3);
557 *lastsample = samples[n - 1];
559 /* Send to sigrok. */
562 tosend = MIN(4096, n - sent);
564 packet.type = DF_LOGIC8;
565 packet.length = tosend;
566 packet.payload = samples + sent;
567 session_bus(user_data, &packet);
576 static int receive_data(int fd, int revents, void *user_data)
578 struct datafeed_packet packet;
579 const int chunks_per_read = 32;
580 unsigned char buf[chunks_per_read * CHUNK_SIZE];
581 int bufsz, numchunks, curchunk, i, newchunks;
582 uint32_t triggerpos, stoppos, running_msec;
585 uint8_t lastsample = 0;
590 /* Get the current position. */
591 sigma_read_pos(&stoppos, &triggerpos);
592 numchunks = stoppos / 512;
594 /* Check if the has expired, or memory is full. */
595 gettimeofday(&tv, 0);
596 running_msec = (tv.tv_sec - start_tv.tv_sec) * 1000 +
597 (tv.tv_usec - start_tv.tv_usec) / 1000;
599 if (running_msec < limit_msec && numchunks < 32767)
602 /* Stop acqusition. */
603 sigma_set_register(WRITE_MODE, 0x11);
605 /* Set SDRAM Read Enable. */
606 sigma_set_register(WRITE_MODE, 0x02);
608 /* Get the current position. */
609 sigma_read_pos(&stoppos, &triggerpos);
611 /* Download sample data. */
612 for (curchunk = 0; curchunk < numchunks;) {
613 newchunks = MIN(chunks_per_read, numchunks - curchunk);
615 g_message("Downloading sample data: %.0f %%",
616 100.0 * curchunk / numchunks);
618 bufsz = sigma_read_dram(curchunk, newchunks, buf);
622 lastts = *(uint16_t *) buf - 1;
624 /* Decode chunks and send them to sigrok. */
625 for (i = 0; i < newchunks; ++i) {
626 decode_chunk_ts(buf + (i * CHUNK_SIZE),
627 &lastts, &lastsample, user_data);
630 curchunk += newchunks;
634 packet.type = DF_END;
636 session_bus(user_data, &packet);
641 static int hw_start_acquisition(int device_index, gpointer session_device_id)
643 struct sigrok_device_instance *sdi;
644 struct datafeed_packet packet;
645 struct datafeed_header header;
646 uint8_t trigger_option[2] = { 0x38, 0x00 };
648 session_device_id = session_device_id;
650 if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
653 device_index = device_index;
655 /* Setup trigger (by trigger-in). */
656 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20);
658 /* More trigger setup. */
659 sigma_write_register(WRITE_TRIGGER_OPTION,
660 trigger_option, sizeof(trigger_option));
662 /* Trigger normal (falling edge). */
663 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x08);
665 /* Enable pins (200 MHz, 4 pins). */
666 sigma_set_register(WRITE_CLOCK_SELECT, 0xf0);
668 /* Setup maximum post trigger time. */
669 sigma_set_register(WRITE_POST_TRIGGER, 0xff);
671 /* Start acqusition (software trigger start). */
672 gettimeofday(&start_tv, 0);
673 sigma_set_register(WRITE_MODE, 0x0d);
675 /* Add capture source. */
676 source_add(0, G_IO_IN, 10, receive_data, session_device_id);
678 receive_data(0, 1, session_device_id);
680 /* Send header packet to the session bus. */
681 packet.type = DF_HEADER;
682 packet.length = sizeof(struct datafeed_header);
683 packet.payload = &header;
684 header.feed_version = 1;
685 gettimeofday(&header.starttime, NULL);
686 header.samplerate = cur_samplerate;
687 header.protocol_id = PROTO_RAW;
688 header.num_probes = 4;
689 session_bus(session_device_id, &packet);
694 static void hw_stop_acquisition(int device_index, gpointer session_device_id)
696 device_index = device_index;
697 session_device_id = session_device_id;
699 /* Stop acquisition. */
700 sigma_set_register(WRITE_MODE, 0x11);
702 // XXX Set some state to indicate that data should be sent to sigrok
703 // Now, we just wait for timeout
706 struct device_plugin asix_sigma_plugin_info = {
716 hw_set_configuration,
717 hw_start_acquisition,